DM54LS377/DM74LS377 Octal D Flip-Flop with Common Enable and Clock General Description Features The ’LS377 is an 8-bit register built using advanced low power Schottky technology. This register consists of eight D-type flip-flops with a buffered common clock and a buffered common input enable. The device is packaged in the space-saving (0.3 inch row spacing) 20-pin package. Y Y Y 8-bit high speed parallel registers Positive edge-triggered D-type flip-flops Fully buffered common clock and enable inputs Connection Diagram Dual-In-Line Package TL/F/9831 – 1 Order Number DM54LS377E, DM54LS377J, DM54LS377W, DM74LS377WM or DM74LS377N See NS Package Number E20A, J20A, M20B, N20A or W20A Pin Names E D0–D7 CP Q0–Q7 C1995 National Semiconductor Corporation TL/F/9831 Description Enable Input (Active LOW) Data Inputs Clock Pulse Input (Active Rising Edge) Flip-Flop Outputs RRD-B30M115/Printed in U. S. A. DM54LS377/DM74LS377 Octal D Flip-Flop with Common Enable and Clock May 1992 Absolute Maximum Ratings (Note) Note: The ‘‘Absolute Maximum Ratings’’ are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the ‘‘Electrical Characteristics’’ table are not guaranteed at the absolute maximum ratings. The ‘‘Recommended Operating Conditions’’ table will define the conditions for actual device operation. If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/Distributors for availability and specifications. Supply Voltage 7V Input Voltage 7V Operating Free Air Temperature Range b 55§ C to a 125§ C DM54LS DM74LS 0§ C to a 70§ C b 65§ C to a 150§ C Storage Temperature Range Recommended Operating Conditions Symbol DM54LS377 Parameter DM74LS377 Units Min Nom Max Min Nom Max 4.5 5 5.5 4.75 5 5.25 VCC Supply Voltage VIH High Level Input Voltage VIL Low Level Input Voltage IOH High Level Output Current IOL Low Level Output Current TA Free Air Operating Temperature ts (H) ts (L) Setup Time HIGH or LOW Dn to CP 20 20 10 10 ns th (H) th (L) Hold Time HIGH or LOW Dn to CP 5.0 5.0 5.0 5.0 ns ts (H) ts (L) Setup Time HIGH or LOW E to CP 10 20 10 20 ns th (H) th (L) Hold Time HIGH or LOW E to CP 5.0 5.0 5.0 5.0 ns tw (H) tw (L) CP Pulse Width HIGH or LOW 20 20 20 20 ns 2 2 V 0.7 0.8 V b 0.4 b 0.4 mA 8 mA 70 §C 4 b 55 V 125 0 Electrical Characteristics over recommended operating free air temperature range (unless otherwise noted) Symbol Parameter Conditions Min Typ (Note 1) Max Units b 1.5 V VI Input Clamp Voltage VCC e Min, II e b18 mA VOH High Level Output Voltage VCC e Min, IOH e Max VIL e Max Low Level Output Voltage VCC e Min, IOL e Max VIH e Min DM74 0.35 0.5 IOL e 4 mA, VCC e Min DM74 0.25 0.4 Input Current @ Max Input Voltage VCC e Max, VI e 7V VI e 10V DM54 IIH High Level Input Current VCC e Max, VI e 2.7V 20.0 mA IIL Low Level Input Current VCC e Max, VI e 0.4V b 0.4 mA IOS Short Circuit Output Current VCC e Max (Note 2) Supply Current VCC e Max VOL II ICC DM54 2.5 DM74 2.7 V 3.4 DM54 0.4 DM74 0.1 DM54 b 20 b 100 DM74 b 20 b 100 28 Note 1: All typicals are at VCC e 5V, TA e 25§ C. Note 2: Not more than one output should be shorted at a time, and the duration should not exceed one second. 2 V mA mA mA Switching Characteristics VCC e a 5.0V, TA e a 25§ C Symbol RL e 2 kX, CL e 15 pF Parameter Min fmax Maximum Clock Frequency tPLH tPHL Propagation Delay CP to Qn 30 MHz 25 25 Functional Description Units Max ns Truth Table The ’LS377 consists of eight edge-triggered D flip-flops with individual D inputs and Q outputs. The Clock (CP) and Enable input (E) are common to all flip-flops. When E is LOW, new data is entered into the register on the next LOW-to-HIGH transition of CP. When E is HIGH, the register will retain the present data independent of the CP. Inputs Output E CP Dn Qn H L L X L L X H L No Change H L H e HIGH Voltage Level L e LOW Voltage Level X e Immaterial Logic Symbol TL/F/9831 – 2 VCC e Pin 20 GND e Pin 10 Logic Diagram TL/F/9831 – 3 3 Physical Dimensions inches (millimeters) Ceramic Leadless Chip Carrier (E) Order Number DM54LS377E NS Package Number E20A 20-Lead Ceramic Dual-In-Line Package (J) Order Number DM54LS377J NS Package Number J20A 4 Physical Dimensions inches (millimeters) (Continued) 20-Lead Wide Small Outline Molded Package (M) Order Number DM74LS377WM NS Package Number M20B 20-Lead Molded Dual-In-Line Package (N) Order Number DM74LS377N NS Package Number N20A 5 DM54LS377/DM74LS377 Octal D Flip-Flop with Common Enable and Clock Physical Dimensions inches (millimeters) (Continued) 20-Lead Ceramic Flat Package (W) Order Number DM54LS377W NS Package Number W20A LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION. 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