NSC MM80C98

MM70C95/MM80C95, MM70C97/MM80C97
TRI-STATEÉ Hex Buffers
MM70C96/MM80C96, MM70C98/MM80C98
TRI-STATE Hex Inverters
General Description
Features
These gates are monolithic complementary MOS (CMOS)
integrated circuits constructed with N- and P-channel enhancement mode transistors. The MM70C95/MM80C95
and the MM70C97/MM80C97 convert CMOS or TTL outputs to TRI-STATE outputs with no logic inversion, the
MM70C96/MM80C96 and the MM70C98/MM80C98 provide the logical opposite of the input signal. The MM70C95/
MM80C95 and the MM70C96/MM80C96 have common
TRI-STATE controls for all six devices. The MM70C97/
MM80C97 and the MM70C98/MM80C98 have two TRISTATE controls; one for two devices and one for the other
four devices. Inputs are protected from damage due to static discharge by diode clamps to VCC and GND.
Y
Y
Y
Y
Wide supply voltage range
Guaranteed noise margin
High noise immunity
TTL compatible
3.0V to 15V
1.0V
0.45 VCC (typ.)
Drive 1 TTL Load
Applications
Y
Bus drivers
Typical propagation delay
into 150 pF load is 40 ns
Connection Diagrams (Dual-In-Line Packages)
MM70C95/MM80C95
MM70C96/MM80C96
TL/F/5907 – 1
TL/F/5907 – 2
Top View
Top View
Order Number MM70C95 or MM80C95
Order Number MM70C96 or MM80C96
MM70C97/MM80C97
MM70C98/MM80C98
TL/F/5907 – 3
TL/F/5907 – 4
Top View
Top View
Order Number MM70C97 or MM80C97
Order Number MM70C98 or MM80C98
TRI-STATEÉ is a registered trademark of National Semiconductor Corporation.
C1995 National Semiconductor Corporation
TL/F/5907
RRD-B30M105/Printed in U. S. A.
MM70C95/MM80C95, MM70C97/MM80C97 TRI-STATE Hex Buffers
MM70C96/MM80C96, MM70C98/MM80C98 TRI-STATE Hex Inverters
February 1988
Absolute Maximum Ratings (Note 1)
Voltage at Any Pin
b 0.3V to VCC a 0.3V
Operating Temperature Range
MM70CXX
MM80CXX
b 65§ C to a 150§ C
Storage Temperature Range
Power Dissipation (PD)
Dual-In-Line
Small Outline
Power Supply Voltage (VCC)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
b 55§ C to a 125§ C
b 40§ C to a 85§ C
700 mW
500 mW
18V
Lead Temperature
(Soldering, 10 seconds)
260§ C
DC Electrical Characteristics Min/Max limits apply across temperature range unless otherwise noted
Symbol
Parameter
Conditions
Min
Typ
Max
Units
CMOS TO CMOS
VIN(1)
Logical ‘‘1’’ Input Voltage
VCC e 5V
VCC e 10V
VIN(0)
Logical ‘‘0’’ Input Voltage
VCC e 5V
VCC e 10V
VOUT(1)
Logical ‘‘1’’ Output Voltage
VCC e 5V
VCC e 10V
VOUT(0)
Logical ‘‘0’’ Output Voltage
VCC e 5V
VCC e 10V
IIN(1)
Logical ‘‘1’’ Input Current
VCC e 15V
IIN(0)
Logical ‘‘0’’ Input Current
IOZ
Output Current in High
Impedance State
VCC e 15V, VO e 15V
VCC e 15V, VO e 0V
Supply Current
VCC e 15V
ICC
3.5
8.0
V
V
1.5
2.0
4.5
9.0
V
V
V
V
0.5
1.0
0.005
b 1.0
b 0.005
b 1.0
b 0.005
0.005
0.01
1.0
V
V
mA
mA
1.0
mA
mA
15
mA
TTL INTERFACE
VIN(1)
Logical ‘‘1’’ Input Voltage
70C
80C
VCC e 4.5V
VCC e 4.75V
VIN(0)
Logical ‘‘0’’ Input Voltage
70C
80C
VCC e 4.5V
VCC e 4.75V
VOUT(1)
Logical ‘‘1’’ Output Voltage
70C
80C
VCC e 4.5V, IO e b1.6 mA
VCC e 4.75V, IO e b1.6 mA
VOUT(0)
Logical ‘‘0’’ Output Voltage
70C
80C
VCC e 4.5V, IO e 1.6 mA
VCC e 4.75V, IO e 1.6 mA
VCC b 1.5
VCC b 1.5
V
V
0.8
0.8
2.4
2.4
V
V
V
V
0.4
0.4
V
V
OUTPUT DRIVE (Short Circuit Current)
ISOURCE
Output Source Current
VCC e 5V, VIN(1) e 5V
TA e 25§ C, VOUT e 0V
ISOURCE
Output Source Current
ISINK
ISINK
b 4.35
mA
VCC e 10V, VIN(1) e 10V
TA e 25§ C, VOUT e 0V
b 20
mA
Output Sink Current
VCC e 5V, VIN(0) e 0V
TA e 25§ C, VOUT e VCC
4.35
mA
Output Sink Current
VCC e 10V, VIN(0) e 0V
TA e 25§ C, VOUT e VCC
20
mA
Note 1: ‘‘Absolute Maximum Ratings’’ are those values beyond which the safety of the device cannot be guaranteed. Except for ‘‘Operating Temperature Range’’
they are not meant to imply that the device should be operated at these limits. The table of ‘‘Electrical Characteristics’’ provides conditions for actual device
operation.
Note 2: Capacitance is guaranteed by periodic testing.
Note 3: CPD determines the no load AC power consumption of any CMOS device. For complete explanation see 54C/74C Family Characteristics application note
AN-90.
2
AC Electrical Characteristics* TA e 25§ C, CL e 50 pF, unless otherwise noted.
Symbol
Parameter
tpd0, tpd1
Propagation Delay Time to a Logical ‘‘0’’ or
Logical ‘‘1’’ from Data Input to Output
MM70C95/MM80C95, MM70C97/MM80C97
Conditions
MM70C96/MM80C96, MM70C98/MM80C98
tpd0, tpd1
Propagation Delay Time to a Logical ‘‘0’’ or
Logical ‘‘1’’ from Data Input to Output
MM70C95/MM80C95, MM70C97/MM80C97
MM70C96/MM80C96, MM70C98/MM80C98
t1H, t0H
Delay from Disable Input to High Impedance
State, (from Logical ‘‘1’’ or Logical ‘‘0’’)
MM70C95/MM80C95
Typ
Max
Units
VCC
VCC
VCC
VCC
e
e
e
e
5V
10V
5V
10V
60
25
70
35
100
40
150
75
ns
ns
ns
ns
VCC
VCC
VCC
VCC
e
e
e
e
5V, CL e 150 pF
10V, CL e 150 pF
5V, CL e 150 pF
10V, CL e 150 pF
85
40
95
45
160
80
210
110
ns
ns
ns
ns
80
50
100
70
70
50
90
70
135
90
180
125
125
90
170
125
ns
ns
ns
ns
ns
ns
ns
ns
5V
10V
5V
10V
5V
10V
5V
10V
120
50
130
60
95
40
120
50
200
90
225
110
175
80
200
90
ns
ns
ns
ns
ns
ns
ns
ns
RL e 10k, CL e 5 pF
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
MM70C96/MM80C96
MM70C97/MM80C97
MM70C98/MM80C98
tH1, tH0
Min
Delay from Disable Input to Logical ‘‘1’’ Level
(from High Impedance State)
MM70C95/MM80C95
e
e
e
e
e
e
e
e
5V
10V
5V
10V
5V
10V
5V
10V
RL e 10k, CL e 50 pF
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
MM70C96/MM80C96
MM70C97/MM80C97
MM70C98/MM80C98
e
e
e
e
e
e
e
e
CIN
Input Capacitance
Any Input (Note 2)
5.0
COUT
Output Capacitance TRI-STATE
Any Output (Note 2)
11
pF
pF
CPD
Power Dissipation Capacitance
(Note 3)
60
pF
*AC Parameters are guaranteed by DC correlated testing.
Truth Tables
MM70C95/MM80C95
Disable
DIS1
Input
DIS2
Input
0
0
0
1
1
0
0
1
0
1
0
1
X
X
X
MM70C96/MM80C96
Output
Disable
DIS1
Input
DIS2
Input
Output
0
1
H-z
H-z
H-z
0
0
0
1
1
0
0
1
0
1
0
1
X
X
X
1
0
H-z
H-z
H-z
MM70C97/MM80C97
MM70C98/MM80C98
Disable
DIS4
Input
DIS2
Input
Output
Disable
DIS4
Input
DIS2
Input
Output
0
0
X
1
0
0
1
X
0
1
X
X
0
1
H-z*
H-z**
0
0
X
1
0
0
1
X
0
1
X
X
1
0
H-z*
H-z**
*Output 5–6 only
**Output 1–4 only
X e Irrelevant
3
AC Test Circuits and Switching Time Waveforms
tpd0, tpd1
CMOS to CMOS
TL/F/5907–13
TL/F/5907 – 14
t1H and tH1
t1H
tH1
TL/F/5907–15
TL/F/5907 – 16
t0H and tH0
t0H
tH0
TL/F/5907 – 19
TL/F/5907–18
Note: Delays measured with input tr, tf s 20 ns.
4
TL/F/5907 – 17
TL/F/5907 – 20
Typical Performance Characteristics
Dtpd/pF vs
Power Supply Voltage
Propagation Delay vs
Load Capacitance
TL/F/5907 – 6
TL/F/5907 – 5
N-Channel Output Drive at 25§ C
P-Channel Output Drive at 25§ C
TL/F/5907 – 7
TL/F/5907 – 8
Schematic Diagrams
MM70C95/MM80C95 TRI-STATE
TL/F/5907 – 9
MM70C96/MM80C96 TRI-STATE
TL/F/5907 – 10
5
Schematic Diagrams (Continued)
MM70C97/MM80C97 TRI-STATE
TL/F/5907 – 11
MM70C98/MM80C98 TRI-STATE
TL/F/5907 – 12
6
Physical Dimensions inches (millimeters)
Ceramic Dual-In-Line Package (J)
Order Number MM70C95J, MM70C96J, MM70C97J, MM70C98J,
MM80C95J, MM80C96J, MM80C97J or MM80C98J
NS Package Number J16A
7
MM70C95/MM80C95, MM70C97/MM80C97 TRI-STATE Hex Buffers
MM70C96/MM80C96, MM70C98/MM80C98 TRI-STATE Hex Inverters
Physical Dimensions inches (millimeters) (Continued)
Molded Dual-In-Line Package (N)
Order Number MM70C95N, MM70C96N, MM70C97N, MM70C98N,
MM80C95N, MM80C96N, MM80C97N or MM80C98N
NS Package Number N16E
LIFE SUPPORT POLICY
NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL
SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or
systems which, (a) are intended for surgical implant
into the body, or (b) support or sustain life, and whose
failure to perform, when properly used in accordance
with instructions for use provided in the labeling, can
be reasonably expected to result in a significant injury
to the user.
National Semiconductor
Corporation
1111 West Bardin Road
Arlington, TX 76017
Tel: 1(800) 272-9959
Fax: 1(800) 737-7018
2. A critical component is any component of a life
support device or system whose failure to perform can
be reasonably expected to cause the failure of the life
support device or system, or to affect its safety or
effectiveness.
National Semiconductor
Europe
Fax: (a49) 0-180-530 85 86
Email: cnjwge @ tevm2.nsc.com
Deutsch Tel: (a49) 0-180-530 85 85
English Tel: (a49) 0-180-532 78 32
Fran3ais Tel: (a49) 0-180-532 93 58
Italiano Tel: (a49) 0-180-534 16 80
National Semiconductor
Hong Kong Ltd.
13th Floor, Straight Block,
Ocean Centre, 5 Canton Rd.
Tsimshatsui, Kowloon
Hong Kong
Tel: (852) 2737-1600
Fax: (852) 2736-9960
National Semiconductor
Japan Ltd.
Tel: 81-043-299-2309
Fax: 81-043-299-2408
National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.