N CLC952 12-bit, 41MSPS Monolithic A/D Converter General Description Features The CLC952 is a complete monolithic 12-bit 41MSPS analog-todigital converter system. Fabricated from a 0.8µm BiCMOS process, the CLC952’s on-chip features include a very linear wideband track-and-hold, bandgap voltage reference and a proprietary 12-bit multi-stage quantizer. The CLC952 has been designed for wideband digital communications receivers and features a 72dBc spurious-free dynamic range (SFDR) and 64dB signal-to-noise ratio (SNR). ■ ■ ■ ■ ■ ■ The CLC952 operates from a standard ±5V power supply and features excellent noise isolation with its >60dB power-supply rejection ratio (PSRR). All digital control functions and output registers are TTL compatible. The CLC952AC operates over the commercial temperature range (0°C to 70°C), and the CLC952AJ operates over the industrial temperature range (-40°C to 85°C) version. The CLC952 is available in a 28-pin SSOP that provides an extremely small footprint for reduced board space. National Semiconductor thoroughly tests each part to verify full compliance with guaranteed specifications. ■ Applications ■ ■ ■ ■ ■ ■ ■ ■ Offset Adjust CLC952 Block Diagram 41MSPS Wide dynamic range SFDR: 72dBc SNR: 64dB Low power dissipation: 660mW Ground centered, DC-coupled analog input Excellent PSRR: >60dB Very small package: 28-pin SSOP Low cost Cellular base-stations Digital communications Infrared/CCD imaging IF sampling Electro-optics Instrumentation Medical imaging High definition video CLC952 12-bit, 41MSPS Monolithic A/D Converter September 1997 VREF 2.4V Voltage Reference Vin Input Amp T/H Amplifier 12-bit Subranging Quantizer TTL Output Buffer D11 MSB • • D0 LSB Timing Generator ENCODE © 1997 National Semiconductor Corporation Printed in the U.S.A. http://www.national.com CLC952 Electrical Characteristics PARAMETERS (VCC = +5V, VEE = -5V, 40.96MSPS; unless specified) CONDITIONS TEMP Note 4 DYNAMIC PERFORMANCE small-signal bandwidth large-signal bandwidth slew rate overvoltage recovery time effective aperture delay aperture jitter Vin = 1/4FS Vin = FS Vin = 1.5FS (0.01%) input current output voltage dB dB dB dB dB dB 72 71 69 68 67 66 dBc dBc dBc dBc dBc dBc +25°C 75 dBFS +25°C +25°C +25°C Full +25°C Full 1.4 3.0 5.1 LSB LSB mV mV %FS %FS 60 60 64 61 60 25.0 -4.5 15.0 +25°C +25°C logic LOW logic HIGH logic LOW logic HIGH logic LOW logic HIGH Full Full Full Full Full Full TIMING maximum conversion rate minimum conversion rate pulse width high pulse width low pipeline delay output propagation delay POWER REQUIREMENTS +5V supply current +5V supply current -5V supply current -5V supply current nominal power dissipation VEE power supply rejection ratio VCC power supply rejection ratio 64 61 64 61 62 60 60 Full Full Full Full Full +25°C 41MSPS 41MSPS 41MSPS 41MSPS 41MSPS +25°C Full +25°C Full +25°C +25°C +25°C 0.8 2.0 5 25 0.8 2.4 40.96 10.5 3.0 12.2 12.2 15 1.0 15 54 78 660 72 60 1 1 1 1 1 1 3 3 Ω pF 500 2 0 4.0 NOTES MAX MHz MHz V/µs ns ns ps(rms) +25°C Full +25°C Full +25°C Full DC; FS DC; FS TYP UNITS 185 180 357 5 1.6 4 +25°C Full +25°C Full +25°C Full ANALOG INPUT AND PERFORMANCE analog input resistance analog input capacitance DIGITAL INPUTS input voltage MIN +25°C +25°C +25°C +25°C +25°C +25°C NOISE AND DISTORTION (40.96MSPS) signal-to-noise ratio (w/o harmonics) 2.0MHz FS FS 9.67MHz FS FS 19.5MHz FS FS spurious-free dynamic range 2.0MHz FS-1dB FS-1dB 9.67MHz FS-1dB FS-1dB 19.5MHz FS-1dB FS-1dB intermodulation distortion FS-7dB 19.49MHz (f1), 19.9MHz (f2) DC ACCURACY AND PERFORMANCE differential non-linearity integral non-linearity bipolar offset error bipolar offset error bipolar gain error bipolar gain error RATINGS 70 70 100 100 V V µA µA V V 1,3 1,3 1,3 1,3 1,3 1,3 MSPS MSPS ns ns clk cycle ns 1,3 3 3 3 3 mA mA mA mA mW dB dB 1 3 1 3 Min/max ratings are based on product characterization and simulation. Individual parameters are tested as noted. Outgoing quality levels are determined from tested parameters. Notes 1) These parameters are 100% tested at 25°C. 2) Typical specifications are the mean values of the distributions of deliverable converters tested to date. http://www.national.com 3) Min/max data over temperature is based on the 5 sigma limit for deliverable converters tested to date. 4) Full temperature range is 0°C to +70°C for AC, -40°C to +85°C for AJ. 2 Absolute Maximum Ratings positive supply voltage (VCC) negative supply voltage (VEE) differential voltage between any two grounds analog input voltage range digital input voltage range output short circuit duration (one-pin to ground) junction temperature storage temperature range lead solder duration (+300°C) Recommended Operating Conditions -0.5V to +6V +0.5V to -6V <200mV VEE to VCC -0.5V to +VCC infinite 175°C -65°C to 150°C 10sec positive supply voltage (VCC) negative supply voltage (VEE) differential voltage between any two grounds analog input voltage range operating temperature range (AC) operating temperature range (AJ) +5V ±5% -5V ±5% <10mV ±0.5V 0°C to +70°C -40°C to +85°C Package Thermal Resistance Note: Absolute maximum ratings are limiting values, to be applied individually, and beyond which the serviceability of the circuit may be impaired. Functional operability under any of these conditions is not necessarily implied. Exposure to maximum ratings for extended periods may affect device reliability. Package θJA θJC 28-pin SSOP 80°C/W 32°C/W Reliability Information Transistor count 3000 Ordering Information Model CLC952ACMSA CLC952AJMSA CLC952PCASM Temperature Range 0°C to +70°C -40°C to +85°C Description 28-pin SSOP (commercial part) 28-pin SSOP (industrial part) Fully loaded evaluation board with CLC952 … ready for test. N tA = 1.6ns Analog Input N+2 N+1 N N+1 N+2 ENCODE Digital Outputs (D11– D0) N-2 N-1 N tOD = 15ns typ. CLC952 Timing Diagram 3 http://www.national.com CLC952 Typical Performance Characteristics (VCC = +5V, VEE = -5V) Single Tone Output Spectrum Single Tone Output Spectrum 0 0 40.96MSPS AIN = 0.41MHz -20 Amplitude (dBFS) Amplitude (dBFS) -20 40.96MSPS AIN = 4.99MHz -40 -60 -80 -40 -60 -80 -100 -100 0 4 8 12 16 20 0 4 Frequency (MHz) Single Tone Output Spectrum 16 20 Single Tone Output Spectrum 0 40.96MSPS AIN = 9.67MHz 30.72MSPS AIN = 0.39MHz -20 Amplitude (dBFS) -20 Amplitude (dBFS) 12 Frequency (MHz) 0 -40 -60 -80 -100 -40 -60 -80 -100 0 4 8 12 16 20 0 3 Frequency (MHz) 70 70 SFDR (dBc) & SNR (dB) 80 60 50 SFDR SNR 30 20 8 12 15 SFDR & SNR vs. Input Amplitude 80 40 6 Frequency (MHz) SFDR & SNR vs. Input Amplitude SFDR (dBc) & SNR (dB) 8 Sample Rate = 40.96MSPS AIN = 0.41MHz 10 60 50 40 SFDR SNR 30 20 Sample Rate = 40.96MSPS AIN = 4.99MHz 10 -50 -40 -30 -20 -10 0 -50 Input Amplitude (dBFS) http://www.national.com -40 -30 -20 -10 Input Amplitude (dBFS) 4 0 CLC952 Typical Performance Characteristics (VCC = +5V, VEE = -5V) SFDR & SNR vs. Input Amplitude SFDR & SNR vs. Input Amplitude 80 70 SFDR (dBc) & SNR (dB) SFDR (dBc) & SNR (dB) 80 60 50 40 SFDR SNR 30 20 Sample Rate = 40.96MSPS AIN = 9.67MHz 10 70 SFDR 60 50 40 SNR 30 Sample Rate = 30.72MSPS AIN = 7.37MHz 20 -50 -40 -30 -20 -10 -50 0 -40 Input Amplitude (dBFS) SFDR & SNR vs. Sample Rate -10 0 SFDR & SNR vs. Sample Rate 100 SFDR (dBc) & SNR (dB) SFDR SFDR (dBc) & SNR (dB) -20 Input Amplitude (dBFS) 90 80 70 SNR 60 50 FS – 1dB AIN = 0.41MHz 40 SFDR 80 SNR 60 40 20 FS – 1dB AIN = 4.99MHz 0 0 10 20 30 40 50 60 0 Sample Rate (MSPS) 10 20 30 40 50 60 70 Sample Rate (MSPS) SFDR & SNR vs. Sample Rate SFDR & SNR vs. Input Frequency 100 80 SFDR SFDR (dBc) & SNR (dB) SFDR (dBc) & SNR (dB) -30 80 60 SNR 40 20 0 FS – 1dB AIN = 9.67MHz SFDR 70 SNR 60 40.96MSPS -20 50 0 10 20 30 40 50 60 1 70 Sample Rate (MSPS) 10 Input Frequency (MHz) 5 http://www.national.com CLC952 Typical Performance Characteristics (VCC = +5V, VEE = -5V) SFDR & SNR vs. Input Frequency Two Tone Output Spectrum 0 40.96MSPS f1 = 19.49MHz f2 = 19.9MHz -20 75 Amplitude (dBFS) SFDR (dBc) & SNR (dB) 85 SFDR 65 SNR 55 -40 -60 -80 45 30.72MSPS -100 0.1 1 10 0 100 5 Input Frequency (MHz) 10 15 20 Frequency (MHz) Physical Dimensions D e 28 15 R1 A E A E1 L L1 c b1 c1 b SECTION A – A DETAIL A 1 INDEX MARK 14 SEE DETAIL "A" A2 A A1 b Symbol Min Max A 1.73 2.00 A1 0.00 0.21 A2 1.65 1.85 b 0.20 0.40 b1 0.20 0.33 c 0.10 0.22 c1 0.10 0.18 D 10.07 10.33 E 7.50 7.90 E1 5.20 5.38 e L L1 R1 Notes 2 2 0.65 BSC 0.52 0.95 1.25 REF 0.09 Notes: 1. All dimensions are in millimeters 2. Dimensions D and E1 do not include mold protrusion. Allowable protrusion is 0.20mm per side. http://www.national.com 6 CLC952 Pin Definitions AGND 1 28 D11 (MSB INV) AVCC 2 27 D10 AVEE 3 26 D9 ENCODE 4 25 D8 AVEE 5 24 D7 AGND 6 23 D6 AVEE 7 22 D5 CLC952 AIN 8 21 D4 VOFFSET 9 20 D3 VREF 10 19 D2 AVEE 11 18 D1 AVCC 12 17 D0 AGND 13 16 DGND AVCC 14 15 DVCC (LSB) AGND (Pins 1, 6, 13) Analog circuit ground. AVCC (Pins 2, 12, 14) +5V power supply for the analog section. Bypass to analog ground with a 0.1µF capacitor. AVEE (Pins 3, 5, 7,11) -5V power supply for the analog section. Bypass to analog ground with a 0.1µF capacitor. ENCODE (Pin 4) ENCODE initiates a new data conversion cycle on each rising edge. Logic for this input is standard TTL. 50% duty cycle is recommended for full compliance with the guaranteed specifications. AIN (Pin 8) Ground-centered, DC-coupled analog input with a 1Vpp maximum input range from -0.5V to +0.5V. Analog input impedance is approximately 500Ω. VOFFSET (Pin 9) Voltage offset control. Sets the midpoint of the analog input range. Normally left floating. Ratio of applied voltage to effective offset is 200:1. (1V applied to VOFFSET produces 5mV midpoint offset.) VREF (Pin 10) Internal voltage reference. Nominally +2.4V. VREF can be pulled up or down with a voltage source to program gain and input range. Bypass VREF to ground with a 0.1µF capacitor. DVCC (Pin 15) +5V power supply for the digital section. Bypass to digital ground with a 0.1µF capacitor. DGND ___ D0-D11 (Pin 16) Digital ground. ___ (Pins 17-28) Digital data outputs are CMOS and TTL compatible. D0 is the LSB and D11 is the MSB. MSB is inverted. Output coding is two’s complement. 7 http://www.national.com CLC952 12-bit, 41MSPS Monolithic A/D Converter Customer Design Applications Support National Semiconductor is committed to design excellence. For sales, literature and technical support, call the National Semiconductor Customer Response Group at 1-800-272-9959 or fax 1-800-737-7018. Life Support Policy National’s products are not authorized for use as critical components in life support devices or systems without the express written approval of the president of National Semiconductor Corporation. As used herein: 1. Life support devices or systems are devices or systems which, a) are intended for surgical implant into the body, or b) support or sustain life, and whose failure to perform, when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. 2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. N National Semiconductor Corporation National Semiconductor Europe National Semiconductor Hong Kong Ltd. National Semiconductor Japan Ltd. 1111 West Bardin Road Arlington, TX 76017 Tel: 1(800) 272-9959 Fax: 1(800) 737-7018 Fax: (+49) 0-180-530 85 86 E-mail: europe.support.nsc.com Deutsch Tel: (+49) 0-180-530 85 85 English Tel: (+49) 0-180-532 78 32 Francais Tel: (+49) 0-180-532 93 58 Italiano Tel: (+49) 0-180-534 16 80 13th Floor, Straight Block Ocean Centre, 5 Canton Road Tsimshatsui, Kowloon Hong Kong Tel: (852) 2737-1600 Fax: (852) 2736-9960 Tel: 81-043-299-2309 Fax: 81-043-299-2408 National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications. http://www.national.com 8 Lit #150952-003