NSC LM27964SQ-C

LM27964
White LED Driver System with I2C Compatible Brightness
Control
General Description
Features
The LM27964 is a charge-pump-based white-LED driver that
is ideal for mobile phone display backlighting. The LM27964
can drive up to 6 LEDs in parallel along with multiple keypad
LEDs, with a total output current up to 180mA. Regulated internal current sources deliver excellent current matching in all
LEDs.
The LED driver current sources are split into two independently controlled groups. The primary group (4 LEDs) can be
used to backlight the main phone display and the second
group (2 LEDs) can be used to backlight a secondary display.
A single Keypad LED driver can power up to 16 keypad LEDs
with a current of 5mA each. The LM27964 has an I2C compatible interface that allows the user to independently control
the brightness on each bank of LEDs.
The LM27964 works off an extended Li-Ion input voltage
range (2.7V to 5.5V). The device provides excellent efficiency
without the use of an inductor by operating the charge pump
in a gain of 3/2, or in Pass-Mode. The proper gain for maintaining current regulation is chosen, based on LED forward
voltage, so that efficiency is maximized over the input voltage
range.
The LM27964 is available in National's small 24-pin Leadless
Leadframe Package (LLP-24).
■ 87% Peak LED Drive Efficiency
■ 0.2% Current Matching between Current Sinks
■ Drives 6 LEDs with up to 30mA per LED in two distinct
■
■
■
■
■
■
■
groups, for backlighting two displays (main LCD and sub
LCD)
Dedicated Keypad LED Driver with up to 80mA of drive
current
Independent Resistor-Programmable Current Settings
I2C Compatible Brightness Control Interface
Adaptive 1×- 3/2× Charge Pump
Extended Li-Ion Input: 2.7V to 5.5V
Small low profile industry standard leadless package, LLP
24 : (4mm x 4mm x 0.8mm)
LM27964SQ-I LED PWM frequency = 10kHz,
LM27964SQ-C LED PWM frequency = 23kHz
Applications
■
■
■
■
Mobile Phone Display Lighting
Mobile Phone Keypad Lighting
PDAs Backlighting
General LED Lighting
Typical Application Circuit
20138101
© 2007 National Semiconductor Corporation
201381
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LM27964 White LED Driver System with I2C Compatible Brightness Control
August 2007
LM27964
Connection Diagram
24 Pin Quad LLP Package
NS Package Number SQA24A
20138102
Pin Descriptions
Pin #s
Pin Names
Pin Descriptions
24
VIN
23
POUT
Charge Pump Output Voltage
19, 22 (C1)
20, 21 (C2)
C1, C2
Flying Capacitor Connections
13, 14, 15, 16
Input voltage. Input range: 2.7V to 5.5V.
D4A, D3A, D2A, D1A LED Drivers - GroupA
4, 5
D1B, D2B
LED Drivers - GroupB
6
DKEY
LED Driver - KEYPAD
17
ISETA
Placing a resistor (RSETA) between this pin and GND sets the full-scale LED current for
Group A LEDs. LED Current = 200 × (1.25V ÷ RSETA)
3
ISETB
Placing a resistor (RSETB) between this pin and GND sets the full-scale LED current for
Group B LEDs. LED Current = 200 × (1.25V ÷ RSETB)
12
ISETK
Placing a resistor (RSETK) between this pin and GND sets the total LED current for the
KEYPAD LEDs. Keypad LED Current = 800 × (1.25V ÷ RSETK)
1
SCL
Serial Clock Pin
2
SDIO
Serial Data Input/Output Pin
7
VIO
Serial Bus Voltage Level Pin
9, 10, 18, DAP
GND
Ground
8, 11
NC
No Connect
Ordering Information
Order Information
LM27964SQ-I
LM27964SQX-I
LM27964SQ-C
LM27964SQX-C
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Current Source
PWM Frequency
Package
10kHz.
SQA24 LLP
23kHz.
SQA24 LLP
Supplied As
1000 Units, Tape & Reel
4500 Units, Tape & Reel
1000 Units, Tape & Reel
4500 Units, Tape & Reel
2
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
VIN pin voltage
-0.3V to 6.0V
SCL, SDIO, VIO pin voltages
-0.3V to (VIN+0.3V) w/ 6.0V max
IDxx Pin Voltages
-0.3V to (VPOUT+0.3V) w/ 6.0V max
Continuous Power Dissipation
Internally Limited
(Note 3)
Junction Temperature (TJ-MAX)
150ºC
Storage Temperature Range
-65ºC to +150º C
(Note 4)
1.0kV
2.0kV
Operating Rating
(Notes 1, 2)
Input Voltage Range
LED Voltage Range
Junction Temperature (TJ) Range
Ambient Temperature (TA) Range
(Note 6)
2.7V to 5.5V
2.0V to 4.0V
-30°C to +100°C
-30°C to +85°C
Thermal Properties
Juntion-to-Ambient Thermal
Resistance (θJA), SQA24A Package
(Note 7)
Electrical Characteristics
41.3°C/W
(Notes 2, 8)
Limits in standard typeface are for TJ = 25°C, and limits in boldface type apply over the full operating temperature range. Unless
otherwise specified: VIN = 3.6V; VDxA = 0.4V; VDxB = 0.4V; VDKEY = 0.4V; RSETA = RSETB = RSETK = 16.9kΩ; BankA, BankB, and
DKEY = Fullscale Current; ENA, ENB, ENK Bits = “1”; C1=C2=1.0µF, CIN=COUT=2.2µF; Specifications related to output current(s)
and current setting pins (IDxx and ISETx) apply to BankA, BankB and DKEY. (Note 9)
Symbol
Parameter
Condition
3.0V ≤ VIN ≤ 5.5V
BankA or BankB Full-Scale
ENA or ENB = "1", ENK = “0”
Output Current Regulation
BankA or BankB Enabled
IDxx
Output Current Regulation
Keypad Driver Enabled
Min
Typ
Max
Units
13.77
(-10%)
15.3
16.83
(+10%)
mA
(%)
3.0V ≤ VIN ≤ 5.5V
BankA or BankB Half-Scale
ENA or ENB = "1", ENK = “0”
7.5
mA
2.7V ≤ VIN ≤ 3.0V
BankA or BankB Full-Scale
ENA or ENB = "1", ENK = “0”
15
mA
3.0V ≤ VIN ≤ 5.5V
DKEY Full-Scale
ENA = ENB = “0”, ENK = “1”
3.2V ≤ VIN ≤ 5.5V
Output Current Regulation
BankA and DKEY Enabled
(Note 10)
RSETA = 8.3kΩ, RSETK = 16.9kΩ
VLED = 3.6V
BankA and DKEY Full-Scale
ENA = ENK = “1”, ENB = “0”
ROUT
Open-Loop Charge Pump Output
Resistance
Gain = 3/2
VDxTH
VDxx 1x to 3/2x Gain Transition
Threshold
52.8
(-12%)
60
60
DKEY
1
VDxA and/or VDxB Falling
mA
(%)
30
DxA
2.75
Gain = 1
67.2
(+12%)
375
mA
Ω
mV
IDxx = 95% ×IDxx (nom.)
VHR
Current Source Headroom Voltage
Requirement
(Note 11)
(IDxx (nom) ≈ 15mA)
BankA and/or BankB Full-Scale
Gain = 3/2, ENA and/or ENB = "1"
180
mV
IDKEY = 95% ×IDKEY (nom.)
(IDKEY (nom) ≈ 60mA)
DKEY Full-Scale
Gain = 3/2, ENK = "1"
3
180
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LM27964
Maximum Lead Temperature
(Soldering)
ESD Rating (Note 5)
Human Body Model - IDxx Pins:
Human Body Model - All other
Pins:
Absolute Maximum Ratings (Notes 1, 2)
LM27964
Symbol
Parameter
Condition
Min
Typ
Max
Units
IDxx-MATCH LED Current Matching
(Note 12)
0.2
2
%
IQ
Quiescent Supply Current
Gain = 1.5x, No Load
1.3
1.7
mA
ISD
Shutdown Supply Current
All ENx bits = "0"
3.0
5
µA
VSET
ISET Pin Voltage
2.7V ≤ VIN ≤ 5.5V
1.25
IDxA-B /
ISETA-B
Output Current to Current Set Ratio
BankA and BankB
200
IDKEY /
ISETK
Output Current to Current Set Ratio
DKEY
800
fSW
Switching Frequency
tSTART
Start-up Time
POUT = 90% steady state
250
fPWM
Internal Diode Current PWM
Frequency
LM27964SQ-I
10
LM27964SQ-C
23
500
D.C. Step Diode Current Duty Cycle Step
700
V
900
kHz
µs
kHz
Fullscal
e
1/16
I2C Compatible Interface Voltage Specifications (SCL, SDIO, VIO)
VIO
Serial Bus Voltage Level
1.8
VIN
V
V
VIL
Input Logic Low "0"
2.7V ≤ VIN ≤ 5.5V
0
0.27 ×
VIO
VIH
Input Logic High "1"
2.7V ≤ VIN ≤ 5.5V
0.73 ×
VIO
VIO
V
VOL
Output Logic Low "0"
ILOAD = 2mA
400
mV
I2C Compatible Interface Timing Specifications (SCL, SDIO, VIO)(Note 13)
t1
SCL (Clock Period)
2.5
µs
t2
Data In Setup Time to SCL High
100
ns
t3
Data Out stable After SCL Low
0
ns
t4
SDIO Low Setup Time to SCL Low
(Start)
100
ns
t5
SDIO High Hold Time After SCL High
(Stop)
100
ns
20138113
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the component may occur. Operating Ratings are conditions under which operation
of the device is guaranteed. Operating Ratings do not imply guaranteed performance limits. For guaranteed performance limits and associated test conditions,
see the Electrical Characteristics tables.
Note 2: All voltages are with respect to the potential at the GND pin.
Note 3: Internal thermal shutdown circuitry protects the device from permanent damage. Thermal shutdown engages at TJ = 170°C (typ.) and disengages at TJ
= 165°C (typ.).
Note 4: For detailed soldering specifications and information, please refer to National Semiconductor Application Note 1187: Leadless Leadframe Package
(AN-1187).
Note 5: The Human body model is a 100pF capacitor discharged through a 1.5kΩ resistor into each pin. MIL-STD-883 3015.7
Note 6: In applications where high power dissipation and/or poor package thermal resistance is present, the maximum ambient temperature may have to be
derated. Maximum ambient temperature (TA-MAX) is dependent on the maximum operating junction temperature (TJ-MAX-OP = 100°C), the maximum power
dissipation of the device in the application (PD-MAX), and the junction-to ambient thermal resistance of the part/package in the application (θJA), as given by the
following equation: TA-MAX = TJ-MAX-OP – (θJA × PD-MAX).
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4
Note 8: Min and Max limits are guaranteed by design, test, or statistical analysis. Typical numbers are not guaranteed, but do represent the most likely norm.
Note 9: CIN, CPOUT, C1, and C2 : Low-ESR Surface-Mount Ceramic Capacitors (MLCCs) used in setting electrical characteristics
Note 10: The maximum total output current for the LM27964 should be limited to 180mA. The total output current can be split among any of the three banks
(IDxA = IDxB = 30mA Max., IDKEY = 80mA Max.). Under maximum output current conditions, special attention must be given to input voltage and LED forward
voltage to ensure proper current regulation. See the Maximum Output Current section of the datasheet for more information.
Note 11: For each IDxx output pin, headroom voltage is the voltage across the internal current sink connected to that pin. For Group A and B outputs, VHR =
VOUT -VDxx. If headroom voltage requirement is not met, LED current regulation will be compromised.
Note 12: For the two groups of outputs on a part (BankA and BankB), the following are determined: the maximum output current in the group (MAX), the minimum
output current in the group (MIN), and the average output current of the group (AVG). For each group, two matching numbers are calculated: (MAX-AVG)/AVG
and (AVG-MIN)/AVG. The largest number of the two (worst case) is considered the matching figure for the bank. The matching figure for a given part is considered
to be the highest matching figure of the two banks. The typical specification provided is the most likely norm of the matching figure for all parts.
Note 13: SCL and SDIO should be glitch-free in order for proper brightness control to be realized.
Block Diagram
20138103
5
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LM27964
Note 7: Junction-to-ambient thermal resistance is highly dependent on application and board layout. In applications where high maximum power dissipation
exists, special care must be paid to thermal dissipation issues in board design. For more information, please refer to National Semiconductor Application Note
1187: Leadless Leadframe Package (AN-1187).
LM27964
Typical Performance Characteristics Unless otherwise specified: VIN = 3.6V; VLEDxA = 3.6V, VLEDxB =
3.6V; RSETA = RSETB = RSETK = 16.9kΩ; C1=C2=1µF , and CIN = CPOUT = 2.2µF.
LED Drive Efficiency vs Input Voltage
Charge Pump Output Voltage vs Input Voltage
20138117
20138123
Shutdown Current vs Input Voltage
Diode Current vs Input Voltage
20138119
20138124
BankA/BankB Diode Current vs Brightness Register Code
BankA Diode Current vs BankA Headroom Voltage
20138118
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20138120
6
Keypad Driver Current vs Input Voltage
20138121
20138115
Keypad Driver Current vs. Brightness Register Code
Keypad Diode Current vs Keypad Headroom Voltage
20138114
20138122
Keypad Driver Current vs Keypad RSET Resistance
20138116
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LM27964
BankB Diode Current vs BankB Headroom Voltage
LM27964
tion. If Dxx pin/s are left unconnected, the LM27964 will
default to the gain of 3/2. If the BankA or BankB drivers are
not going to be used in the application, leaving the Dxx pins
is acceptable as long as the ENx bit in the general purpose
register is set to "0".
Circuit Description
OVERVIEW
The LM27964 is a white LED driver system based upon an
adaptive 1.5×/1× CMOS charge pump capable of supplying
up to 180mA of total output current. With three separately
controlled banks of constant current sinks, the LM27964 is an
ideal solution for platforms requiring a single white LED driver
for main and sub displays, as well as other general purpose
lighting needs. The tightly matched current sinks ensure uniform brightness from the LEDs across the entire small-format
display.
Each LED is configured in a common anode configuration,
with the peak drive current being programmed through the
use of external RSETx resistors. An I2C compatible interface is
used to enable and vary the brightness within the individual
current sink banks. For BankA and BankB, 16 levels of PWM
brightness control are available, while 4 analog levels are
present for the DKEY driver.
I2C Compatible Interface
DATA VALIDITY
The data on SDIO line must be stable during the HIGH period
of the clock signal (SCL). In other words, state of the data line
can only be changed when CLK is LOW.
CIRCUIT COMPONENTS
20138106
Charge Pump
The input to the 1.5x/1x charge pump is connected to the
VIN pin, and the regulated output of the charge pump is connected to the VOUT pin. The recommended input voltage
range of the LM27964 is 3.0V to 5.5V. The device’s regulated
charge pump has both open loop and closed loop modes of
operation. When the device is in open loop, the voltage at
VOUT is equal to the gain times the voltage at the input. When
the device is in closed loop, the voltage at VOUT is regulated
to 4.6V (typ.). The charge pump gain transitions are actively
selected to maintain regulation based on LED forward voltage
and load requirements. This allows the charge pump to stay
in the most efficient gain (1x) over as much of the input voltage
range as possible, reducing the power consumed from the
battery.
FIGURE 1. Data Validity Diagram
A pull-up resistor between VIO and SDIO must be greater
than [ (VIO-VOL) / 2mA] to meet the VOL requirement on SDIO.
Using a larger pull-up resistor results in lower switching current with slower edges, while using a smaller pull-up results
in higher switching currents with faster edges.
START AND STOP CONDITIONS
START and STOP conditions classify the beginning and the
end of the I2C session. A START condition is defined as SDIO
signal transitioning from HIGH to LOW while SCL line is
HIGH. A STOP condition is defined as the SDIO transitioning
from LOW to HIGH while SCL is HIGH. The I2C master always
generates START and STOP conditions. The I2C bus is considered to be busy after a START condition and free after a
STOP condition. During data transmission, the I2C master
can generate repeated START conditions. First START and
repeated START conditions are equivalent, function-wise.
The data on SDIO line must be stable during the HIGH period
of the clock signal (SCL). In other words, the state of the data
line can only be changed when CLK is LOW.
LED Forward Voltage Monitoring
The LM27964 has the ability to switch converter gains (1x or
3/2x) based on the forward voltage of the LED load. This ability to switch gains maximizes efficiency for a given load.
Forward voltage monitoring occurs on all diode pins within
BankA and BankB (DKEY is not monitored). At higher input
voltages, the LM27964 will operate in pass mode, allowing
the POUT voltage to track the input voltage. As the input voltage drops, the voltage on the DXX pins will also drop (VDXX
= VPOUT – VLEDx). Once any of the active Dxx pins reaches a
voltage approximately equal to 375mV, the charge pump will
then switch to the gain of 3/2. This switchover ensures that
the current through the LEDs never becomes pinched off due
to a lack of headroom on the current sources.
Only active Dxx pins will be monitored. For example, if only
BankA is enabled, the LEDs in BankB will not affect the gain
transition point. If both banks are enabled, all diodes will be
monitored, and the gain transition will be based upon the
diode with the highest forward voltage. The DKEY pin is not
monitored as it is intended to be for keypad LEDs. Keypad
LEDs generally require lower current, resulting in lower forward voltage compared to the BankA and BankB LEDs that
have higher currents. In the event that only the DKEY driver
is enabled without either BankA or BankB, the charge pump
will default to 3/2 mode to ensure the DKEY driver has enough
headroom.
It is not recommended that any of the BankA or BankB drivers
be left disconnected if either bank will be used in the applica-
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20138111
FIGURE 2. Start and Stop Conditions
TRANSFERING DATA
Every byte put on the SDIO line must be eight bits long, with
the most significant bit (MSB) being transferred first. Each
byte of data has to be followed by an acknowledge bit. The
acknowledge related clock pulse is generated by the master.
The master releases the SDIO line (HIGH) during the acknowledge clock pulse. The LM27964 pulls down the SDIO
line during the 9th clock pulse, signifying an acknowledge.
The LM27964 generates an acknowledge after each byte has
been received.
8
indicates a READ. The second byte selects the register to
which the data will be written. The third byte contains data to
write to the selected register.
20138112
FIGURE 3. Write Cycle
w = write (SDIO = "0")
r = read (SDIO = "1")
ack = acknowledge (SDIO pulled down by either master or slave)
rs = repeated start
id = chip address, 36h for LM27964
I2C COMPATIBLE CHIP ADDRESS
The chip address for LM27964 is 0110110, or 36h.
20138107
FIGURE 6. General Purpose Register Example
20138109
FIGURE 4. Chip Address
INTERNAL REGISTERS OF LM27964
Register
Internal Hex
Address
Power On Value
General Purpose
Register
10h
0000 0000
Bank A and Bank
B Birghtness
Control Register
A0h
KEYPAD
B0h
Brightness Control
20138105
FIGURE 7. Brightness Control Register Description
Internal Hex Address: A0h
0000 0000
Note: DxA3-DxA0: Register Sets Current Level Supplied to DxA LED
drivers
DxB3-DxB0: Register Sets Current Level Supplied to DxB LED
drivers
Full-Scale Current set externally by the following equation:
IDxx = 200 × 1.25V / RSETx
Brightness Level Segments = 1/16th of Fullscale
0000 0000
20138108
FIGURE 5. General Purpose Register Description
Internal Hex Address: 10h
Note: ENA: Enables DxA LED drivers (Main Display)
ENB: Enables DxB LED drivers (Sub Display)
ENK: Enables Keypad Driver
9
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LM27964
After the START condition, the I2C master sends a chip address. This address is seven bits long followed by an eighth
bit which is a data direction bit (R/W). The LM27964 address
is 36h. For the eighth bit, a “0” indicates a WRITE and a “1”
LM27964
BankB is a fixed 10kHz (LM27964SQ-I) or 23kHz
(LM27964SQ-C) depending on the option.
The DKEY current sink uses an analog current scaling
method to control LED brightness. The brightness levels are
100% (Fullscale), 70%, 40%, and 20%. When connecting
multiple LEDs in parallel to the DKEY current sink, it is recommended that ballast resistors be placed in series with the
LEDs. The ballast resistors help reduce the affect of LED forward voltage mismatch, and help equalize the diode currents.
Ballast resistor values must be carefully chosen to ensure that
the current source headroom voltage is sufficient to supply
the desired current.
Please refer to the I2C Compatible Interface section of this
datasheet for detailed instructions on how to adjust the brightness control registers.
MAXIMUM OUTPUT CURRENT, MAXIMUM LED
VOLTAGE, MINIMUM INPUT VOLTAGE
The LM27964 can drive 4 LEDs at 30mA each (BankA) and
12 keypad LEDs at 5mA each (60mA total at DKEY) from an
input voltage as low as 3.2V, so long as the LEDs have a
forward voltage of 3.6V or less (room temperature).
The statement above is a simple example of the LED drive
capabilities of the LM27964. The statement contains the key
application parameters that are required to validate an LEDdrive design using the LM27964: LED current (ILEDx), number
of active LEDs (Nx), LED forward voltage (VLED), and minimum input voltage (VIN-MIN).
The equation below can be used to estimate the maximum
output current capability of the LM27964:
20138104
FIGURE 8. Brightness Control Register Example
20138110
FIGURE 9. Internal Hex Address: B0h
ILED_MAX = [(1.5 x VIN) - VLED - (IADDITIONAL × ROUT)] /
[(Nx x ROUT) + kHRx] (eq. 1)
Note: DKEY1-DKEY0: Sets Brightness for DKEY pin (KEYPAD Driver).
11=Fullscale
Bit7 to Bit 2: Not Used
Full-Scale Current set externally by the following equation:
IDKEY = 800 × 1.25V / RSETx
Brightness Level are= 100% (Fullscale), 70%, 40%, 20%
ILED_MAX = [(1.5 x VIN ) - VLED - (IADDITIONAL × 2.75Ω)] /
[(Nx x 2.75Ω) + kHRx]
IADDITIONAL is the additional current that could be delivered to
the other LED banks.
ROUT – Output resistance. This parameter models the internal
losses of the charge pump that result in voltage droop at the
pump output POUT. Since the magnitude of the voltage droop
is proportional to the total output current of the charge pump,
the loss parameter is modeled as a resistance. The output
resistance of the LM27964 is typically 2.75Ω (VIN = 3.6V, TA
= 25°C). In equation form:
Application Information
SETTING LED CURRENT
The current through the LEDs connected to DxA, DxB and
DKEY can be set to a desired level simply by connecting an
appropriately sized resistor (RSETx) between the ISETx pin of
the LM27964 and GND. The DxA and DxB LED currents are
proportional to the current that flows out of the ISETA and
ISETB pins and are a factor of 200 times greater than the ISETA/
B currents. The DKEY current is proportional to the current
that flows out of the ISETK pin and is a factor of 800 times
greater than the ISETK current. The feedback loops of the internal amplifiers set the voltage of the ISETx pins to 1.25V
(typ.). Separate RSETx resistor should be used on each ISETx
pin. The statements above are simplified in the equations below:
VPOUT = (1.5 × VIN) – [(NA× ILEDA + NB × ILEDB + NK ×
ILEDK) × ROUT]
(eq. 2)
kHR – Headroom constant. This parameter models the minimum voltage required to be present across the current
sources for them to regulate properly. This minimum voltage
is proportional to the programmed LED current, so the constant has units of mV/mA. The typical kHR of the LM27964 is
12mV/mA. In equation form:
(VPOUT – VLEDx) > kHRx × ILEDx
IDxA/B = 200 × (VISET / RSETA/B)
RSETA/B = 200 × (1.25V / IDxA/B)
IDKEY = 800 × (VISET / RSETK)
RSETK = 800 × (1.25V / IDKEY)
Once the desired RSETx values have been chosen, the
LM27964 has the ability to internally dim the LEDs by Pulse
Width Modulating (PWM) the current. The PWM duty cycle is
set through the I2C compatible interface. LEDs connected to
BankA and BankB current sinks (DxA and DxB) can be
dimmed to 16 different levels/duty-cycles (1/16th of full-scale
to full-scale). The internal PWM frequency for BankA and
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(eq. 3)
Typical Headroom Constant Values
kHRA = 12mV/mA
kHRB = 12 mV/mA
kHRK = 3 mV/mA
The "ILED-MAX" equation (eq. 1) is obtained from combining the
ROUT equation (eq. 2) with the kHRx equation (eq. 3) and solving for ILEDx. Maximum LED current is highly dependent on
minimum input voltage and LED forward voltage. Output current capability can be increased by raising the minimum input
voltage of the application, or by selecting an LED with a lower
10
It is also worth noting that efficiency as defined here is in part
dependent on LED voltage. Variation in LED voltage does not
affect power consumed by the circuit and typically does not
relate to the brightness of the LED. For an advanced analysis,
it is recommended that power consumed by the circuit (VIN x
IIN) be evaluated rather than power efficiency.
Total Output Current Capability
The maximum output current that can be drawn from the
LM27964 is 180mA. Each driver bank has a maximum allotted
current per Dxx sink that must not be exceeded.
DRIVER TYPE
MAXIMUM Dxx CURRENT
DxA
30mA per DxA Pin
DxB
30mA per DxB Pin
DKEY
80mA
POWER DISSIPATION
The power dissipation (PDISS) and junction temperature (TJ)
can be approximated with the equations below. PIN is the
power generated by the 1.5x/1x charge pump, PLED is the
power consumed by the LEDs, TA is the ambient temperature,
and θJA is the junction-to-ambient thermal resistance for the
LLP-24 package. VIN is the input voltage to the LM27964,
VLED is the nominal LED forward voltage, N is the number of
LEDs and ILED is the programmed LED current.
The 180mA load can be distributed in many different configurations. Special care must be taken when running the
LM27964 at the maximum output current to ensure proper
functionality.
PDISS = PIN - PLEDA - PLEDB - PLEDK
PARALLEL CONNECTED OUTPUTS
Outputs D1A-4A or D1B-D2B may be connected together to
drive one or two LEDs at higher currents. In such a configuration, all four parallel current sinks (BankA) of equal value
can drive a single LED. The LED current programmed for
BankA should be chosen so that the current through each of
the outputs is programmed to 25% of the total desired LED
current. For example, if 60mA is the desired drive current for
a single LED, RSETA should be selected such that the current
through each of the current sink inputs is 15mA. Similarly, if
two LEDs are to be driven by pairing up the D1A-4A inputs
(i.e D1A-2A, D3A-4A), RSETA should be selected such that the
current through each current sink input is 50% of the desired
LED current. The same RSETx selection guidelines apply to
BankB diodes.
Connecting the outputs in parallel does not affect internal operation of the LM27964 and has no impact on the Electrical
Characteristics and limits previously presented. The available
diode output current, maximum diode voltage, and all other
specifications provided in the Electrical Characteristics table
apply to this parallel output configuration, just as they do to
the standard 4-LED application circuit.
Both BankA and BankB utilize LED forward voltage sensing
circuitry on each Dxx pin to optimize the charge-pump gain
for maximum efficiency. Due to the nature of the sensing circuitry, it is not recommended to leave any of the DxA or DxB
pins unused if either diode bank is going to be used during
normal operation. Leaving DxA and/or DxB pins unconnected
will force the charge-pump into 3/2× mode over the entire
VIN range negating any efficiency gain that could be achieve
by switching to 1× mode at higher input voltages.
Care must be taken when selecting the proper RSETx value.
The current on any Dxx pin must not exceed the maximum
current rating for any given current sink pin.
PDISS= (GAIN × VIN × ILEDA + LEDB + LEDK) - (VLEDA × NA ×
ILEDA) (VLEDB × NB × ILEDB) - (VLEDK × NK × ILEDK)
TJ = TA + (PDISS x θJA)
The junction temperature rating takes precedence over the
ambient temperature rating. The LM27964 may be operated
outside the ambient temperature rating, so long as the junction temperature of the device does not exceed the maximum
operating rating of 100°C. The maximum ambient temperature rating must be derated in applications where high power
dissipation and/or poor thermal resistance causes the junction temperature to exceed 100°C.
THERMAL PROTECTION
Internal thermal protection circuitry disables the LM27964
when the junction temperature exceeds 170°C (typ.). This
feature protects the device from being damaged by high die
temperatures that might otherwise result from excessive power dissipation. The device will recover and operate normally
when the junction temperature falls below 165°C (typ.). It is
important that the board layout provide good thermal conduction to keep the junction temperature within the specified
operating ratings.
CAPACITOR SELECTION
The LM27964 requires 4 external capacitors for proper operation (C1 = C2 = 1µF, CIN = COUT = 2.2µF). Surface-mount
multi-layer ceramic capacitors are recommended. These capacitors are small, inexpensive and have very low equivalent
series resistance (ESR <20mΩ typ.). Tantalum capacitors,
OS-CON capacitors, and aluminum electrolytic capacitors are
not recommended for use with the LM27964 due to their high
ESR, as compared to ceramic capacitors.
For most applications, ceramic capacitors with X7R or X5R
temperature characteristic are preferred for use with the
LM27964. These capacitors have tight capacitance tolerance
(as good as ±10%) and hold their value over temperature
(X7R: ±15% over -55°C to 125°C; X5R: ±15% over -55°C to
85°C).
Capacitors with Y5V or Z5U temperature characteristic are
generally not recommended for use with the LM27964. Capacitors with these temperature characteristics typically have
wide capacitance tolerance (+80%, -20%) and vary significantly over temperature (Y5V: +22%, -82% over -30°C to
+85°C range; Z5U: +22%, -56% over +10°C to +85°C range).
Under some conditions, a nominal 1µF Y5V or Z5U capacitor
could have a capacitance of only 0.1µF. Such detrimental deviation is likely to cause Y5V and Z5U capacitors to fail to
POWER EFFICIENCY
Efficiency of LED drivers is commonly taken to be the ratio of
power consumed by the LEDs (PLED) to the power drawn at
the input of the part (PIN). With a 1.5x/1x charge pump, the
input current is equal to the charge pump gain times the output
current (total LED current). The efficiency of the LM27964 can
be predicted as follows:
PLEDTOTAL = (VLEDA × NA × ILEDA) +
(VLEDB × NB × ILEDB) + (VLEDK × NK × ILEDK)
PIN = VIN × IIN
PIN = VIN × (GAIN × ILEDTOTAL + IQ)
E = (PLEDTOTAL ÷ PIN)
11
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LM27964
forward voltage. Excessive power dissipation may also limit
output current capability of an application.
LM27964
meet the minimum capacitance requirements of the
LM27964.
The minimum voltage rating acceptable for all capacitors is
6.3V. The recommended voltage rating of the output capacitor is 10V to account for DC bias capacitance losses.
measuring 2.6mm x 2.5mm. The main advantage of this exposed DAP is to offer lower thermal resistance when it is
soldered to the thermal land on the PCB. For PCB layout,
National highly recommends a 1:1 ratio between the package
and the PCB thermal land. To further enhance thermal conductivity, the PCB thermal land may include vias to a ground
plane. For more detailed instructions on mounting LLP packages, please refer to National Semiconductor Application
Note AN-1187.
PCB LAYOUT CONSIDERATIONS
The LLP is a leadframe based Chip Scale Package (CSP)
with very good thermal properties. This package has an exposed DAP (die attach pad) at the center of the package
www.national.com
12
LM27964
Physical Dimensions inches (millimeters) unless otherwise noted
SQA24: 24 Lead LLP
X1 = 4.0mm
X2 = 4.0mm
X3 = 0.8mm
13
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LM27964 White LED Driver System with I2C Compatible Brightness Control
Notes
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Copyright© 2007 National Semiconductor Corporation
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