NSC LP5524

LP5524
Parallel LED Driver with PWM Brightness Control in Micro
SMD Package
General Description
Features
The LP5524 is a highly integrated dual-zone LED driver that
can drive up to four LEDs in parallel with a total output current
of 100mA. Regulated high side internal current sources deliver excellent current and brightness matching in all LEDs.
LED driver current sources are split into two independently
controlled banks for driving secondary displays, keypad and
indicator LEDs. Brightness control is achieved by applying
PWM signals to each enable pin. Default LED current is factory-programmable and an optional external resistor can be
used to set LED current to user programmable values.
LP5524 is available in National’s tiny 9-bump thin micro SMD
package.
■ High side LED driver
■ Drives 4 LEDs with Up to 25mA per LED
■ Ultra-Small Solution Size:
■
■
■
■
— No External Components
— Micro SMD-9 Package with 0.4 mm pitch:
1.215mm x 1.215mm x 0.6mm (LxWxH)
0.4% Typical Current Matching
PWM Brightness Control
Over-Current Protection
Wide Input Voltage Range: 2.7V to 5.5V
Applications
■ Sub display Backlight
■ Keypad LED Backlight
■ Indicator LED
Typical Application
30007601
© 2007 National Semiconductor Corporation
300076
www.national.com
LP5524 Parallel LED Driver with PWM Brightness Control in Micro SMD Package
July 2007
LP5524
Connection Diagrams and Package Mark Information
Connection Diagrams
Micro SMD-9 package, 1.215 x 1.215 x 0.60 mm body size, 0.4 mm pitch NS Package Number TMD09AAA
30007603
30007602
Bottom View
Top View
PACKAGE MARK
30007604
ORDERING INFORMATION
Order Number
Default LED Current
(Note 1)
Package Marking
Supplied As
Spec/Flow
LP5524TM-5
5 mA
LP5524TMX-5
5 mA
V2
TNR 250
NOPB
V2
TNR 3000
NOPB
Note 1: Other current options are available upon request, please contact the National Semiconductor Sales Office.
PIN DESCRIPTIONS
Pin
Name
Type
A1
ISET
AI
Current set input
Description
A2
ENB
DI
Enable for bank B
A3
ENA
DI
Enable for bank A
B1
D1B
AO
Current source output, bank B LED1
B2
VIN
P
Power supply pin
B3
D1A
AO
Current source output, bank A LED1
C1
D2B
AO
Current source output, bank B LED2
C2
GND
G
C3
D2A
AO
Ground
Current source output, bank A LED2
A: Analog Pin D: Digital Pin G: Ground Pin P: Power Pin
I: Input Pin O: Output Pin
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2
(Notes 2, 3)
Voltage on power pin (VIN)
2.7V to 5.5V
Junction Temperature (TJ) Range
-40°C to +125°C
Ambient Temperature (TA) Range
-40°C to +85°C
(Note 7)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
V (VIN, DX, ISET)
Voltage on logic pins (ENA, ENB)
Continuous Power Dissipation
(Note 4)
Junction Temperature (TJ-MAX)
Storage Temperature Range
Maximum Lead Temperature
(Reflow soldering, 3 times)
ESD Rating (Note 6)
Human Body Model
-0.3V to +6.0V
-0.3V to +6.0V
Internally Limited
Thermal Properties
Junction-to-Ambient Thermal
Resistance (θJA),
TMD09 Package (Note 8)
125°C
-65°C to +150°C
(Note 5)
80 - 125°C/W
2 kV
Electrical Characteristics
(Notes 3, 9)
Limits in standard typeface are for TJ = 25°C. Limits in boldface type apply over the operating ambient temperature range (-40°C
< TA < +85°C). Unless otherwise noted, specifications apply to the LP5524 Block Diagram with: VIN = 3.6V, RISET = 32.4 kΩ, CIN
= 100 nF.
Symbol
IVIN
Typ
Max
Units
Shutdown Supply Current
Parameter
ENA = ENB = 0V
Condition
Min
0.2
1
µA
Active Mode Supply Current
ENA = ENB = H, ISET = open
170
210
µA
IDX
Recommended LED Current
25
mA
IOUT
LED Output Current Accuracy
IDX = 5mA, VDX = VIN - 0.2V
ISET = open
3
0.5
5
%
LED Output Current Accuracy
IDX = 15.9mA, VDX = VIN - 0.2V
0.5
4
%
IMATCH
LED Current Matching (Note 10)
IDX = 15.9mA
0.4
2.5
ΔIDX%/ΔVIN
Line Regulation
ΔIDX%/ΔVDX
Load Regulation
VHR
Minimum Headroom Voltage
(VIN - VDX)(Note 11)
%
1
%/V
VDX < VIN - 0.2V
0.4
%/V
IDX set to 5 mA
10
IDX set to 15 mA
30
IMIRROR
External RISET to LED
Current Mirroring Ratio
1:416
VISET
ISET Reference Voltage
1.237
IISET
ISET Pin Current Range
tPWM MIN
Recommended Minimum
On Time For PWM Signal
VIL
Logic Input Low Level
VIH
Logic Input High Level
IIN
CTRL Input Current
ENA / ENB = 1.2V
tSD
Shutdown Delay Time
Delay from ENA and ENB = low to
IDX = 0.1 x IDX nom
2.5
mV
mV
75
V
62.5
µA
μs
33
0.4
V
1.2
1.9
µA
20
25
µs
V
1.2
Note 2: Absolute Maximum Ratings indicate limits beyond which damage to the component may occur. Operating Ratings are conditions under which operation
of the device is guaranteed. Operating Ratings do not imply guaranteed performance limits. For guaranteed performance limits and associated test conditions,
see the Electrical Characteristics tables.
Note 3: All voltages are with respect to the potential at the GND pin.
Note 4: Internal thermal shutdown circuitry protects the device from permanent damage. Thermal shutdown engages at TJ=160°C (typ.) and disengages at
TJ=140°C (typ.).
Note 5: For detailed soldering specifications and information, please refer to National Semiconductor Application Note AN1112 : Micro SMD Wafer Level Chip
Scale Package.
Note 6: The Human body model is a 100 pF capacitor discharged through a 1.5 kΩ resistor into each pin. MIL-STD-883 3015.7
Note 7: In applications where high power dissipation and/or poor package thermal resistance is present, the maximum ambient temperature may have to be
derated. Maximum ambient temperature (TA-MAX) is dependent on the maximum operating junction temperature (TJ-MAX-OP = 125°C), the maximum power
dissipation of the device in the application (PD-MAX), and the junction-to ambient thermal resistance of the part/package in the application (θJA), as given by the
following equation: TA-MAX = TJ-MAX-OP – (θJA × PD-MAX).
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LP5524
Operating Ratings
Absolute Maximum Ratings (Notes 2, 3)
LP5524
Note 8: .Junction-to-ambient thermal resistance is highly application and board-layout dependent. In applications where high maximum power dissipation exists,
special care must be paid to thermal dissipation issues in board design.
Note 9: Min and Max limits are guaranteed by design, test, or statistical analysis. Typical numbers are not guaranteed, but do represent the most likely norm.
Note 10: Matching is the maximum difference from the average.
Note 11: The current source is connected internally between VIN an VDX. The voltage across the current source, (VIN - VDX), is referred to a Headroom Voltage
(VHR). Minimum Headroom Voltage is defined as the VHR voltage when the LED current has dropped 20% from the value measured at VDX = VIN - 1V.
LP5524 Block Diagram
30007636
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TJ = 25°C. Unless otherwise noted, typical performance characteristics apply to the LP5524 Block Diagram with: VIN = 3.6V,
RISET = 32.4 kΩ, CIN = 100 nF.
Output Current vs RISET (Expanded Range)
Output Current vs RISET
30007622
30007623
Output Current vs Input Voltage
(ISET Connected To VDD)
Output Current vs Headroom Voltage
30007625
30007624
PWM Responce (Both Channels)
PWM Response (Single Channel)
30007629
30007627
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LP5524
LED Driver Typical Performance Characteristics
LP5524
For linear brightness control over the full duty cycle adjustment range, the LP5524 uses a special turn–off time delay to
compensate the turn–on time of the device.
If the PWM frequency is much less than 100Hz, flicker may
be seen in the LEDs. For the LP5524, zero duty cycle will turn
off the LEDs and a 50% duty cycle will result in an average
IDX being half of the programmed LED current. For example,
if RISET is set to program LED current to 15 mA, a 50% duty
cycle will result in an average IDX of 7.5mA.
Application Information
ENABLE MODE
The LP5524 has four constant current LED outputs which are
split into two independently controlled banks. Each bank has
its own enable input. ENA is used to control bank A and ENB
is used to control bank B. Both enables are active high and
have internal pull–down resistors. When both enables are low
part is in low power standby mode. Driving either enable high
will activate the part and corresponding LED outputs.
LED HEADROOM VOLTAGE
A single current source is connected internally between VIN
and DX outputs (D1A, D2A, D1B and D2B). The voltage
across the current source, (VIN – VDX), is referred to as headroom voltage (VHR). The current source requires a sufficient
amount of headroom voltage to be present across it in order
to regulate properly.
FigureOutput Current vs Headroom Voltage shows how output current of the LP5524 varies with respect to headroom
voltage. On the flat part of the graph, the current is regulated
properly as there is sufficient headroom voltage for regulation.
On the sloping part of the graph the headroom voltage is too
small, the current source is squeezed, and the current drive
capability is limited. Thus, operating the LP5524 with insufficient headroom voltage across the current source should be
avoided.
ISET PIN
An external resistor (RISET) connected to ISET pin sets the
output current of all the LEDs. The internal current mirror sets
the LEDs output current with a 416:1 ratio to the current
through RISET. The following equation approximates the LED
current:
IDX = 515 / RISET (Amps)
The use of RISET is optional. If RISET is not used ISET pin can
be left floating or connected to VIN. In these cases LED current
is set to default current.
PWM BRIGHTNESS CONTROL
The brightness of LEDs can be linearly varied from zero up to
the maximum programmed current level by applying a Pulse–
Width–Modulated signal to the ENx pin of the LP5524. The
following procedures illustrate how to program the LED drive
current and adjust the output current level using a PWM signal.
1. Determine the maximum desired LED current. Use the
IDX equation to calculate RISET.
2. Brightness control can be implemented by pulsing a
signal at the ENx pin. LED brightness is proportional to
the duty cycle (D) of the PWM signal.
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LED OUTPUTS
If more than 25 mA of output current is required LED outputs
can be connected parallel. Connecting LED outputs of different group parallel generates a simply two stage brightness
control. With IDX set to 25 mA, enabling one group sets the
LED current to 25 mA. Enabling second bank increases the
LED current to 50 mA. Unused LED outputs can be left floating or tied to VIN.
6
sistor is required. Accuracy of the resistor directly effects to
the accuracy of the LED current. 1% or better is recommended.
INPUT CAPACITOR, CIN
Although not required for normal operation, a capacitor can
be added to VIN to reduce line noise. A surface-mount multilayer ceramic capacitor (MLCC) is recommended. MLCCs
with a X7R or X5R temperature characteristic are preferred.
LED
Forward voltage of LED must be less than minimum input
voltage minus minimum headroom voltage (VHR). For example with 2.7V input voltage and 20 mA LED current the maximum LED forward voltage is 2.7V - 100 mV = 2.6V.
CURRENT SET RESISTOR, RISET
If other than 5 mA current is required, RISET resistor can be
used to adjust the current. For 15.9 mA current 32.4 kΩ re-
List of Recommended External Components
Symbol
Symbol Explanation
Value
Unit
Type
CIN
VDD Bypass Capacitor
100
nF
Ceramic, X7R or X5R
RISET
Current Set Resistor for 15.9 mA LED Current 32.4
kΩ
1%
LEDs
User defined
Recommended E96 Series (1% Tolerance) Current Set Resistors
RISET (kΩ)
IDX (mA)
RISET (kΩ)
IDX (mA)
169
3.0
34.0
15.1
127
4.1
32.4
15.9
102
5.0
30.1
17.1
84.5
6.1
28.7
17.9
73.2
7.0
26.7
19.3
64.9
7.9
25.5
20.2
56.2
9.2
24.3
21.2
51.1
10.1
23.2
22.2
46.4
11.1
22.1
23.3
42.2
12.2
21.5
24.0
39.2
13.1
20.5
25.1
36.5
14.1
IDX = 515 / RISET (Amps)
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LP5524
Recommended External Components
LP5524
Physical Dimensions inches (millimeters) unless otherwise noted
The dimension for X1, X2 and X3 are as given:
— X1 = 1.215 mm ±0.03 mm
— X2 = 1.215 mm ±0.03 mm
— X3 = 0.60 mm ±0.075 mm
NS Package Number TMD09AAA
microSMD-9
See National Semiconductor Application Note 1112 Micro SMD Wafer Level Chip Scale Package for PCB design and assembly
instructions.
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LP5524
Notes
9
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LP5524 Parallel LED Driver with PWM Brightness Control in Micro SMD Package
Notes
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