RICHTEK RT9712

®
RT9712
90mΩ
Ω, 1A/1.5A High-Side Dual Power Switches with Flag
General Description
Features
The RT9712 power-distribution switches are designed to
fulfill the applications in heavy capacitive loads and shortcircuit situations. The device incorporates two 90mΩ NMOSFET power switches to fit power distribution systems
requiring multiple power switches in a single package.
During switching process, an internal charge pump is
designed to provide the gate drive for the purpose of powerswitch rise times and fall times controlling to minimize
the current surges. The charge pump can operate in supply
voltage as low as 2.7V and needs no external
components.
z
If the output load exceeds the current-limit threshold or a
short-circuit occurs.The RT9712 series pull the overcurrent
(FLGx) logic output low by switching into the constantcurrent mode to maintain the output current in a safe level,
A thermal protection circuit turns off the switch to prevent
the device from damage when power dissipation is
increased by continuous heavy overloads and short-circuits
in the switch and finally cause the rise of the junction
temperature. The device automatically recovers when it
has sufficiently cooled down. The RT9712A/B are designed
for the current limit at typically 2A and RT9712C/D are
designed for the current limit at typically 1.5A. Internal
circuitry controls the switch to remain off until valid input
voltage is presented.
Pin Configurations
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z
z
z
z
z
z
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Applications
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USB Peripherals
Notebook PCs
Ordering Information
RT9712
Package Type
S : SOP-8
F : MSOP-8
Lead Plating System
G : Green (Halogen Free and Pb Free)
Output Current/ENx Function
A : 1.5A/Active High
B : 1.5A/Active Low
C : 1A/Active High
D : 1A/Active Low
Richtek products are :
8
FLG1
VIN
2
7
VOUT1
EN1
3
6
VOUT2
EN2
4
5
FLG2
RT9712A/C
GND
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Note :
(TOP VIEW)
GND
z
90mΩ
Ω N-MOSFET Switch
Operating Voltage Range : 2.7V to 5.5V
Reverse Blocking Current
Under Voltage Lockout
Deglitched Fault Report (FLGx)
Thermal Protection with Foldback
Over Current Protection
Short Circuit Protection
UL Approved−E219878
Nemko Approved-NO49352
RoHS Compliant and Halogen Free
`
RoHS compliant and compatible with the current requirements of IPC/JEDEC J-STD-020.
`
Suitable for use in SnPb or Pb-free soldering processes.
Marking Information
8
FLG1
VIN
2
7
VOUT1
EN1
3
6
VOUT2
EN2
4
5
FLG2
For marking information, contact our sales representative
directly or through a Richtek distributor located in your
area.
RT9712B/D
SOP-8/MSOP-8
Copyright © 2012 Richtek Technology Corporation. All rights reserved.
DS9712-04
November 2012
is a registered trademark of Richtek Technology Corporation.
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1
RT9712
Typical Application Circuit
RT9712A/B/C/D
Supply Voltage
2.7V to 5.5V
2
R1
RT9712B/D
Chip Enable
R2
VIN
CIN
0.1uF
8 FLG1
5 FLG2
RT9712A/C
Chip Enable
VOUT1
Load
COUT1
0.1uF
22uF
VOUT2 6
3 EN1/EN1
4 EN2/EN2
7
GND
1
Load
COUT2
0.1uF
22uF
Note : R1, R2 : Pull-Up Resistance (10k to 100k)
Functional Pin Description
Pin No.
RT9712A/C RT9712B/D
Pin Name
Pin Function
1
1
GND
Ground.
2
2
VIN
Input Voltage.
--
3
EN1
Chip Enable (Active Low) turns on power switch in VOUT1.
--
4
EN2
Chip Enable (Active Low) turns on power switch in VOUT2.
3
--
EN1
Chip Enable (Active High) turns on power switch in VOUT1.
4
--
EN2
Chip Enable (Active High) turns on power switch in VOUT2.
5
5
FLG2
Over current or over temperature status output, open-drain output, active
6
6
VOUT2
Power-Switch Output, in VOUT2.
7
7
VOUT1
Power-Switch Output, in VOUT1.
8
8
FLG1
Over current or over temperature status output,, open-drain output, active
low, in VOUT2.
low, in VOUT1.
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is a registered trademark of Richtek Technology Corporation.
DS9712-04
November 2012
RT9712
Function Block Diagram
EN1/EN1
Bias
Current
Limiting
Oscillator
Charge
Pump
Gate
Control
Output Voltage
Detection
Thermal
Protection
VOUT1
FLG1
Delay
VIN
EN2/EN2
Bias
Oscillator
UVLO
Charge
Pump
Current
Limiting
Gate
Control
Output Voltage
Detection
GND
Copyright © 2012 Richtek Technology Corporation. All rights reserved.
DS9712-04
November 2012
VOUT2
FLG2
Delay
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3
RT9712
Absolute Maximum Ratings
z
z
z
z
z
z
z
z
(Note 1)
Supply Input Voltage, VIN ------------------------------------------------------------------------------------------- 6V
EN Voltage -------------------------------------------------------------------------------------------------------------- −0.3V to 6V
Power Dissipation, PD @ TA = 25°C
SOP-8/MSOP-8 ------------------------------------------------------------------------------------------------------- 469mW
Package Thermal Resistance (Note 2)
SOP-8/MSOP-8, θJA -------------------------------------------------------------------------------------------------- 160°C/W
Junction Temperature ------------------------------------------------------------------------------------------------- 150°C
Lead Temperature (Soldering, 10 sec.) --------------------------------------------------------------------------- 260°C
Storage Temperature Range ---------------------------------------------------------------------------------------- −65°C to 150°C
ESD Susceptibility (Note 3)
HBM (Human Body Model) ------------------------------------------------------------------------------------------ 2kV
Recommended Operating Conditions
z
z
z
z
(Note 4)
Supply Input Voltage, VIN ------------------------------------------------------------------------------------------- 2.7V to 5.5V
EN Voltage -------------------------------------------------------------------------------------------------------------- 0V to 5.5V
Junction Temperature Range ---------------------------------------------------------------------------------------- −40°C to 100°C
Ambient Temperature Range ---------------------------------------------------------------------------------------- −40°C to 85°C
Electrical Characteristics
(VIN = 5V, CIN = 1μF, COUT1 = COUT2 = 10μF, TA = 25°C, unless otherwise specified)
Parameter
Symbol
Test Conditions
Min
Typ
Max
Unit
Input Quiescent Current
IQ
Switch On, RLOAD Open
--
70
90
Input Shutdown Current
ISHDN
Switch Off, RLOAD Open
--
0.1
1
---
90
110
mΩ
RDS(ON)
IOUTx = 1.3A, VIN = 5V,
Each Channel
IOUTx = 1A, VIN = 5V,
Each Channel
--
90
110
mΩ
1.5
2
2.8
1.1
1.5
2.1
RT9712A/B
Switch On
Resistance
RT9712C/D
RT9712A/B
Current Limit
μA
ILIM
VOUTx = 4V
ISC_FB
VOUTx = 0, Measured Prior to
Thermal Shutdown
--
1.4
--
--
1
--
VIN = 2.7V to 5.5V
--
--
0.8
Logic-High Voltage VIH
IENx/ENx
ENx/ENx Input Current
VIN = 2.7V to 5.5V
VENx/ENx = 0V to 5.5V
2
--
--
--
0.01
0.1
μA
Output Leakage Current
ILEAKAGE
VENx = 0V, VENx = 5V, RLOAD = 0Ω
-
0.5
1
μA
Output Turn-On Rising Time
TON_RISE
10% to 90% of VOUT Rising
--
175
--
μs
FLGx Output Resistance
RFLG
ISINK = 1mA
--
20
--
Ω
FLGx Off Current
IFLG_OFF
VFLGx = 5V
--
0.01
1
μA
FLGx Delay Time
TD
From Fault Condition to FLG
Assertion
5
12
20
ms
RT9712C/D
Short Circuit
Fold-back
Current
RT9712A/B
ENx/ENx
Threshold
Logic-Low Voltage VIL
RT9712C/D
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A
A
V
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DS9712-04
November 2012
RT9712
Parameter
Shutdown Auto-discharge
Resistance
R Discharge
VENx = 0V, VENx = 5V
Under Voltage Lockout
VUVLO
Under Voltage Hysteresis
Thermal Shutdown Protection
Thermal Shutdown Protection
Symbol
Test Conditions
Min
Typ
Max
Unit
--
100
150
Ω
VIN Increasing
1.3
1.7
--
V
ΔVUVLO
VIN Decreasing
--
0.1
--
V
TSD
VOUTx > 1V
--
120
--
°C
VOUTx < 1V
--
100
--
°C
--
20
--
°C
Thermal Shutdown Hysteresis
Note 1. Stresses beyond those listed “Absolute Maximum Ratings” may cause permanent damage to the device. These are
stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the
operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions may affect
device reliability.
Note 2. θJA is measured at TA = 25°C on a low effective thermal conductivity single-layer test board per JEDEC 51-3.
Note 3. Devices are ESD sensitive. Handling precaution is recommended.
Note 4. The device is not guaranteed to function outside its operating conditions.
Copyright © 2012 Richtek Technology Corporation. All rights reserved.
DS9712-04
November 2012
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RT9712
Typical Operating Characteristics
On Resistance vs. Input Voltage
On Resistance vs. Temperature
96
120
115
110
On Resistance (mΩ)
On Resistance (mΩ)
95
94
93
92
105
100
95
90
85
80
91
75
IOUT = 1.4A
90
VIN = 5V, IOUT = 1.4A
70
2.5
3
3.5
4
4.5
5
5.5
-40
-20
0
Input Voltage (V)
47.5
47.5
45.0
45.0
42.5
40.0
37.5
35.0
32.5
30.0
27.5
25.0
No Load
20.0
2.5
3
3.5
4
4.5
5
35.0
32.5
30.0
27.5
25.0
22.5
VIN = 5V, No Load
20.0
-40
5.5
-20
0
Shutdown Current (µA)
Shutdown Current (µA)
0.25
0.20
0.15
0.10
0.05
No Load
4.5
5
Input Voltage (V)
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6
40
60
80
100
Shutdown Current vs. Temperature
0.9
4
20
Temperature (°C)
1
3.5
100
37.5
Shutdown Current vs. Input Voltage
3
80
40.0
0.30
2.5
60
42.5
Input Voltage (V)
0.00
40
Quiescent Current vs. Temperature
50.0
Quiescent Current (µA)
Quiescent Current (µA)
Quiescent Current vs. Input Voltage
50.0
22.5
20
Temperature (°C)
5.5
VIN = 5V
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
-40
-20
0
20
40
60
80
100
Temperature (°C)
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RT9712
Output Voltage vs. Output Current
UVLO Threshold vs. Temperature
6
VIN = 5V
UVLO Threshold (V)
Output Voltage (V)
5
2.0
4
3
VIN = 2.7V
2
1
0
1.8
Rising
1.6
Falling
1.4
1.2
1.0
0.2
0.4
0.6
0.8
1
1.2
1.4
1.6
1.8
2
2.2
-40
-20
0
Output Current (A)
1.9
1.4
1.8
1.7
60
80
100
1.3
1.2
1.1
1.6
1.0
1.5
2.5
3
3.5
4
4.5
5
2.5
5.5
3
3.5
4
4.5
5
5.5
Input Voltage (V)
Input Voltage (V)
Short Current vs. Temperature
Current Limit vs. Temperature
2.0
1.5
1.9
1.4
Short Current (A)
Current Limit (A)
40
Short Current vs. Input Voltage
1.5
Short Current (A)
Current Limit (A)
Current Limit vs. Input Voltage
2.0
1.8
1.7
1.3
1.2
1.1
1.6
VIN = 5V
1.5
-40
-20
0
20
40
60
80
Temperature (°C)
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DS9712-04
20
Temperature (°C)
November 2012
100
VIN = 5V
1.0
-40
-20
0
20
40
60
80
100
Temperature (°C)
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RT9712
FLG Delay Time vs. Input Voltage
FLG Delay Time vs. Temperature
15
14.0
13
FLG Delay Time (ms)
FLG Delay Time (ms)
14
12
11
10
9
8
7
13.6
13.2
12.8
12.4
6
5
VIN = 5V
12.0
2.5
3
3.5
4
4.5
5
5.5
-40
-20
0
20
40
60
Input Voltage (V)
Temperature (°C)
Power On from VIN
Power Off from VIN
VIN
(2V/Div)
VIN
(2V/Div)
VOUT
(2V/Div)
VOUT
(2V/Div)
No Load
Time (2.5ms/Div)
Power On from EN
FLG Response
VOUT
(500mV/Div)
EN1
(5V/Div)
EN1
(5V/Div)
FLGx
(5V/Div)
VIN = 5V, RLOAD = 2.7Ω
Time (100us/Div)
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100
No Load
Time (2.5ms/Div)
VOUT
(2V/Div)
IOUT
(500mA/Div)
80
I IN
(2A/Div)
VIN = 5V, RLOAD = 0.33Ω
Time (2.5ms/Div)
is a registered trademark of Richtek Technology Corporation.
DS9712-04
November 2012
RT9712
Applications Information
The RT9712A/B/C/D are dual N-MOSFET high-side power
switch with enable input, optimized for self-powered and
bus-powered Universal Serial Bus (USB) applications. The
RT9712 series are equipped with a charge pump circuitry
to drive the internal N-MOSFET switch; the switch's low
RDS(ON), 90mΩ, meets USB voltage drop requirements;
and a flag output is available to indicate fault conditions
to the local USB controller.
Input and Output
VIN (input) is the power source connection to the internal
circuitry and the drain of the MOSFET. VOUT (output) is
the source of the MOSFET. In a typical application, current
flows through the switch from VIN to VOUT toward the load.
If VOUT is greater than VIN, current will flow from VOUT to
VIN since the MOSFET is bidirectional when on.
Unlike a normal MOSFET, there is no parasitic body diode
between drain and source of the MOSFET, the RT9712A/
B/C/D prevents reverse current flow if VOUT is externally
forced to a higher voltage than VIN when the chip is disabled
(VEN < 0.8V or VEN > 2V).
D
S
S
D
Soft Start for Hot Plug-In Applications
In order to eliminate the upstream voltage droop caused
by the large inrush current during hot-plug events, the
“soft-start” feature effectively isolates the power source
from extremely large capacitive loads, satisfying the USB
voltage droop requirements.
Fault Flag
The RT9712 series provides a FLG signal pin which is an
N-Channel open drain MOSFET output. This open drain
output goes low when current limit or the die temperature
exceeds 120°C approximately. The FLG output is capable
of sinking a 10mA load to typically 200mV above ground.
The FLG pin requires a pull-up resistor, this resistor should
be large in value to reduce energy drain. A 100kΩ pull-up
resistor works well for most applications. In the case of
an over-current condition, FLG will be asserted only after
the flag response delay time, tD, has elapsed. This ensures
that FLG is asserted only upon valid over-current conditions
and that erroneous error reporting is eliminated.
For example, false over-current conditions may occur
during hot-plug events when extremely large capacitive
loads are connected and causes a high transient inrush
current that exceeds the current limit threshold. The FLG
response delay time tD is typically 12ms.
Under-Voltage Lockout
G
G
Normal MOSFET
RT9712A/B/C/D
Chip Enable Input
The switch will be disabled when the EN/EN pin is in a
logic low/high condition. During this condition, the internal
circuitry and MOSFET will be turned off, reducing the
supply current to 0.1μA typical. Floating the EN/EN may
cause unpredictable operation. EN should not be allowed
to go negative with respect to GND. The EN/EN pin may
be directly tied to VIN (GND) to keep the part on.
Copyright © 2012 Richtek Technology Corporation. All rights reserved.
DS9712-04
November 2012
Under-voltage lockout (UVLO) prevents the MOSFET
switch from turning on until the input voltage exceeds
approximately 1.7V. If input voltage drops below
approximately 1.3V, UVLO turns off the MOSFET switch.
Under-voltage detection functions only when the switch
is enabled.
Current Limit and Short-Circuit Protection
The current limit circuitry prevents damage to the MOSFET
switch and the hub downstream port. Besides, in order to
prevent the miss-trigger because of USB plug in and other
inrush current, the device allows load current greater than
current limit threshold (typically 1.5A for RT9712A/B and
1A for RT9712C/D) at a short time as shown in Figure 1.
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RT9712
When the load current reaches the trigger point (typically
3.5A for RT9712A/B and 2.8A for RT9712C/D) or short
circuit is applied to the output, the device will enter constant
current mode until the thermal shutdown occurs or the
fault is removed.
Output Voltage (V)
Trigger Point
Current Limit
Short Circuit
Fold-back Current
Output Current (A)
Figure 1. Current Limit
Self-Powered Hub power for the internal functions and
downstream ports does not come from the USB, although
the USB interface may draw up to 100mA from its
upstream connect to allow the interface to function when
the remainder of the hub is powered down. The hub must
be able to supply up to 500mA on all of its external
downstream ports. Please refer to Universal Serial
Specification Revision 2.0 for more details on designing
compliant USB hub and host systems.
Over-Current protection devices such as fuses and PTC
resistors (also called polyfuse or polyswitch) have slow
trip times, high on-resistance, and lack the necessary
circuitry for USB-required fault reporting.
The faster trip time of the RT9712A/B/C/D power
distribution allow designers to design hubs that can operate
through faults. The RT9712A/B/C/D provide low onresistance and internal fault-reporting circuitry to meet
voltage regulation and fault notification requirements.
Universal Serial Bus (USB) & Power Distribution
The goal of USB is to enable device from different vendors
to interoperate in an open architecture. USB features
include ease of use for the end user, a wide range of
workloads and applications, robustness, synergy with the
PC industry, and low-cost implementation. Benefits
include self-identifying peripherals, dynamically attachable
and reconfigurable peripherals, multiple connections
(support for concurrent operation of many devices), support
for as many as 127 physical devices, and compatibility
with PC Plug-and-Play architecture.
The Universal Serial Bus connects USB devices with a
USB host: each USB system has one USB host. USB
devices are classified either as hubs, which provide
additional attachment points to the USB, or as functions,
which provide capabilities to the system (for example, a
digital joystick). Hub devices are then classified as either
Bus-Power Hubs or Self-Powered Hubs.
Because the devices are also power switches, the designer
of self-powered hubs has the flexibility to turn off power to
output ports. Unlike a normal MOSFET, the devices have
controlled rise and fall times to provide the needed inrush
current limiting required for the bus-powered hub power
switch.
Supply Filter/Bypass Capacitor
A 0.1μF low-ESR ceramic capacitor from VIN to GND,
located at the device is strongly recommended to prevent
the input voltage drooping during hot-plug events. However,
higher capacitor values will further reduce the voltage droop
on the input. Furthermore, without the bypass capacitor,
an output short may cause sufficient ringing on the input
(from source lead inductance) to destroy the internal
control circuitry. The input transient must not exceed 6V
of the absolute maximum supply voltage even for a short
duration.
A Bus-Powered Hub draws all of the power to any internal
functions and downstream ports from the USB connector
power pins. The hub may draw up to 500mA from the
upstream device. External ports in a Bus-Powered Hub
can supply up to 100mA per port, with a maximum of four
external ports.
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November 2012
RT9712
Output Filter Capacitor
A low-ESR 150μF aluminum electrolytic or tantalum
between VOUT and GND is strongly recommended to meet
the 330mV maximum droop requirement in the hub VBUS
(Per USB 2.0, output ports must have a minimum 120μF
of low-ESR bulk capacitance per hub). Standard bypass
methods should be used to minimize inductance and
resistance between the bypass capacitor and the
downstream connector to reduce EMI and decouple voltage
droop caused when downstream cables are hot-insertion
transients. Ferrite beads in series with VBUS, the ground
line and the 0.1μF bypass capacitors at the power
connector pins are recommended for EMI and ESD
protection. The bypass capacitor itself should have a low
dissipation factor to allow decoupling at higher frequencies.
and the drop across the PCB and switch to be 100mV.
This basically leaves two variables in the equation: the
resistance of the switch and the resistance of the cable.
If the hub consumes the maximum current (II) of 500mA,
the maximum resistance of the cable is 90mΩ.
The resistance of the switch can be defined as follows :
RSWITCH = { 4.75V − 4.4V − [ 0.5A x ( 4 x 30mΩ + 2 x
90mΩ) ] − VPCB } ÷ ( 0.1A x NPORTS )
= (200mV − VPCB ) ÷ ( 0.1A x NPORTS )
If the voltage drop across the PCB is limited to 100mV,
the maximum resistance for the switch is 250mΩ for four
ports ganged together. The RT9712A/B/C/D, with its
maximum 100mΩ on-resistance over temperature can fit
the demand of this requirement.
Voltage Drop
The USB specification states a minimum port-output
voltage in two locations on the bus, 4.75V out of a SelfPowered Hub port and 4.40V out of a Bus-Powered Hub
port. As with the Self-Powered Hub, all resistive voltage
drops for the Bus-Powered Hub must be accounted for to
guarantee voltage regulation (see Figure 7-47 of Universal
Serial Specification Revision 2.0 ).
The following calculation determines VOUT (MIN) for multiple ports (NPORTS) ganged together through one switch (if
using one switch per port, NPORTS is equal to 1) :
Thermal Shutdown
Thermal protection limits power dissipation in the
RT9712A/B/C/D. When the operation junction temperature
exceeds 120°C (typ.), the OTP circuit starts the thermal
shutdown function and turns the pass element off. The
pass element turns on again after the junction temperature
cools to 80°C. The IC lowers its OTP trip level from 120°C
to 100°C when output short circuit occurs (VOUT < 1V) as
shown in Figure 2.
VOUT Short to GND
VOUT (MIN) = 4.75V − [ II x ( 4 x RCONN + 2 x RCABLE ) ] −
(0.1A x NPORTS x RSWITCH ) − VPCB
1V
VOUT
Where
RCONN = Resistance of connector contacts
IOUT
(two contacts per connector)
RCABLE = Resistance of upstream cable wires
(one 5V and one GND)
RSWITCH = Resistance of power switch
(90mΩ typical for RT9712A/B/C/D)
Thermal
Shutdown
120 °C 100 C
°
OTP Trip Point
100 °C
IC Temperature
80 °C
VPCB = PCB voltage drop
The USB specification defines the maximum resistance
per contact (RCONN) of the USB connector to be 30mΩ
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DS9712-04
November 2012
Figure 2. Short Circuit Thermal Folded Back Protection
when Output Short Circuit Occurs (Patent)
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RT9712
The junction temperature of the RT9712 series depend
on several factors such as the load, PCB layout, ambient
temperature and package type. The output pin of
RT9712A/B/C/D can deliver the current of up to 1.5A
(RT9712A/B), and 0.6A (RT9712C/D) respectively over the
full operating junction temperature range. However, the
maximum output current must be derated at higher
ambient temperature to ensure the junction temperature
does not exceed 100°C. With all possible conditions, the
junction temperature must be within the range specified
under operating conditions. Power dissipation can be
calculated based on the output current and the RDS(ON) of
switch as below.
The maximum power dissipation depends on the operating
ambient temperature for fixed T J(MAX) and thermal
resistance, θJA. The derating curve in Figure 3 allows the
designer to see the effect of rising ambient temperature
on the maximum power dissipation.
0.5
Maximum Power Dissipation (W)
Power Dissipation
PD = RDS(ON) x IOUT2
Although the devices are rated for 1.5A and 0.6A of output
current, but the application may limit the amount of output
current based on the total power dissipation and the
ambient temperature.
For continuous operation, do not exceed absolute
maximum operation junction temperature. The maximum
power dissipation depends on the thermal resistance of
IC package, PCB layout, the rate of surroundings airflow
and temperature difference between junction to ambient.
The maximum power dissipation can be calculated by
following formula :
PD(MAX) = ( TJ(MAX) − TA ) / θJA
Where T J(MAX) is the maximum operation junction
temperature 100°C, TA is the ambient temperature and
the θJA is the junction to ambient thermal resistance.
For recommended operating conditions specification,
where TJ(MAX) is the maximum junction temperature of the
die (100°C) and TA is the maximum ambient temperature.
The junction to ambient thermal resistance θJA is layout
dependent. For SOP-8 and MSOP-8 packages, the thermal
resistance θ JA is 160°C/W. The maximum power
dissipation at TA = 25°C can be calculated by following
formula :
PD(MAX) = (100°C − 25°C) / (160°C/W) = 0.469W for
SOP-8 and MSOP-8 packages
Copyright © 2012 Richtek Technology Corporation. All rights reserved.
www.richtek.com
12
Single
Layers
0.4
SOP-8/MSOP-8
0.3
0.2
0.1
0
0
10
20
30
40
50
60
70
80
90
100
Ambient Temperature (°C)
Figure 3. Derating Curve of Maximum Power Dissipation
Layout Consideration
For best performance of the RT9712 series, the following
guidelines must be strictly followed.
`
Input and output capacitors should be placed close to
the IC and connected to ground plane to reduce noise
coupling.
`
The GND should be connected to a strong ground plane
for heat sink.
`
Keep the main current traces as possible as short and
wide.
The input and output capacitors should
be placed as close as possible to the IC.
GND
C IN
GND
VIN
C OUT1
8
2
7
VOUT1
3
6
VOUT2
4
5
C OUT2
The main current trace should be as
possible as short and wide.
Figure 4. PCB Layout Guide
is a registered trademark of Richtek Technology Corporation.
DS9712-04
November 2012
RT9712
Outline Dimension
H
A
M
J
B
F
C
I
D
Dimensions In Millimeters
Dimensions In Inches
Symbol
Min
Max
Min
Max
A
4.801
5.004
0.189
0.197
B
3.810
3.988
0.150
0.157
C
1.346
1.753
0.053
0.069
D
0.330
0.508
0.013
0.020
F
1.194
1.346
0.047
0.053
H
0.170
0.254
0.007
0.010
I
0.050
0.254
0.002
0.010
J
5.791
6.200
0.228
0.244
M
0.400
1.270
0.016
0.050
8-Lead SOP Plastic Package
Copyright © 2012 Richtek Technology Corporation. All rights reserved.
DS9712-04
November 2012
is a registered trademark of Richtek Technology Corporation.
www.richtek.com
13
RT9712
D
L
E1
E
e
A2
A
A1
b
Symbol
Dimensions In Millimeters
Dimensions In Inches
Min
Max
Min
Max
A
0.810
1.100
0.032
0.043
A1
0.000
0.150
0.000
0.006
A2
0.750
0.950
0.030
0.037
b
0.220
0.380
0.009
0.015
D
2.900
3.100
0.114
0.122
e
0.650
0.026
E
4.800
5.000
0.189
0.197
E1
2.900
3.100
0.114
0.122
L
0.400
0.800
0.016
0.031
8-Lead MSOP Plastic Package
Richtek Technology Corporation
5F, No. 20, Taiyuen Street, Chupei City
Hsinchu, Taiwan, R.O.C.
Tel: (8863)5526789
Richtek products are sold by description only. Richtek reserves the right to change the circuitry and/or specifications without notice at any time. Customers should
obtain the latest relevant information and data sheets before placing orders and should verify that such information is current and complete. Richtek cannot
assume responsibility for use of any circuitry other than circuitry entirely embodied in a Richtek product. Information furnished by Richtek is believed to be
accurate and reliable. However, no responsibility is assumed by Richtek or its subsidiaries for its use; nor for any infringements of patents or other rights of third
parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Richtek or its subsidiaries.
www.richtek.com
14
DS9712-04
November 2012