PI74VCX16240 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 16-Bit Inverting Buffer/Driver with 3-State Outputs Product Features Product Description • The PI74VCX Family is designed for low voltage operation, VDD = 1.8V to 3.6V • 3.6V Tolerant Inputs and Outputs • Supports Live Insertion • Balanced Drive, ±24mA • Uses patented Noise Reduction Circuitry • Typical VOLP (Output Ground Bounce) <0.6V at VDD = 2.5V, TA = 25ºC • Typical VOHV (Output VOH Undershoot) < -0.6V at VDD = 2.5V, TA = 25ºC • Power-Off high impedance inputs and outputs • Industrial operation at –40°C to +85°C • Packages available: – 48-pin 240 mil wide plastic TSSOP (A) – 48-pin 300 mil wide plastic SSOP (V) Pericom Semiconductor’s PI74VCX series of logic circuits is produced in the Company’s advanced 0.35 micron CMOS technology, achieving industry leading speed. The inverting buffer/driver is designed specifically to improve both the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters. The device can be used as four 4-bit buffers, two 8-bit buffers, or one 16-bit buffer. It provides symmetrical active-low outputenable (OE) inputs. To ensure the high-impedance state during power up or power down, OE should be tied to Vcc through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. The PI74VCX family is I/O Tolerant, allowing it to operate in 1.8/3.6V systems. Logic Block Diagram 1 PS8323 09/14/98 PI74VCX16240 16-BIT INVERTING BUFFER DRIVER WITH 3-STATE OUTPUTS 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 Product Pin Description Pin Name nOE nAx nYx GND VCC Truth Table(1) Inputs Description 3-State Output Enable Inputs (Active LOW) Inputs 3-State Outputs Ground Power 1 48 2OE 1Y 1 2 47 1A 1 1Y 2 3 46 1A 2 GND 4 45 GND 1Y 3 5 44 1A 3 1Y 4 6 43 1A 4 VCC 7 42 VCC 2Y 1 8 41 2A 1 2Y 2 9 40 2A 2 GND 10 39 GND 2Y 3 11 38 2A 3 2Y 4 12 37 2A 4 3Y 1 13 36 3A 1 35 3A 2 34 GND 48-PIN A48 V48 3Y 2 14 GND 15 3Y 3 16 33 3A 3 3Y 4 17 32 3A 4 VCC 18 31 VCC 4Y 1 19 30 4A 1 4Y 2 20 29 4A 2 GND 21 28 GND 4Y 3 22 27 4A 3 4Y 4 23 26 4A 4 4OE 24 25 3OE nOE nAX nYx L L H L H L H X Z Notes: 1. H = High Signal Level L = Low Signal Level X = Don’t Care or Irrelevant Z = High Impedance Product Pin Configuration 1OE Outputs 2 PS8323 09/14/98 PI74VCX16240 16-BIT INVERTING BUFFER DRIVER WITH 3-STATE OUTPUTS 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 Maximum Ratings (Above which the useful life may be impaired. For user guidelines, not tested.) Supply Voltage Range, VDD ........................................... 0.5V to 4.6V Input Voltage Range, VI ............................................... -0.5V to 4.6V Output Voltage Range, VO (3-Stated) ........................... -0.5V to 4.6V Output Voltage Range, VO(1) (Active) ..................... -0.5V to VCC+0.5 DC Input Diode Current (IIK) VI<0V ...................................... -50mA DC Output Diode Current (IOK) VO<0V .................................................................................. -50mA VO>VDD ............................................................................... +50mA DC Output Source/Sink Current (IOH/IOL) .............................. ±50mA DC VDD or GND Current per Supply Pin (ICC or GND) ...... ±100mA Storage Temperature Range, Tstg .............................. –65°C to 150°C Note: Stresses greater than those listed under MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions f o r extended periods may affect reliability. Recommended Operating Conditions(2) M in. M ax. Operating 1.8 3.6 Data Retention Only 1.2 3.6 2.0 VDD Supply voltage VIH High- level input voltage VDD = 2.7V to 3.6V VIL Low- level input voltage VDD = 2.7V to 3.6V VI Input voltage VO Output voltage IO Output current in IOH/IOL ∆t/∆v TA Input transistion rise or fall rate(3) Operating free- air temperature 0.8 - 0.3 3.6 Active State 0 VDD Off State 0 3.6 VDD = 3.0V to 3.6V VDD = 2.3V to 2.7V VDD = 1.8V Units V ±24 ±18 ±6 mA 0 10 ns/V −40 85 C Notes 1. Absolute maximum of IO must be observed. 2. Unused control inputs must be held HIGH or LOW to prevent them from floating. 3 As measured between 0.8V and 2.0V, VDD = 3.0V. 3 PS8323 09/14/98 PI74VCX16240 16-BIT INVERTING BUFFER DRIVER WITH 3-STATE OUTPUTS 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 Electrical Characteristics over Recommended Operating Free-Air Temperature Range (unless otherwise noted) DC Characteristics (2.7V<VDD ≤ 3.6V) Parame te r VIH HIGH Level Input Voltage VIL LOW Level Input Voltage Conditions VDD HIGH Level Output Voltage 2.7 - 3.6 LOW Level Output Voltage IOH = −12mA 2.7 IOH = −18mA 3.0 V 2.2 IOL = 12mA 2.7 0.4 IOL = 18mA VI = 0.0V, VI = 3.6V IOZ 3- STATE O utput Leakage 0 ≤ VO ≤ 3.6V VI = VIH or VIL IOFF Power- OFF Leakage Current 0 ≤ (VI,VO) ≤ 3.6V Increase in IDD per input 2.4 0.2 Input Leakage Current ∆IDD 2.2 2.7 - 3.6 II Quiescent Supply Current Units 0.8 IOL = 100µA 3.0 IOL = 24mA IDD M ax. VDD - 0.2 IOH = −24mA VOL Typ. 2.0 IOH = −100µA VOH M in. 0.4 0.55 3.6 ±5.0 2.7 - 3.6 ±10 0 10 VI = VDD to GND 20 VDD ≤ (VI,VO) ≤ 3.6V 2.7 - 3.6 VIH = VDD - 0.6V, O ther inputs at VDD or Gnd 4 µA ±20 750 PS8323 09/14/98 PI74VCX16240 16-BIT INVERTING BUFFER DRIVER WITH 3-STATE OUTPUTS 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 Electrical Characteristics over Recommended Operating Free-Air Temperature Range (unless otherwise noted) (continued from previous page) DC Characteristics (2.3V ≤ VDD ≤ 2.7V) Parame te rs VIH HIGH Level Input Voltage VIL LOW Level Input Voltage Conditions HIGH Level Output Voltage M in. Units VDD - 0.2 IOH = - 6mA 2.0 IOH = - 12mA IOL = 100µA LOW Level Output Voltage M ax. 0.7 2.3 - 2.7 1.8 2.3 IOH = - 18mA VOL Typ. 1.6 IOH = - 100µA VOH VDD 1.7 2.3 - 2.7 IOL = 12mA Input Leakage Current VI = 0.0V, VI = 2.7V IOZ 3- STATE Output Leakage 0 ≤ VO ≤ 3.6V VI = VIH or VIL IOFF Power- OFF Leakage Current 0 ≤ (VI,VO) ≤ 3.6V IDD Quiescent Supply Current VI = VDD or GND VDD ≤ (VI,VO) ≤ 3.6V 0.2 0.4 2.3 IOL = 18mA II V 0.6 2.7 ±5.0 2.3 - 2.7 ±10 0 10 µA 20 2.3 - 2.7 ±20 DC Characteristics (1.8V ≤ VDD ≤ 2.3V) Parame te rs VIH HIGH Level Input Voltage VIL LOW Level Input Voltage VOH HIGH Level Output Voltage Conditions VDD M in. 1.8 2.3 0.7 x VDD IOH = - 100µA LOW Level Output Voltage M ax. V 1.4 IOL = 100µA 1.8 IOL = 6mA 0.2 0.3 II Input Leakage Current VI = 0.0V, VI = 1.8V ±5.0 IOZ 3- STATE Output Leakage 0 ≤ VO ≤ 3.6V VI = VIH or VIL ±10 IOFF Power- OFF Leakage Current 0 ≤ (VI,VO) ≤ 3.6V IDD Quiescent Supply Current 0 10 VI = VDD or GND 1.8 20 VDD ≤ (VI,VO) ≤ 3.6V 1.8 ±20 5 Units 0.2 x VDD VDD - 0.2 IOH = - 6mA VOL Typ. µA PS8323 09/14/98 PI74VCX16240 16-BIT INVERTING BUFFER DRIVER WITH 3-STATE OUTPUTS 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 AC Electrical Characteristics(1) TA = -40°C to +85°C, CL = 30pF, RL = 500Ω Symbol Parame te r VDD = 3.3V ±0.3V VDD = 2.5V ±0.2V Units VDD = 1.8V M in. M ax. M in. M ax. M in. M ax. tPHL, tPLH Prop Delay 0.8 2.5 1.0 3.0 1.5 5.0 tPZL, tPZH O utput Enable Time 0.8 3.5 1.0 4.1 1.5 6.5 tPLZ, tPHZ O utput Disable Time 0.8 3.5 1.0 3.8 1.5 5.0 tOSHL tOSLH O utput to O utput Skew(2) 0.5 0.5 ns 0.5 Notes 1. For CL = 50pF add approximatly 300ps to AC maximum specification 2. Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The specification applies to any outputs switching in the same direction, either HIGH or LOW (tOSHL) or LOW to HIGH (tOSLH). Dynamic Switching Characteristics Symbol Parame te r Conditions VDD TA= +25°C Typical VOLP Quiet Output Dynamic Peak VOL CL = 50pF, VIH= VDD, VIL= 0V 1.8 2.5 3.3 0.25 0.6 0.8 VOLV Quiet Output Dynamic Valley VOL CL = 50pF, VIH= VDD, VIL= 0V 1.8 2.5 3.3 - 0.25 - 0.6 - 0.8 VOHV Quiet Output Dynamic Valley VOH CL = 50pF, VIH= VDD, VIL= 0V 1.8 2.5 3.3 1.5 1.9 2.2 Units V Capacitance Symbol Parame te r Conditions TA = +25ºC Typical CIN Input Capacitance VDD = 1.8V, 2.5V or 3.3V, V1 = 0V or VDD 6 COUT Output Capacitance V1 = 0V or VDD, VDD = 1.8V, 2.5V or 3.3V 7 CPD Power Dissipation Capacitance V1 = 0V or VDD, F = 10MHz VDD = 1.8V, 2.5V or 3.3V 6 Units pF 20 PS8323 09/14/98 PI74VCX16240 16-BIT INVERTING BUFFER DRIVER WITH 3-STATE OUTPUTS 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 Switch Position Test Circuits and Switching Waveforms Parameter Measurement Information (VDD = 1.8V - 3.6V) 2 x VDD R1 500Ω From Output Under Test Te s t S1 tpd Open tPLZ/tPZL 2 x VDD tPHZ/tPZH GND Open RL 500Ω 50pF 3 CL GND Pulse Width (See Note A) VDD Low-High-Low Pulse VDD/2 0V tW VDD High-Low-High Pulse Setup, Hold, and Release Timing Data Input tSU Timing Input tH VDD/2 0V VDD VDD/2 0V Propagaton Delay VDD VDD/2 0V VDD VDD/2 Input 0V tPHL tPLH VDD Output VDD/2 VOL tPHL tPLH VDD Notes: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is LOW except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is HIGH except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50Ω, tr ≤ 2ns, tf ≤ 2ns, measured from 10% to 90%, unless otherwise specified. D. The outputs are measured one at a time with one transition per measurement. Opposite Phase Input Transition VDD/2 0V Enable Disable Timing VDD Output Control (Active LOW) VDD/2 0V tPLZ tPZL VDD Output Waveform 1 S1 at 2xVDD (see Note B) Output Waveform 2 S1 at GND VDD VDD/2 +0.15V tPZH VOL tPHZ -0.15V VOH VDD/2 0V (see Note B) Pericom Semiconductor Corporation 2380 Bering Drive • San Jose, CA 95131 • 1-800-435-2336 • Fax (408) 435-1100 • http://www.pericom.com 7 PS8323 09/14/98