PIC18FXX39 PIC18FXX39 Rev. B5 Silicon Errata Sheet The PIC18FXX39 Rev. B5 parts you have received conform functionally to the Device Data Sheet (DS30485A), except for the anomalies described below. 2. Module: Data EEPROM When reading the data EEPROM, the contents of the EEDATA register may become corrupted in the second instruction cycle after the RD bit (EECON1<0>) is set. The actual contents of the EEPROM remains unaffected. All the problems listed here will be addressed in future revisions of the PIC18FXX39 silicon. 1. Module: Program Memory Work around Data corruption may occur during a Table Write operation if a peripheral interrupt also occurs. This happens only when the interrupt enable bit (PIE or INTCON register) for the corresponding interrupt has also been set. To ensure the integrity of the contents of EEDATA, the register must be read in the instruction immediately following the setting of the RD bit. Use the movf or movff instructions to do this (see Example 1). Work around Additionally, all interrupts must be disabled prior to the read instruction sequence. Interruptions of the sequence may have the same result of altering the contents of EEDATA. Before executing any Table Write instructions, disable ALL peripheral interrupts. This is best done by clearing all Interrupt Enable bits in the three Interrupt Control registers (INTCON, INTCON2 and INTCON3) and both Peripheral Interrupt Enable registers (PIE1 and PIE2). After the Table Write is complete, restore all INTCON and PIE registers to their pre-instruction state. EXAMPLE 1: • • bcf Date Codes that pertain to this issue: All engineering and production devices. SUGGESTED SEQUENCE FOR READING EEDATA bsf movf bsf INTCON,GIEH ;disable interrupts ;if using interrupts EECON1,RD ;start the read operation EEDATA,W ;move the data out of ;EEDATA INTCON,GIEH ;enable interrupts ;if using interrupts • • Date Codes that pertain to this issue: All engineering and production devices. 2002 Microchip Technology Inc. DS80148A-page 1 PIC18FXX39 3. Module: Core (Program Memory Space) Performing Table Read operations above the user Program Memory space (addresses over 1FFFFFh) may yield erroneous results at the extreme low end of the device’s rated temperature range (-40°C). Clarifications/Corrections to the Data Sheet: In the Device Data Sheet (DS30485A), the following clarifications and corrections should be noted. None. This applies specifically to addresses above 1FFFFFh, including the User ID locations (200000h - 200007h), the configuration bytes (300000h - 30000Dh), and the Device ID locations (3FFFFEh and 3FFFFFh). User program memory is unaffected. Work around Three possible work arounds are presented. Other solutions may exist. 1. Do not perform Table Read operations on areas above the User Memory Space at -40°C. 2. Insert NOP instructions (specifically, literal FFFFh) around any Table Read instructions. The suggested optimal number is 4 instructions before and 8 instructions after each Table Read. This may vary, depending upon the particular application, and should be optimized by the user. Date Codes that pertain to this issue: All engineering and production devices. 4. Module: Data EEPROM When reading the data EEPROM, the contents of the EEDATA register may be corrupted if the RD bit (EECON1<0>) is set immediately following a write to the address byte (EEADR). The actual contents of the data EEPROM remain unaffected. Work around Do not set EEADR immediately before the execution of a read. Write to EEADR at least one instruction cycle before setting the RD bit. The instruction between the write to EEADR and the read can be any valid instruction, including a NOP. Date Codes that pertain to this issue: All engineering and production devices. DS80148A-page 2 2002 Microchip Technology Inc. PIC18FXX39 REVISION HISTORY Rev A Document (12/2002) First revision of this document. Silicon issues 1 through 4 (Program Memory, Data EEPROM and Core Program Memory Space). 2002 Microchip Technology Inc. DS80148A-page 3 PIC18FXX39 NOTES: DS80148A-page 4 2002 Microchip Technology Inc. Note the following details of the code protection feature on Microchip devices: • Microchip products meet the specification contained in their particular Microchip Data Sheet. • Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the intended manner and under normal conditions. • There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip's Data Sheets. Most likely, the person doing so is engaged in theft of intellectual property. • Microchip is willing to work with the customer who is concerned about the integrity of their code. • Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not mean that we are guaranteeing the product as “unbreakable.” Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our products. Information contained in this publication regarding device applications and the like is intended through suggestion only and may be superseded by updates. It is your responsibility to ensure that your application meets with your specifications. No representation or warranty is given and no liability is assumed by Microchip Technology Incorporated with respect to the accuracy or use of such information, or infringement of patents or other intellectual property rights arising from such use or otherwise. Use of Microchip’s products as critical components in life support systems is not authorized except with express written approval by Microchip. No licenses are conveyed, implicitly or otherwise, under any intellectual property rights. Trademarks The Microchip name and logo, the Microchip logo, KEELOQ, MPLAB, PIC, PICmicro, PICSTART and PRO MATE are registered trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. FilterLab, microID, MXDEV, MXLAB, PICMASTER, SEEVAL and The Embedded Control Solutions Company are registered trademarks of Microchip Technology Incorporated in the U.S.A. dsPIC, dsPICDEM.net, ECONOMONITOR, FanSense, FlexROM, fuzzyLAB, In-Circuit Serial Programming, ICSP, ICEPIC, microPort, Migratable Memory, MPASM, MPLIB, MPLINK, MPSIM, PICC, PICDEM, PICDEM.net, rfPIC, Select Mode and Total Endurance are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. Serialized Quick Turn Programming (SQTP) is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. © 2002, Microchip Technology Incorporated, Printed in the U.S.A., All Rights Reserved. Printed on recycled paper. Microchip received QS-9000 quality system certification for its worldwide headquarters, design and wafer fabrication facilities in Chandler and Tempe, Arizona in July 1999 and Mountain View, California in March 2002. The Company’s quality system processes and procedures are QS-9000 compliant for its PICmicro® 8-bit MCUs, KEELOQ® code hopping devices, Serial EEPROMs, microperipherals, non-volatile memory and analog products. In addition, Microchip’s quality system for the design and manufacture of development systems is ISO 9001 certified. 2002 Microchip Technology Inc. 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