NSC MM74HC34

MM54HC34/MM74HC34 Non-Inverter
General Description
The MM54HC34/MM74HC34 are logic functions fabricated
by using advanced silicon-gate CMOS technology which
provides the inherent benefits of CMOSÐlow quiescent
power and wide power supply range, but are functionally as
well as pin-out compatible with standard DM54LS/74LS devices. The MM54HC34/MM74HC34 feature low power dis-
sipation and fast switching times. All inputs are protected
from static discharge by internal diodes to VCC and ground.
Features
Y
Y
Fast switching: tPLH, tPHL e 10 ns (typ)
High fanout: t 10 LS loads
Connection Diagram
Dual-In-Line Package
TL/F/9389 – 1
Top View
Order Number MM54HC34 or MM74HC34
C1995 National Semiconductor Corporation
TL/F/9389
RRD-B30M105/Printed in U. S. A.
MM54HC34/MM74HC34 Non-Inverter
January 1988
Absolute Maximum Ratings (Notes 1 & 2)
Operating Conditions
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Supply Voltage (VCC)
DC Input or Output Voltage
(VIN, VOUT)
Operating Temp. Range (TA)
MM74HC
MM54HC
Input Rise or Fall Times
(tr, tf) VCC e 2.0V
VCC e 4.5V
VCC e 6.0V
b 0.5V to a 7.0V
Supply Voltage (VCC)
b 1.5V to VCC a 1.5V
DC Input Voltage (VIN)
b 0.5V to VCC a 0.5V
DC Output Voltage (VOUT)
g 20 mA
Clamp Diode Current (IIK, IOK)
g 25 mA
DC Output Current, per pin (IOUT)
g 50 mA
DC VCC or GND Current, per pin (IICC)
b 65§ C to a 150§ C
Storage Temperature Range (TSTG)
Power Dissipation (PD)
(Note 3)
600 mW
S.O. Package only
500 mW
Lead Temperature (TL)
(Soldering 10 seconds)
260§ C
Min
2
0
Max
6
VCC
Units
V
V
b 40
b 55
a 85
a 125
§C
§C
1000
500
400
ns
ns
ns
DC Electrical Characteristics (Note 4)
Symbol
Parameter
Conditions
VCC
TA e 25§ C
74HC
TA e b40 to a 85§ C
Typ
54HC
TA e b55 to a 125§ C
Units
Guaranteed Limits
VIH
Minimum High Level
Input Voltage
2.0V
4.5V
6.0V
1.5
3.15
4.2
1.5
3.15
4.2
1.5
3.15
4.2
V
V
V
VIL
Maximum Low Level
Input Voltage**
2.0V
4.5V
6.0V
0.5
1.35
1.8
0.5
1.35
1.8
0.5
1.35
1.8
V
V
V
VOH
Minimum High Level
Output Voltage
VIN e VIL
lIOUTl s 20 mA
2.0V
4.5V
6.0V
2.0
4.5
6.0
1.9
4.4
5.9
1.9
4.4
5.9
1.9
4.4
5.9
V
V
V
4.5V
6.0V
4.2
5.7
3.98
5.48
3.84
5.34
3.7
5.2
V
V
2.0V
4.5V
6.0V
0
0
0
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
V
V
V
VIN e VIH
lIOUTl s 4.0 mA
lIOUTl s 5.2 mA
4.5V
6.0V
0.2
0.2
0.26
0.26
0.33
0.33
0.4
0.4
V
V
VIN e VIL
lIOUTl s 4.0 mA
lIOUTl s 5.2 mA
VOL
Maximum Low Level
Output Voltage
VIN e VIH
lIOUTl s 20 mA
IIN
Maximum Input
Current
VIN e VCC or GND
6.0V
g 0.1
g 1.0
g 1.0
mA
ICC
Maximum Quiescent
Supply Current
VIN e VCC or GND
IOUT e 0 mA
6.0V
2.0
20
40
mA
Note 1: Absolute Maximum Ratings are those values beyond which damage to the device may occur.
Note 2: Unless otherwise specified all voltages are referenced to ground.
Note 3: Power Dissipation temperature deratingÐplastic ‘‘N’’ package: b 12 mW/§ C from 65§ C to 85§ C, ceramic ‘‘J’’ package: b 12 mW/§ C from 100§ C to 125§ C.
Note 4: For a power supply of 5V g 10% the worst case output voltages (VOH, and VOL) occur for HC at 4.5V. Thus the 4.5V values should be used when designing
with this supply. Worst case VIH and VIL occur at VCC e 5.5V and 4.5V respectively. (The VIH value at 5.5V is 3.85V.) The worst case leakage current (IIN, ICC and
IOZ) occur for CMOS at the higher voltage and so the 6.0V values should be used.
**VIL limits are currently tested at 20% of VCC. The above VIL specification (30% of VCC) will be implemented no later than Q1, CY’89.
2
AC Electrical Characteristics VCC e 5V, TA e 25§ C, CL e 15 pF, tr e tf e 6 ns
Symbol
Parameter
Conditions
tPHL, tPLH
Maximum Propagation
Delay
Typ
Guaranteed
Limit
10
Units
ns
AC Electrical Characteristics VCC e 2.0V to 6.0V, CL e 50 pF, tr e tf e 6 ns (unless otherwise specified)
Conditions VCC
TA e 25§ C
74HC
54HC
TA e b40§ C to a 85§ C TA e b55§ C to a 125§ C Units
Symbol
Parameter
tPHL, tPLH
Minimum Propagation
Delay
2.0V
4.5V
6.0V
30
10
8
80
16
14
100
20
17
120
24
20
ns
ns
ns
tTLH, tTHL Maximum Output Rise
and Fall Time
2.0V
4.5V
6.0V
50
10
8
75
75
13
95
19
16
110
22
19
ns
ns
ns
Typ
CPD
Power Dissipation
Capacitance (Note 5)
CIN
Maximum Input
Capacitance
(per gate)
Guaranteed Limits
26
5
pF
10
10
10
pF
Note 5: CPD determines the no load dynamic power consumption, PD e CPD VCC2 f a ICC VCC, and the no load dynamic current consumption, IS e CPD VCC f a
ICC.
3
MM54HC34/MM74HC34 Non-Inverter
Physical Dimensions inches (millimeters)
14 Lead Cerdip (J)
Order Number MM54HC34J or MM74HC34J
NS Package Number J14A
LIFE SUPPORT POLICY
14 Lead Molded Dip (N)
Order Number MM74HC34N
NS Package Number N14A
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