IDTQS74FCT2374T/AT/CT HIGH-SPEED CMOS BUS INTERFACE 8-BIT REGISTER INDUSTRIAL TEMPERATURE RANGE HIGH-SPEED CMOS BUS INTERFACE 8-BIT LATCH IDTQS74FCT2374T/AT/CT FEATURES: DESCRIPTION: − − − − − − The IDTQS74FCT2374T is a high-speed CMOS TTL-compatible 8-bit register with a buffered common clock and a buffered output enable control. The IDTQS74FCT2374T has a 25Ω resistor output that is useful for driving transmission lines and reducing system noise. The FCT2374 is a noninverting device. All inputs have clamp diodes for undershoot noise suppression. All outputs have ground bounce suppression. Outputs will not load an active bus when Vcc is removed from the device. − − − CMOS power levels: <7.5mW static Undershoot clamp diodes on all inputs True TTL input and output compatibility Ground bounce controlled outputs Reduced output swing of 0 to 3.5V Built-in 25Ω series resistor outputs reduce reflection and other system noise Std., A, and C speed grades with 5.2ns tPD for C IOL = 12mA Available in SOIC and QSOP packages FUNCTIONAL BLOCK DIAGRAM 25 Ω Dx CP OE D 11 Ox Q CP 1 INDUSTRIAL TEMPERATURE RANGE FEBRUARY 2001 1 c 2001 Integrated Device Technology, Inc. DSC-5407/2 IDTQS74FCT2374T/AT/CT HIGH-SPEED CMOS BUS INTERFACE 8-BIT REGISTER INDUSTRIAL TEMPERATURE RANGE ABSOLUTE MAXIMUM RATINGS PIN CONFIGURATION OE 1 20 V CC O0 2 19 O7 D0 18 3 D7 D1 4 17 D6 O1 5 O6 O2 6 16 SO20-2 SO20-8 15 D2 7 14 D5 D3 8 13 D4 O3 9 12 O4 10 11 CP GND Symbol VTERM Description Terminal Voltage with Respect to GND TSTG Storage Temperature IOUT (1) Max. – 0.5 to +7 Unit V – 65 to +150 °C DC Output Current Max Sink Current/Pin 120 mA IIK Input Diode Current, VIN < 0 – 20 mA IOK Output Diode Current, VOUT < 0 – 50 mA FCTL NOTE: 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. O5 CAPACITANCE (TA = +25OC, f = 1.0MHz) Symbol CIN Parameter(1) Input Capacitance Conditions VIN = 0V Typ. 4 Max. — Unit pF COUT Output Capacitance VOUT = 0V 8 — pF FCT_2 NOTE: 1. This parameter is measured at characterization but not tested. SOIC/ QSOP TOP VIEW PIN DESCRIPTION Pin Names Dx I/O I Data Inputs Description Ox O Data Outputs CP I Clock Input OE I 3-State Output Enable (Active LOW) FUNCTION TABLE Inputs Internal Outputs OE CP DX Value Qx Ox H H L L H H L H ↑ ↑ ↑ ↑ X X L H L H — — L H L H Z Z L H Z Z NOTE: 1. H = HIGH Voltage Level L = LOW Voltage Level X = Don’t Care Z = High Impedance ↑ = LOW-to-HIGH transition 2 (1) Function Disable Outputs Disable Outputs Load Input Data Enable Outputs Load Input Data Disable Outputs IDTQS74FCT2374T/AT/CT HIGH-SPEED CMOS BUS INTERFACE 8-BIT REGISTER INDUSTRIAL TEMPERATURE RANGE DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE Following Conditions Apply Unless Otherwise Specified: Industrial: TA = -40°C to +85°C, VCC = 5.0V ± 5% Min. 2 Typ.(1) — Max. — Unit V Guaranteed Logic LOW Level — — 0.8 V Input Hysteresis VTLH - VTHL for all inputs — 0.2 — V IIH Input HIGH Current VCC = Max. 0 ≤ VIN < Vcc — — ±5 µA IIL Input LOW Current IOZ Off-State Output Current (Hi-Z) VCC = Max. 0 ≤ VIN ≤ Vcc — — ±5 µA IOR Current Drive VCC = Min., VOUT = 2.0V(2) VIC Input Clamp Voltage VCC = Min., IIN = –18mA, TA = 25° VOH Output HIGH Voltage VOL ROUT Symbol VIH Parameter Input HIGH Level Test Conditions Guaranteed Logic HIGH Level VIL Input LOW Level ∆VT 50 — — mA C(2) — –0.7 –1.2 V VCC = Min. IOH = -15mA 2.4 — — V Output LOW Voltage VCC = Min. Output Resistance VCC = Min. IOL = 12mA IOL = 12mA — 20 — 28 0.5 40 Ω V NOTES: 1. Typical values are at VCC = 5.0V, TA = 25°C. 2. This parameter is guaranteed but not tested. POWER SUPPLY CHARACTERISTICS Following Conditions Apply Unless Otherwise Specified: Industrial: TA = -40°C to +85°C, VCC = 5.0V ± 5% Symbol ICC Parameter Quiescent Power Supply Current ∆ICC Supply Current per Input TTL Inputs HIGH ICCD Supply Current per Input per MHz Test Conditions(1) VCC = Max. freq = 0 0V ≤ VIN ≤ 0.2V or Vcc-0.2V ≤ VIN ≤ Vcc VCC = Max. VIN = 3.4V(2) freq = 0 VCC = Max. Outputs Open and Enabled One Bit Toggling 50% Duty Cycle Other inputs at GND or Vcc(3,4) Min. Max. Unit — 1.5 mA — 2 mA — 0.25 mA/MHz FCTL NOTES: 1. For conditions shown as Min. or Max., use the appropriate values specified under DC Electrical Characteristics. 2. Per TLL driven input (VIN = 3.4V). 3. For flip-flops, ICCD is measured by switching one of the data input pins so that the output changes every clock cycle. This is a measurement of device power consumption only and does not include power to drive load capacitance or tester capacitance. 4. IC = IQUIESCENT + IINPUTS + IDYNAMIC IC = ICC + ∆ICC DHNT + ICCD (fCP/2 + fiNi) ICC = Quiescent Current ∆ICC = Power Supply Current for a TTL High Input (VIN = 3.4V) DH = Duty Cycle for TTL Inputs High NT = Number of TTL Inputs at DH ICCD = Dynamic Current Caused by an Output Transition Pair (HLH or LHL) fCP = Clock Frequency for Register Devices (Zero for Non-Register Devices) fi = Input Frequency Ni = Number of Inputs at fi All currents are in milliamps and all frequencies are in megahertz. 3 IDTQS74FCT2374T/AT/CT HIGH-SPEED CMOS BUS INTERFACE 8-BIT REGISTER INDUSTRIAL TEMPERATURE RANGE SWITCHING CHARACTERISTICS OVER OPERATING RANGE(1) 74FCT2374T Symbol tPHL tPLH tPZH tPZL tPHZ tPLZ Parameter(2) Propagation Delay CP to Ox Output Enable Time OE to Yx Output Disable Time(3) OE to Yx 74FCT2374AT 74FCT2374CT Min. Max. Min. Max. Min. Max. Unit 2 10 2 6.5 2 5.2 ns 1.5 12.5 1.5 6.5 1.5 6.2 ns 1.5 8 1.5 5.5 1.5 5 ns tS Data Setup Time, Dx to CP 2 — 2 — 1.5 — ns tH Data hold Time, Dx to CP 1.5 — 1.5 — 1 — ns 7 — 5 — 4 — ns tW Clock Pulse Width, HIGH or LOW (3) NOTES: 1. CLOAD = 50pF, RLOAD = 500Ω unless otherwise noted. 2. Minimums guaranteed but not tested. 3. This parameter is guaranteed by design but not tested. 4 IDTQS74FCT2374T/AT/CT HIGH-SPEED CMOS BUS INTERFACE 8-BIT REGISTER INDUSTRIAL TEMPERATURE RANGE TEST CIRCUITS AND WAVEFORMS SWITCH POSITION TEST CIRCUITS FOR ALL OUTPUTS V CC Test 7.0V Switch Open Drain 500 Ω Disable Low V OUT V IN Pulse Generator Closed Enable Low D.U.T. All Other Tests Open FCTL 50pF RT DEFINITIONS: CL = Load capacitance: includes jig and probe capacitance. RT = Termination resistance: should be equal to ZOUT of the Pulse Generator. 500 Ω CL FC TL lin k PULSE WIDTH SET-UP, HOLD, AND RELEASE TIMES 3V 1.5V 0V 3V 1.5V 0V DATA INPUT tH t SU TIM ING INPUT ASYNCHRONOUS C ONTROL PRES ET CLEAR ETC. SYNCHRO NOUS CONTRO L PRES ET CLEAR CLOCK ENABLE ETC. t REM t SU LO W -HIGH-LOW PULSE 1.5V tW 3V 1.5V 0V HIGH-LOW -HIGH PULSE 1.5V 3V 1.5V 0V tH FC TL lin k FC TL lin k PROPAGATION DELAY ENABLE AND DISABLE TIMES ENAB LE SAM E PHASE INPUT TRANSITION t PLH t PH L OUTPUT t PLH OPPOSITE P HASE INPUT TRANSITION t PH L 3V 1.5V 0V DISA BLE 3V CO NTROL INPUT 1.5V t PZL V OH 1.5V V OL OUTPUT NO RM A LLY LO W 3V 1.5V 0V SW ITCH CLOSE D FC TL lin k SW ITCH OPEN 3.5V 3.5V 1.5V 0.3V t PZH OUTPUT NO RM A LLY HIGH 0V t PLZ V OL t PHZ 0.3V V OH 1.5V 0V 0V FC TL lin k NOTES: 1. Diagram shown for input Control Enable-LOW and input Control DisableHIGH 2. Pulse Generator for All Pulses: Rate ≤ 1.0MHz; tF ≤ 2.5ns; tR ≤ 2.5ns 5 IDTQS74FCT2374T/AT/CT HIGH-SPEED CMOS BUS INTERFACE 8-BIT REGISTER INDUSTRIAL TEMPERATURE RANGE ORDERING INFORMATION IDTQS XX XXXX FCT Device Type Temp. Range XX Package SO Q Small Outline IC (gull wing) (SO20-2) Quarter Size Small Outline Package (SO20-8) 2374T 2374AT 2374CT High-Speed CMOS Bus Interface 8-Bit Register 74 –40°C to +85°C CORPORATE HEADQUARTERS 2975 Stender Way Santa Clara, CA 95054 for SALES: 800-345-7015 or 408-727-6116 fax: 408-492-8674 www.idt.com* *To search for sales office near you, please click the sales button found on our home page or dial the 800# above and press 2. The IDT logo is a registered trademark of Integrated Device Technology, Inc. 6