SY10H602 SY100H602 FINAL 9-BIT LATCHED TTL-TO-ECL DESCRIPTION FEATURES ■ 9-bit ideal for byte-parity applications ■ Flow-through configuration ■ Extra TTL and ECL power/ground pins to minimize switching noise ■ Dual supply ■ 3.5ns max. D to Q ■ PNP TTL inputs for low loading ■ Choice of ECL compatibility: MECL 10KH (10Hxxx) or 100K (100Hxxx) ■ Fully compatible with Motorola MC10H/100H602 ■ Available in 28-pin PLCC package The SY10/100H602 are 9-bit, dual supply TTL-to-ECL translators with latches. Devices in the Micrel-Synergy 9-bit translator series utilize the 28-lead PLCC for optimal power pinning, signal flow-through and electrical performance. The H602 features D-type latches. Latching is controlled by Latch Enable (LEN), while the Master Reset input resets the latches. A post-latch logic enable is also provided (ENECL), allowing control of the output state without destroying latch data. All control inputs are ECL level. The 10H version is compatible with MECL 10KH ECL logic levels. The 100H version is compatible with 100K levels. Q1 D Q EN Q2 D Q EN Q3 D4 D Q EN Q4 D5 D Q EN Q5 D6 D Q EN Q6 D7 D Q EN D8 D Q EN D0 18 Q0 27 17 28 16 Q1 VCCE VCCO TOP VIEW PLCC 1 2 15 14 3 13 4 12 5 6 ECL 7 8 9 Q2 VCCO Q3 10 11 Q4 TTL D Q EN 26 VEE Q5 D3 25 24 23 22 21 20 19 D6 D7 D8 GND MR LEN ENECL Q6 D2 Q0 VCCO D1 D Q EN Q8 Q7 D0 D5 D4 ENECL D2 D1 PIN CONFIGURATION VCCT D3 BLOCK DIAGRAM PIN NAMES Pin Q7 Q8 LEN MR Function GND TTL Ground (0V) VCCE ECL VCC (0V) VCCO ECL VCC (0V) — Outputs VCCT TTL Supply (+5.0V) VEE ECL Supply (–5.2/–4.5V) D0–D8 Data Inputs (TTL) Q0–Q8 Data Outputs (ECL) ENECL Enable Control (ECL) LEN Latch Enable (ECL) MR Master Reset (ECL) Rev.: D 1 Amendment: /0 Issue Date: March, 1998 SY10H602 SY100H602 Micrel LOGIC DIAGRAM TRUTH TABLE D LEN MR ENECL Q L L L H L H L L H H X H L H Q0 X X H H L X X X L L DC ELECTRICAL CHARACTERISTICS VCCT = 5.0V ± 10%; VEE = –4.75V to –5.5V (10H Version); VEE = –4.2V to –5.5V (100H Version) TA = 0°C Symbol IEE ICCH ICCL TA = +25°C TA = +85°C Parameter Min. Max. Min. Max. Min. Max. Power Supply Current, ECL 10H 100H — — 125 122 — — 125 123 — — 125 132 — — 48 50 — — 48 50 — — 48 50 Power Supply Current, TTL Unit Condition mA — mA — AC ELECTRICAL LOGIC DIAGRAM CHARACTERISTICS VCCT = 5.0V ± 10%; VEE = –4.75V to –5.5V (10H Version); VEE = –4.2V to –5.5V (100H Version) TA = 0°C Symbol Parameter TA = +25°C TA = +85°C Min. Max. Min. Max. Min. Max. Unit Condition ns — tPLH tPHL Propagation Delay to Output D LEN MR ENECL 1.4 2.0 2.0 1.6 3.0 3.4 3.4 3.2 1.5 2.1 2.1 1.7 3.2 3.5 3.5 3.3 1.7 2.4 2.5 1.8 3.5 3.7 3.9 3.7 tS Set-up Time, D to LEN 2.0 — 2.0 — 2.0 — ns — tH Hold Time, D to LEN 1.0 — 1.0 — 1.0 — ns — t LEN Pulse Width, LOW 2.0 — 2.0 — 2.0 — ns — Output Rise/Fall Time 20% to 80%, 80% to 20% 0.5 1.5 0.5 1.5 0.5 1.5 ns — w(L) tr tf PRODUCT ORDERING CODE Ordering Code Package Type Operating Range SY10H602JC J28-1 Commercial SY10H602JCTR J28-1 Commercial SY100H602JC J28-1 Commercial SY100H602JCTR J28-1 Commercial 2 SY10H602 SY100H602 Micrel 28 LEAD PLCC (J28-1) Rev. 03 3 SY10H602 SY100H602 Micrel MICREL-SYNERGY TEL 3250 SCOTT BOULEVARD + 1 (408) 980-9191 FAX SANTA CLARA + 1 (408) 914-7878 WEB CA 95054 USA http://www.micrel.com This information is believed to be accurate and reliable, however no responsibility is assumed by Micrel for its use nor for any infringement of patents or other rights of third parties resulting from its use. No license is granted by implication or otherwise under any patent or patent right of Micrel Inc. © 2000 Micrel Incorporated 4