WED3DG644V-D2 32MB- 4M x 64 SDRAM UNBUFFERED FEATURES DESCRIPTION n PC100 and PC133 compatible The WED3DG644V is a 4M x 64 synchronous DRAM module which consists of four 4M x 16 SDRAM components in TSOP- 11 package and one 2K EEPROM in an 8- pin TSSOP package for Serial Presence Detect which are mounted on a 168 Pin DIMM multilayer FR4 Substrate. n Burst Mode Operation n Auto and Self Refresh capability n LVTTL compatible inputs and outputs n Serial Presence Detect with EEPROM n Fully synchronous: All signals are registered on the positive edge of the system clock n Programmable Burst Lengths: 1, 2, 4, 8 or Full Page n 3.3 volt 6 0.3v Power Supply n 168- Pin DIMM JEDEC PIN CONFIGURATIONS (FRONT SIDE/BACK SIDE) Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 Front VSS DQ0 DQ1 DQ2 DQ3 VDD DQ4 DQ5 DQ6 DQ7 DQ8 VSS DQ9 DQ10 DQ11 DQ12 DQ13 VDD DQ14 DQ15 NC NC VSS NC NC VDD WE DQM0 Pin 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 Front DQM1 CS0 DNU VSS A0 A2 A4 A6 A8 A10/AP BA1 VDD VDD CLK0 VSS DNU CS2 DQM2 DQM3 DNU VDD NC NC NC NC VSS DQ16 DQ17 Pin 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 Front DQ18 DQ19 VDD DQ20 NC NC NC VSS DQ21 DQ22 DQ23 VSS DQ24 DQ25 DQ26 DQ27 VDD DQ28 DQ29 DQ30 DQ31 VSS CLK2 NC *WP **SDA **SCL VDD Pin 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 Back VSS DQ32 DQ33 DQ34 DQ35 VCC DQ36 DQ37 DQ38 DQ39 DQ40 VSS DQ41 DQ42 DQ43 DQ44 DQ45 VDD DQ46 DQ47 NC NC VSS NC NC VDD CAS DQM4 Pin 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 PIN NAMES Back DQM5 CS1 RAS VSS A1 A3 A5 A7 A9 BA0 A11 VDD NC NC VSS CKE0 NC DQM6 DQM7 NC VDD NC NC NC NC VSS DQ48 DQ49 Pin 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 Back DQ50 DQ51 VDD DQ52 NC NC DNU VSS DQ53 DQ54 DQ55 VSS DQ56 DQ57 DQ58 DQ59 VDD DQ60 DQ61 DQ62 DQ63 VSS NC NC **SA0 **SA1 **SA2 VDD A0 A11 BA0-1 DQ0-63 CLK0,CLK2 CKE0 CS0,CS2 RAS CAS WE DQM0-7 VDD VSS SDA SCL DNU NC Address input (Multiplexed) Select Bank Data Input/Output Clock input Clock Enable input Chip select Input Row Address Strobe Column Address Strobe Write Enable DQM Power Supply (3.3V) Ground Serial data I/O Serial clock Do not use No Connect * WP (write protect) option available on pin 81, see ordering information ** These pins should be NC in the system which does not support SPD. White Electronic Designs Corp reserves the right to change products or specifications without notice. June 2003 Rev. 1 ECO #16361 1 White Electronic Designs Corporation (508) 366-5151 www.whiteedc.com WED3DG644V-D2 FUNCTIONAL BLOCK DIAGRAM Ω Ω Ω Ω White Electronic Designs Corp reserves the right to change products or specifications without notice. White Electronic Designs Corporation (508) 366-5151 www.whiteedc.com 2 June 2003 Rev. 1 ECO #16361 WED3DG644V-D2 ABSOLUTE MAXIMUM RATINGS Parameter Voltage on any pin relative to VSS Voltage on VDD supply relative to VSS Storage Temperature Power Dissipation Short Circuit Current Symbol VIN, Vout VDD, VDDQ TSTG PD IOS Value -1.0 ~ 4.6 -1.0 ~ 4.6 -55 ~ +150 4 50 Units V V °C W mA Note: Permanent device damage may occur if "ABSOLUTE MAXIMUM RATINGS" are exceeded. Functional operation should be restricted to recommended operating condition. Exposure to higher than recommended voltage for extended periods of time could affect device reliability. RECOMMENDED DC OPERATING CONDITIONS (Voltage Referenced to: VSS = 0V, TA = 0°C to +70°C) Parameter Supply Voltage Input High Voltage Input Low Voltage Output High Voltage Output Low Voltage Input Leakage Current Symbol VDD VIH VIL VOH VOL ILI Min 3.0 2.0 -0.3 2.4 -10 Typ Max Unit 3.3 3.6 V 3.0 VDDQ+0.3 V 0.8 V V 0.4 V 10 µA Note 1 2 IOH= -2mA IOL= -2mA 3 Note: 1. VIH (max)= 5.6V AC. The overshoot voltage duration is £ 3ns. 2. VIL (min)= -2.0V AC. The undershoot voltage duration is £ 3ns. 3. Any input 0V £ VIN £ VDDQ Input leakage currents include Hi-Z output leakage for all bi-directional buffers with Tri-State outputs. CAPACITANCE (TA = 23°C, f = 1MHz, VDD = 3.3V, VREF=1.4V 6200mV) Parameter Input Capacitance (A0-A12) Input Capacitance (RAS,CAS,WE) Input Capacitance (CKE0) Input Capacitance (CLK0,CLK2) Input Capacitance (CS0,CS2) Input Capacitance (DQM0-DQM7) Input Capacitance (BA0-BA1) Data input/output capacitance (DQ0-DQ63) Symbol CIN1 CIN2 CIN3 CIN4 CIN5 CIN6 CIN7 Cout Min - Max 25 25 25 13 15 10 25 12 Unit pF pF pF pF pF pF pF pF White Electronic Designs Corp reserves the right to change products or specifications without notice. June 2003 Rev. 1 ECO #16361 3 White Electronic Designs Corporation (508) 366-5151 www.whiteedc.com WED3DG644V-D2 OPERATING CURRENT CHARACTERISTICS (VCC = 3.3V, TA = 0°C to +70°C) Parameter Operating Current (One bank active) Symbol ICC1 Precharge Standby Current in Power Down Mode ICC2P ICC2PS Icc2N Precharge Standby Current in Non-Power Down Mode Active standby current in power-down mode Active standby current in non power-down mode Icc2NS ICC3P ICC3PS ICC3N ICC3NS Operating current (Burst mode) ICC4 Refresh current Self refresh current ICC5 ICC6 Conditions Burst Length = 1 tRC ³ tRC(min) IOL = 0mA CKE £ VIL(max), tCC = 10ns CKE & CLK £ VIL(max), tCC = ¥ CKE ³ VIH(min), CS ³ VIH(min), tcc = 10ns Input signals are charged one time during 20 CKE ³ VIH(min), CLK £ VIL(max), tcc = ¥ Input signals are stable CKE ³ VIL(max), tCC = 10ns CKE & CLK £ VIL(max), tcc = ¥ CKE ³ VIH(min), CS ³ VIH(min), tcc = 10ns Input signals are changed one time during 20ns CKE ³ VIH(min), CLK £ VIL(max), tcc = ¥ input signals are stable Io = mA Page burst 4 Banks activated tCCD = 2CLK tRC ³ tRC(min) CKE £ 0.2V Version 133 100 440 400 5 5 mA 60 mA 25 15 15 mA 100 mA 60 mA 540 540 Units Note mA 1 5 440 mA 1 500 mA mA 2 Notes: 1. Measured with outputs open. 2. Refresh period is 64ms. 3. Unless otherwise noticed, input swing level is CMOS (VIH/VIL = VDDQ/VssQ) White Electronic Designs Corp reserves the right to change products or specifications without notice. White Electronic Designs Corporation (508) 366-5151 www.whiteedc.com 4 June 2003 Rev. 1 ECO #16361 WED3DG644V-D2 ORDERING INFORMATION Part Number WED3DG644V10D2 WED3DG644V7D2 WED3DG644V75D2 Speed 100MHz 133MHz 133MHz CAS Latency CL=2 CL=2 CL=3 Part Number WED3DG634V10D2 WED3DG634V7D2 WED3DG634V75D2 Note: Modules are available in industrial temperature - 40°C to 85°C. Add an "I" to the end of the part number. Speed 100MHz 133MHz 133MHz CAS Latency CL=2 CL=2 CL=3 Note: Available with WP (write protect) on pin 81. PACKAGE DIMENSIONS ALL DIMENSIONS ARE IN INCHES White Electronic Designs Corp reserves the right to change products or specifications without notice. June 2003 Rev. 1 ECO #16361 5 White Electronic Designs Corporation (508) 366-5151 www.whiteedc.com