ETC AM26C32CNS

AM26C32
QUADRUPLE DIFFERENTIAL LINE RECEIVER
SLLS104H – DECEMBER 1990 – REVISED FEBRUARY 2002
D
D
D
D
D
D
D
description
The AM26C32 is a quadruple differential line
receiver for balanced or unbalanced digital data
transmission. The enable function is common to
all four receivers and offers a choice of active-high
or active-low input. The 3-state outputs permit
connection directly to a bus-organized system.
Fail-safe design specifies that if the inputs are
open, the outputs are always high.
AM26C32C, AM26C32I, AM26C32Q . . . D, N, OR NS PACKAGE
AM26C32M . . . J OR W PACKAGE
(TOP VIEW)
1B
1A
1Y
G
2Y
2A
2B
GND
1
16
2
15
3
14
4
13
5
12
6
11
7
10
8
9
VCC
4B
4A
4Y
G
3Y
3A
3B
AM26C32M . . . FK PACKAGE
(TOP VIEW)
1A
1B
NC
VCC
4B
D
D
Meets or Exceeds the Requirements of
ANSI TIA/EIA-422-B, TIA/EIA-423-B, and ITU
Recommendation V.10 and V.11
Low Power, ICC = 10 mA Typ
±7-V Common-Mode Range With ±200-mV
Sensitivity
Input Hysteresis . . . 60 mV Typ
tpd = 17 ns Typ
Operates From a Single 5-V Supply
3-State Outputs
Input Fail-Safe Circuitry
Improved Replacements for AM26LS32
Available in Q-Temp Automotive
– High Reliability Automotive Applications
– Configuration Control/Print Support
– Qualification to Automotive Standards
1Y
G
NC
2Y
2A
4
3 2 1 20 19
18
5
17
6
16
7
15
8
14
9 10 11 12 13
4A
4Y
NC
G
3Y
2B
GND
NC
3B
3A
D
NC – No internal connection
The AM26C32 devices are manufactured using a BiCMOS process, which is a combination of bipolar and
CMOS transistors. This process provides the high voltage and current of bipolar with the low power of CMOS
to reduce the power consumption to about one-fifth that of the standard AM26LS32, while maintaining ac and
dc performance.
The AM26C32C is characterized for operation from 0°C to 70°C. The AM26C32I is characterized for operation
from –40°C to 85°C. The AM26C32Q is characterized for operation from –40°C to 125°C. The AM26C32M is
characterized for operation over the full military temperature range of –55°C to 125°C.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright  2002, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
On products compliant to MIL-PRF-38535, all parameters are tested
unless otherwise noted. On all other products, production
processing does not necessarily include testing of all parameters.
POST OFFICE BOX 655303
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1
AM26C32
QUADRUPLE DIFFERENTIAL LINE RECEIVER
SLLS104H – DECEMBER 1990 – REVISED FEBRUARY 2002
AVAILABLE OPTIONS
PACKAGED DEVICES
SMALL
OUTLINE
(D, NS)
PLASTIC
DIP
(N)
CERAMIC
CHIP CARRIER
(FK)
CERAMIC
DIP
(J)
CERAMIC
FLATPACK
(W)
0°C to 70°C
AM26C32CD
AM26C32CNS
AM26C32CN
—
—
—
—
–40°C to 85°C
AM26C32ID
AM26C32INS
AM26C32IN
—
—
—
—
–40°C to 125°C
AM26C32QD
AM26C32QN
—
—
—
–55°C to 125°C
—
—
AM26C32MFK
AM26C32MJ
AM26C32MW
TA
The D package is available taped and reeled. Add the suffix R to the device type (e.g., AM26C32CDR). The NS
package is only available taped and reeled.
FUNCTION TABLE
(each receiver)
DIFFERENTIAL
INPUT
VID ≥ VIT
IT+
VIT
IT– < VID < VIT
IT+
VID ≤ VIT
IT–
X
ENABLES
OUTPUT
Y
G
G
H
X
H
X
L
H
H
X
?
X
L
?
H
X
L
X
L
L
L
H
Z
H = high level, L = low level, X = irrelevant
Z = high impedance (off), ? = indeterminate
logic diagram (positive logic)
G
G
1A
1B
2A
2B
3A
3B
4A
4B
4
12
2
3
1
6
5
7
2Y
10
11
9
3Y
14
13
15
Pin numbers shown are for the D, J, N, NS, and W packages.
2
1Y
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4Y
AM26C32
QUADRUPLE DIFFERENTIAL LINE RECEIVER
SLLS104H – DECEMBER 1990 – REVISED FEBRUARY 2002
schematics
EQUIVALENT OF G OR G INPUT
EQUIVALENT OF A OR B INPUT
VCC
VCC
VCC
17 kΩ
NOM
TYPICAL OF ALL OUTPUTS
1.7 kΩ
NOM
Input
288 kΩ
NOM
Input
Output
GND
GND
1.7 kΩ
NOM
VCC (A inputs)
or
GND (B inputs)
GND
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage, VCC (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
Input voltage range, VI: A or B inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –11 V to 14 V
G or G inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to VCC + 0.5 V
Differential input voltage range, VID . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –14 V to 14 V
Output voltage range, VO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to VCC + 0.5 V
Output current, IO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±25 mA
Package thermal impedance, θJA (see Notes 2 and 3): D package . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73°C/W
N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67°C/W
NS package . . . . . . . . . . . . . . . . . . . . . . . . . . . 64°C/W
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. All voltage values, except differential output voltage, VOD, are with respect to network GND. Currents into the device are positive
and currents out of the device are negative.
2. Maximum power dissipation is a function of TJ(max), θJA, and TA. The maximum allowable power dissipation at any allowable
ambient temperature is PD = (TJ(max) – TA)/θJA. Operating at the absolute maximum TJ of 150°C can affect reliability.
3. The package thermal impedance is calculated in accordance with JESD 51-7.
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3
AM26C32
QUADRUPLE DIFFERENTIAL LINE RECEIVER
SLLS104H – DECEMBER 1990 – REVISED FEBRUARY 2002
recommended operating conditions
MIN
NOM
MAX
4.5
5
5.5
UNIT
VCC
VIH
Supply voltage
VIL
VIC
Low-level input voltage
Common-mode input voltage
±7
V
IOH
IOL
High-level output current
–6
mA
Low-level output current
6
mA
High-level input voltage
2
TA
V
0.8
AM26C32C
air temperature
Operating free
free-air
V
0
V
70
AM26C32I
–40
85
AM26C32Q
–40
125
AM26C32M
–55
125
°C
electrical characteristics over recommended ranges of VCC, VIC, and operating free-air
temperature (unless otherwise noted)
PARAMETER
TEST CONDITIONS
VIC = –7 V to 7 V
VIC = 0 to 5.5 V
MIN
TYP†
MAX
0.2
VIT
IT+
threshold voltage
Differential input high
high-threshold
VO = VOH(min),
(
),
IOH = –440 µA
VIT
IT–
Differential input low-threshold
low threshold voltage
VO = 0.45 V,,
IOL = 8 mA
VIC = –7 V to 7 V
VIC = 0 to 5.5 V
Vhys
Hysteresis voltage (VIT+ – VIT–)
VIK
VOH
Enable input clamp voltage
VCC = 4.5 V,
VID = 200 mV,
II = –18 mA
IOH = –6 mA
VOL
IOZ
Low-level output voltage
VID = –200 mV,
VO = VCC or GND
IOL = 6 mA
II
Line input current
VI = 10 V,
VI = –10 V,
Other input at 0 V
1.5
Other input at 0 V
–2.5
IIH
IIL
High-level enable current
Low-level enable current
VI = 2.7 V
VI = 0.4 V
ri
Input resistance
One input to ground
0.1
–0.2‡
–0.1‡
Off-state (high-impedance state) output current
mV
–1.5
3.8
V
V
0.2
0.3
V
±0.5
±5
µA
20
–100
12
V
V
60
High-level output voltage
UNIT
17
mA
µA
µA
kΩ
ICC
Supply current
VCC = 5.5 V
10
15
mA
† All typical values are at VCC = 5 V, VIC = 0, and TA = 25°C.
‡ The algebraic convention, in which the less positive (more negative) limit is designated minimum, is used in this data sheet for common-mode
input voltage.
4
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AM26C32
QUADRUPLE DIFFERENTIAL LINE RECEIVER
SLLS104H – DECEMBER 1990 – REVISED FEBRUARY 2002
switching characteristics over recommended ranges of operation conditions, CL = 50 pF (unless
otherwise noted)
TEST
CONDITIONS
PARAMETER
tPLH
tPHL
Propagation delay time, low- to high-level output
tTLH
tTHL
Output transition time, low- to high-level output
tPZH
tPZL
Output enable time to high level
tPHZ
tPLZ
Output disable time from high level
Propagation delay time, high- to low-level output
Output transition time, high- to low-level output
Output enable time to low level
Output disable time from low level
See Figure 1
AM26C32C
AM26C32I
AM26C32Q
AM26C32M
UNIT
MIN
TYP†
MAX
MIN
TYP†
MAX
9
17
27
9
17
27
ns
9
17
27
9
17
27
ns
4
9
4
10
ns
4
9
4
9
ns
13
22
13
22
ns
13
22
13
22
ns
13
22
13
26
ns
13
22
13
25
ns
See Figure 1
See Figure 2
See Figure 2
† All typical values are at VCC = 5 V, TA = 25°C.
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5
AM26C32
QUADRUPLE DIFFERENTIAL LINE RECEIVER
SLLS104H – DECEMBER 1990 – REVISED FEBRUARY 2002
PARAMETER MEASUREMENT INFORMATION
90%
Output
A
Input
90%
10%
Device
Under
Test
B
tTHL
tTLH
VCC
10%
tPHL
tPLH
CL = 50 pF
(see Note A)
VOH
50%
VOL
2.5 V
0V
–2.5 V
Input
TEST CIRCUIT
VOLTAGE WAVEFORMS
NOTE A: CL includes probe and jig capacitance.
Figure 1. Switching Test Circuit and Voltage Waveforms
VCC
S1
VID = ±2.5 V
RL = 1 kΩ
G Input
G Input
A Input
Device
Under
Test
B Input
tPZL, tPLZ Measurement: S1 to VCC
tPZH, tPHZ Measurement: S1 to GND
CL = 50 pF
(see Note A)
TEST CIRCUIT
3V
G
1.3 V
0V
3V
G
(see Note B)
1.3 V
0V
tPZH
Output
(with VID = 2.5 V)
tPHZ
50%
tPHZ
VOH –0.5 V
VOH
VOL
tPZL
Output
(with VID = –2.5 V)
tPZH
VOH –0.5 V
tPLZ
tPZL
tPLZ
VOH
50%
VOL + 0.5 V
VOL + 0.5 V
VOL
VOLTAGE WAVEFORMS
NOTES: A. CL includes probe and jig capacitance.
B. The input pulse is supplied by a generator having the following characteristics: PRR = 1 MHz, duty cycle ≤ 50%, tr = tf = 6 ns.
Figure 2. Enable/Disable Time Test Circuit and Output Voltage Waveforms
6
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