ETC AT90SC3232CS

Features
General
• High-performance, Low-power Secure AVR® RISC Architecture
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– 133 Powerful Instructions (Most Executed in a Single Clock Cycle)
– Linear Addressing of up to 8M Bytes of Code and up to 16M Bytes of Data
Low-power Idle and Power-down Modes
Bond Pad Locations Conforming to ISO 7816-2
ESD Protection to ± 6000V
Operating Ranges: from 2.7V to 5.5V
Compliant with GSM, 3GPP and EMV 2000 Specifications; PC Industry Compatible
Available in Wafers, Modules and Industry-standard Packages
Memory
• 32K Bytes of Flash Program Memory
• 32K Bytes of EEPROM, Including 128-byte OTP Area and 384-byte Bit-addressable Area
– 1 to 128-byte Program/Erase
– 2 ms Program, 2 ms Erase
– Typically 1,000,000 Write/Erase Cycles
– 10 Years Data Retention
• 3K Bytes of RAM
Secure
Microcontroller
for Smart Cards
AT90SC3232CS
Preliminary
Peripherals
• ISO 7816 Controller
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– Up to 625 kbs at 5 MHz
– Compliant with T = 0 and T = 1 Protocols
Two I/O Ports (Configurable to Support Communication Protocols Including 2-wire
Interfaces)
Serial Peripheral Interface (SPI) Controller
Programmable Internal Oscillator (Up to 16 MHz on ROM)
Two 16-bit Timers
Random Number Generator (RNG)
2-level, 8-vector Interrupt Controller
Hardware DES and Triple DES DPA Resistant
Checksum Accelerator
CRC 16 Engine (Compliant with ISO/IEC 3309)
8-bit GF(2n) Multiplier
Crypto-coprocessor (Pre-programmed Functions for Cryptography and Authentication
Including RSA, DSA, Key Generation, ECC)
Security
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Dedicated Hardware for Protection Against SPA/DPA Attacks
Advanced Protection Against Physical Attack, Including Active Shield
Environmental Protection Systems
Voltage Monitor
Frequency Monitor
Temperature Monitor
Secure Memory Management/Access Protection (Supervisor Mode)
Development Tools
• Hardware/Software Development Support on Voyager Emulation Platform (ATV1)
• IAR Systems C-Spy® Debugger
• Software Libraries and Application Notes
Rev. 1572BS–SMIC–10/02
Note: This is a summary document. A complete document will be1
available under NDA. For more information, please contact your
local Atmel sales office.
Description
The AT90SC3232CS is a low-power, high-performance, 8-/16-bit microcontroller, based
on the secure AVR RISC architecture, with Flash program memory, EEPROM data
memory and a crypto-coprocessor. By executing powerful instructions in a single clock
cycle, the AT90SC3232CS achieves throughputs close to 1 MIPS per MHz. Its Harvard
architecture includes 32 general-purpose working registers directly connected to the
ALU, allowing two independent registers to be accessed in one single instruction executed in one clock cycle.
The AT90SC3232CS uses a new secure AVR CPU that allows the linear addressing of
up to 8M bytes of code and up to 16M bytes of data, and also provides a number of new
functional and security features.
The AT90SC3232CS includes 64K bytes of Atmel’s high density, non volatile memory.
The on-chip Flash allows the program memory to be reprogrammed in-system and
locked securely. This technology combined with the versatile CPU on a monolithic chip
provides a highly flexible and cost-effective solution to many smart card applications.
The crypto engine featured in the AT90SC series is the SC16, a 16-bit processor dedicated to performing fast encryption and authentication functions.
Additional security features include power, frequency and temperature protection logic,
logical scrambling on program data and addresses, power analysis countermeasures,
and memory accesses controlled by a supervisor mode.
A block diagram of the AT90SC3232CS is shown in Figure 1.
2
AT90SC3232CS
1572BS–SMIC–10/02
AT90SC3232CS
Figure 1. The AT90SC3232CS AVR RISC Architecture
Data Bus
8-bit
OTP
Access
Control
RNG
EEPROM
User Memory
PC
X
16
Instruction
Register
8
GND
VCC
ROM
RAM
Data Memory
8
Interrupt
Unit
ALU
8
16
Control
Lines
Access
Control
Y
Z
16
Instruction
Decoder
SC16
CryptoCoprocessor
General
Purpose
Registers
Flash Program
Memory
CLK
Secure
Control
Status
Register
ISO 7816
Controller
ISO 7816
I/O Port 0
IN/OUT0
ISO 7816
I/O Port 1
IN/OUT1
SS
SPI
Controller
MOSI
MISO
SCK
Timer
DES
Reset
Circuit
RST
DPA Counter
measures
CRC and
Checksum
Accelerator
3
1572BS–SMIC–10/02
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© Atmel Corporation 2002.
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1572BS–SMIC–10/02
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