GS70328SJ/TS 32K x 8 256Kb Asynchronous SRAM SOJ, TSOP Commercial Temp Industrial Temp 6, 7, 8, 10, 12 ns 3.3 V VDD Corner VDD and VSS Features • Fast access time: 6, 7, 8, 10, 12 ns • 90/75/65/50/50 mA at max cycle rate • Single 3.3 V ± 0.3 V power supply • All inputs and outputs are TTL-compatible • Fully static operation • Industrial Temperature Option: –40° to 85°C • Package line up SJ: 300 mil, 28-pin SOJ package TS: 8 mm x 13.4 mm, 28-pin TSOP Type I package Pin Descriptions Symbol Description A0–A14 Address input DQ1–DQ8 Data input/output CE Chip enable input WE Write enable input OE Output enable input VDD +3.3 V power supply VSS Ground NC No connect Description The GS70328 is a high speed CMOS static RAM organized as 32,763 words by 8 bits. Static design eliminates the need for external clocks or timing strobes. The GS70328 operates on a single 3.3 V power supply, and all inputs and outputs are TTLcompatible. The GS70328 is available in 300 mil, 28-pin SOJ and 8 x 13.4 mm2, 28-pin TSOP Type-I packages. Pin Configuration Top view A14 1 28 A12 2 27 WE A7 3 26 A13 A6 4 25 A8 A5 5 24 A9 A4 6 23 A11 A3 7 22 OE 21 A10 20 CE 28-pin 300 mil VDD A2 8 A1 9 A0 10 19 DQ8 DQ1 11 18 DQ7 DQ2 12 17 DQ6 DQ3 13 16 DQ5 VSS 14 15 DQ4 Rev: 1.08 12/2000 SOJ OE A11 A9 A8 A13 WE VDD A14 A12 A7 A6 A5 A4 A3 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28- pin 8 x 13.4 TSOP I 1/12 Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com. 28 27 26 25 24 23 22 21 20 19 18 17 16 15 A10 CE DQ8 DQ7 DQ6 DQ5 DQ4 VSS DQ3 DQ2 DQ1 A0 A1 A2 © 1999, Giga Semiconductor, Inc. GS70328SJ/TS Block Diagram A0 Address Input Buffer Row Decoder Memory Array Column Decoder A14 CE WE OE I/O Buffer Control DQ1 DQ8 Truth Table CE OE WE DQ1 to DQ8 VDD Current H X X Not Selected ISB1, ISB2 L L H Read L X L Write L H H High Z IDD Note: X: “H” or “L” Absolute Maximum Ratings Parameter Symbol Rating Unit Supply Voltage VDD –0.5 to +4.6 V Input Voltage VIN –0.5 to VDD + 0.5 (≤ 4.6 V max.) V Output Voltage VOUT –0.5 to VDD + 0.5 (≤ 4.6 V max.) V Allowable power dissipation PD 0.7 W Storage temperature TSTG –55 to 150 oC Note: Permanent device damage may occur if Absolute Maximum Ratings are exceeded. Functional operation shall be restricted to Recommended Operating Conditions. Exposure to higher than recommended voltages for extended periods of time could affect device reliability. Rev: 1.08 12/2000 2/12 Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com. © 1999, Giga Semiconductor, Inc. GS70328SJ/TS Recommended Operating Conditions Parameter Symbol Minimum Typical Maximum Unit Supply Voltage for -7/8/10/12 VDD 3.0 3.3 3.6 V Supply Voltage for -6 VDD 3.135 3.3 3.6 V Input High Voltage VIH 2.0 — VDD + 0.3 V Input Low Voltage VIL –0.3 — 0.8 V Ambient Temperature, Commercial Range TAc 0 — 70 o C Ambient Temperature, Industrial Range T AI –40 — 85 o C Notes: 1. Input overshoot voltage should be less than VDD +2 V and not exceed 20 ns. 2. Input undershoot voltage should be greater than –2 V and not exceed 20 ns. Capacitance Parameter Symbol Test Condition Maximum Unit Input Capacitance CIN VIN = 0 V 5 pF Output Capacitance COUT VOUT = 0 V 7 pF Notes: 1. Tested at TA = 25°C, f = 1 MHz 2. These parameters are sampled and are not 100% tested. DC I/O Pin Characteristics Parameter Symbol Test Conditions Min Max Input Leakage Current IIL VIN = 0 to VDD –1uA 1uA Output Leakage Current ILO Output High Z VOUT = 0 to VDD –1uA 1uA Output High Voltage VOH IOH = –4 mA 2.4 V — Output Low Voltage VOL ILO = +4 mA — 0.4 V Rev: 1.08 12/2000 3/12 Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com. © 1999, Giga Semiconductor, Inc. GS70328SJ/TS Power Supply Currents Parameter Symbol Test Conditions Operating Supply Current Standby Current Standby Current 0 to 70°C 6 ns 7 ns -40 to 85°C 8 ns 10 ns 12 ns 6 ns 7 ns 8 ns 10 ns 12 ns IDD CE ≤ VIL All other inputs ≥ VIH or ≤ VIL Min. cycle time IOUT = 0 mA 90 mA 75 mA 65 mA 50 mA 50 mA 95 mA 80 mA 70 mA 55 mA 55 mA ISB1 CE ≥ VIH All other inputs ≥ VIH or ≤VIL Min. cycle time 45 mA 35 mA 30 mA 25 mA 25 mA 50 mA 40 mA 35 mA 30 mA 30 mA ISB2 CE ≥ VDD – 0.2 V All other inputs ≥ VDD – 0.2 V or ≤ 0.2 V 1 mA 2 mA AC Test Conditions Output Load 1 Parameter Conditions Input high level VIH = 2.4 V Input low level VIL = 0.4 V 50Ω Input rise time tr = 1 V/ns VT = 1.4 V Input fall time tf = 1 V/ns Input reference level 1.4 V Output Load 2 Output reference level 1.4 V 3.3 V Output load Fig. 1& 2 DQ Rev: 1.08 12/2000 589Ω DQ Notes: 1. Include scope and jig capacitance 2. Test conditions as specified with output loading as shown in Fig. 1 unless otherwise noted 3. Output load 2 for tLZ, tHZ, tOLZ and tOHZ 4/12 Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com. 30pF1 5pF1 434Ω © 1999, Giga Semiconductor, Inc. GS70328SJ/TS AC Characteristics Read Cycle Parameter Symbol Read cycle time -6 -7 -8 -10 -12 Unit Min Max Min Max Min Max Min Max Min Max tRC 6 — 7 — 8 — 10 — 12 — ns Address access time tAA — 6 — 7 — 8 — 10 — 12 ns Chip enable access time (CE) tAC — 6 — 7 — 8 — 10 — 12 ns Output enable to output valid (OE) tOE — 3 — 3.5 — 4 — 5 — 6 ns Output hold from address change tOH 2 — 2 — 2 — 2 — 3 — ns Chip enable to output in low Z (CE) tLZ* 2 — 2 — 2 — 2 — 3 — ns Output enable to output in low Z (OE) tOLZ* 0 — 0 — 0 — 0 — 0 — ns Chip disable to output in High Z (CE) tHZ* — 3 — 3.5 — 4 — 5 — 6 ns Output disable to output in High Z (OE) tOHZ* — 3 — 3 — 3.5 — 4 — 5 ns * These parameters are sampled and are not 100% tested Rev: 1.08 12/2000 5/12 Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com. © 1999, Giga Semiconductor, Inc. GS70328SJ/TS Read Cycle 1: CE = OE = VIL, WE = VIH tRC Address tAA tOH Data Out Previous Data Data valid Read Cycle 2: WE = VIH tRC Address tAA CE tAC tHZ tLZ OE tOE Data Out Rev: 1.08 12/2000 tOLZ High impedance tOHZ DATA VALID 6/12 Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com. © 1999, Giga Semiconductor, Inc. GS70328SJ/TS Write Cycle Parameter Symbol Write cycle time -6 -7 -8 -10 -12 Unit Min Max Min Max Min Max Min Max Min Max tWC 6 — 7 — 8 — 10 — 12 — ns Address valid to end of write tAW 4.5 — 5 — 5.5 — 7 — 10 — ns Chip enable to end of write tCW 4.5 — 5 — 5.5 — 7 — 10 — ns Data set up time tDW 3 — 3.5 — 4 — 5 — 7 — ns Data hold time tDH 0 — 0 — 0 — 0 — 0 — ns Write pulse width tWP 4.5 — 5 — 5.5 — 7 — 10 — ns Address set up time tAS 0 — 0 — 0 — 0 — 0 — ns Write recovery time (WE) tWR 0 — 0 — 0 — 0 — 0 — ns Write recovery time (CE) tWR1 0 — 0 — 0 — 0 — 0 — ns Output Low Z from end of write tWLZ* 2 — 2 — 2 — 2 — 3 — ns Write to output in High Z tWHZ* — 3 — 3 — 3.5 — 4 — 5 ns * These parameters are sampled and are not 100% tested Rev: 1.08 12/2000 7/12 Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com. © 1999, Giga Semiconductor, Inc. GS70328SJ/TS Write Cycle 1: WE control tWC Address tAW tWR OE tCW CE tAS tWP WE tDW Data In tDH DATA VALID tWHZ tWLZ Data Out HIGH IMPEDANCE Write Cycle 2: CE control tWC Address tAW tWR1 OE tAS tCW CE tB W UB, LB tWP WE tDW Data In DATA VALID Data Out Rev: 1.08 12/2000 tDH HIGH IMPEDANCE 8/12 Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com. © 1999, Giga Semiconductor, Inc. GS70328SJ/TS 28-Pin SOJ, 300 mil Dimension in inch L D e A A1 A A2 1 GE E HE c y B B1 Detail A Θ Dimension in mm Symbol min nom max min nom max A — — 0.148 — — 3.76 A1 0.025 — — 0.64 — — A2 0.095 0.100 0.105 2.41 2.54 2.67 B 0.015 — 0.020 0.38 — 0.51 B1 0.026 0.028 0.032 0.66 0.71 0.81 c D 0.008 0.705 0.010 0.71 0.012 0.715 0.20 17.91 0.25 18.03 0.30 18.16 E 0.295 0.300 0.305 7.49 7.62 7.75 e — 0.05 — — 1.27 — HE 0.330 0.335 0.340 8.38 8.51 8.64 GE 0.255 0.265 0.275 6.48 6.73 6.985 L 0.082 — — 2.08 — — y — — 0.004 — — 0.10 Θ o o — 10o 0 — 10 o 0 Notes: 1. Dimension D& E do not include interlead flash 2. Dimension B1 does not include dambar protrusion/intrusion 3. Controlling dimension: inches Rev: 1.08 12/2000 9/12 Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com. © 1999, Giga Semiconductor, Inc. GS70328SJ/TS 28-Pin TSOP-I, 8 mm x 13.4 mm Dimension in inch E c 28 L D 1 e GE E HE HD D c A A A2 A e yB B B1 L1 Detail A A1 L A A2 A1 1 y Detail A Rev: 1.08 12/2000 Θ Q Dimension in mm Symbol min nom max min nom max A — — 0.047 — — 1.20 A1 0.002 — 0.006 0.05 — 0.15 A2 0.035 0.040 0.041 0.90 1.00 1.05 B 0.007 0.008 0.011 0.17 0.20 0.27 D — 0.465 — — 11.8 — HD — .528 — — 13.4 — c 0.004 0.006 0.008 0.10 0.15 0.21 E — 0.315 — — 8.00 — e — 0.022 — — 0.55 — L 0.020 0.024 0.028 0.50 0.60 0.70 L1 0.024 0.032 0.040 0.60 0.80 1.00 y — — 0.003 — — 0.08 Θ 0o — 5o 0o — 5o Notes: 1. Dimension D& E do not include interlead flash 2. Dimension B1 does not include dambar protrusion/intrusion 3. Controlling dimension: inches 4. Profile tolerance zones for D and E do not include mold protrusion. Allowable mold protrusion on E is 0.15 mm per side and on D is 0.25 mm per side. 10/12 Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com. © 1999, Giga Semiconductor, Inc. GS70328SJ/TS Ordering Information Part Number* Package Access Time Temp. Range GS70328SJ-6 300-mil SOJ 6 ns Commercial GS70328SJ-7 300-mil SOJ 7 ns Commercial GS70328SJ-8 300-mil SOJ 8 ns Commercial GS70328SJ-10 300-mil SOJ 10 ns Commercial GS70328SJ-12 300-mil SOJ 12 ns Commercial GS70328SJ-6I 300-mil SOJ 6 ns Industrial GS70328SJ-7I 300-mil SOJ 7 ns Industrial GS70328SJ-8I 300-mil SOJ 8 ns Industrial GS70328SJ-10I 300-mil SOJ 10 ns Industrial GS70328SJ-12I 300-mil SOJ 12 ns Industrial GS70328TS-6 TSOP-I 8 x 13.4 mm2 6 ns Commercial GS70328TS-7 TSOP-I 8 x 13.4 mm2 7 ns Commercial GS70328TS-8 TSOP-I 8 x 13.4 mm2 8 ns Commercial GS70328TS-10 TSOP-I 8 x 13.4 mm2 10 ns Commercial GS70328TS-12 TSOP-I 8 x 13.4 mm2 12 ns Commercial GS70328TS-6I TSOP-I 8 x 13.4 mm2 6 ns Industrial GS70328TS-7I TSOP-I 8 x 13.4 mm2 7 ns Industrial GS70328TS-8I TSOP-I 8 x 13.4 mm2 8 ns Industrial GS70328TS-10I TSOP-I 8 x 13.4 mm2 10 ns Industrial GS70328TS-12I TSOP-I 8 x 13.4 mm2 12 ns Industrial Status * Customers requiring delivery in Tape and Reel should add the character “T” to the end of the part number. For example: GS70328TP-8T Rev: 1.08 12/2000 11/12 Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com. © 1999, Giga Semiconductor, Inc. GS70328SJ/TS Revision History Rev. Code: Old; New Types of Changes Format or Content 1.03 8/1999; 1.04 11/1999 Content GS70328Rev1.04 12/1999KRev 1.05 2/2000L Rev 1.05 2/2000L; Rev1.06 6/2000 Rev1.06; Rev1.07 70328_r1_07; 70328_r1_08 Rev: 1.08 12/2000 Format/Content Content Format/Content Content Page #/Revisions/Reason • Added 12ns speed bin information to 70328 datasheet. • GSI Logo • Nominal value for HD on the TSOP-I 28-pin package changed to 13.4 • Updated format to conform to Tech Pubs standards • Corrected errors in both case diagrams • Added 12 ns reference to Parameter column in Recommended Operating Conditions table on page 3 12/12 Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com. © 1999, Giga Semiconductor, Inc.