ICE23(L)M010 1 Megabit Mask ROM General Description The ICE23M010/ICE23LM010 is a high-speed 1M bits CMOS mask ROM , with 128K X 8 bit data structure. Features 1. 2. 3. 4. 5. 6. 7. 8. 70ns access time 128K x 8 bits 3.3V / 5V operating option CMOS / TTL I/O option CE / CEB select option OE / OEB select option Standby current : <5uA 32 Pins PDIP, SOP, TSOP or PLCC Package. A12 4 29 A14 A7 5 28 A13 A6 6 A5 7 A4 8 32Pin PDIP 27 A8 26 A9 25 A11 A3 9 24 OEB A2 10 23 A10 A1 11 22 CEB A0 12 21 D7 D0 13 20 D6 D1 14 19 D5 D2 15 18 D4 GND 16 17 D3 N/C 4 3 2 1 32 31 30 A7 5 29 A14 A6 6 28 A13 A5 7 27 A8 A4 8 26 A9 32-Lead PLCC A3 9 25 A11 A2 10 24 OEB A1 11 23 A10 A0 12 22 CEB D0 13 21 D7 14 15 16 17 18 19 20 D6 N/C N/C 30 VCC 3 D5 A15 D4 N/C N/C 31 A16 2 D3 A16 GND VCC A15 32 D2 1 D1 N/C A12 Pin Definition Pin Assignments for 32-pin Plastic DIPs and 32-Lead PLCCs 1 ICE semiconductor, inc. Rev.1.1 2003/2/20 N/C N/C A14 A13 A8 A9 A11 OEB A10 CEB D7 D6 D5 D4 D3 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 N/C A16 A15 A12 A7 A6 A5 A4 A3 A2 A1 A0 D0 D1 D2 GND VDD ICE23(L)M010 Pin Assignment of 32-Pin SOP A11 A9 A8 A13 A14 N/C N/C OEB A10 CEB D7 D6 D5 D4 VDD N/C A16 A15 A12 A7 A6 A5 A4 D3 GND D2 D1 D0 A0 A1 A2 A3 Pin Assignment of 32-Pin TSOP PIN DESCRIPTION Name VDD GND CE/CEB OE/OEB A0-16 DO0-7 I/O P P I I I O Description Positive power supply. Negative power supply. Chip enable input. Output enable input. Address input. Data output. ABSOLOUTE MAXIMUM RATINGS Name Supply Voltage Input Voltage Operating temperature Storage temperature Symbol VDD Vin Topg Tstg Rating -0.3 to +7.0 -0.5 to VDD +0.5 -20 to +70 -65 to +125 2 Unit V V °C °C ICE semiconductor, inc. Rev.1.1 2003/2/20 ICE23(L)M010 ALLOWABLE OPERATING CONDITIONS Name Symbol MIN TYP MAX Unit Supply Voltage 3.3V VDD 2.6 3.3 3.6 V Supply Voltage 5V VDD 4.5 5.0 5.5 V Vi -0.3 VDD+0.3 V Input Voltage DC ELECTRICAL CHARACTERISTICS @VDD= 4.5~5.5V, T= -20~70°C, TTL Item Symbol Condition MIN MAX Unit Output high current Ioh Voh=VDD-0.5V - -500 uA Output low current Iol Vol=0.5V 2 - mA Input high voltage Vih - 2.2 - V Input low voltage Vil - - 0.8 V Symbol Condition MIN MAX Unit Output high current Ioh Voh=VDD-0.5V - -2 mA Output low current Iol Vol=0.5V 2 - mA Input high voltage Vih - 0.8xVDD - V Input low voltage Vil - - 0.2xVDD V Symbol MIN MAX Unit Read cycle time Trc 70 - ns Address access time Taa - 70 ns Chip enable access time Tce - 70 ns Output enable access time Toe - 40 ns Toh 0 - ns OE disable to invalid output Toz 0 20 ns CE disable to invalid output Tcz 0 20 ns @VDD= 2.6~3.6V, T= -20~70°C, CMOS Item AC ELECTRICAL CHARACTERISTICS @VDD= 4.5~5.5V, T= -20~70°C, TTL Vih / Vil = Min / Max, Tr = Tf = 10ns, Cl = 50pF Item Output hold time from addresses change 3 ICE semiconductor, inc. Rev.1.1 2003/2/20 ICE23(L)M010 @VDD= 2.6~3.6V, T= -20~70°C, CMOS Vih / Vil = Min / Max, Tr = Tf = 10ns, Cl = 50pF Item Symbol MIN MAX Unit Read cycle time Trc 100 - ns Address access time Taa - 100 ns Chip enable access time Tce - 100 ns Output enable access time Toe - 40 ns Toh 0 - ns OE disable to invalid output Toz 0 20 ns CE disable to invalid output Tcz 0 20 ns Output hold time from addresses change TRC TAA A[16:0] TC Z TC E CEB T TO Z OE OEB TOH D[7:0] DATA VALID DATA VALID Figure 2: Read Cycle Timing diagram PACKAGE INFORMATION 32-Pin PDIP 32 ITEM A B C D E F G H I J K L M MILLIMETERS 42.13max. 1.90[REF] 2.54[TP] .46[TyP] 38.07 1.27[TyP] 3.30±.25 .51[REF] 3.94±.25 5.33max. 15.22±.25 13.97±.25 .25[TYP] INCHES 1.660max .075[REF] .100[TP] .018[TyP] 1.500 .050[TyP] .130±.010 .020[REF] .155±.010 .210max .600±.010 .550±.010 .010[TYP] 17 1 16 K L A I J H G NOTE: Each lead centerline is located within .25 mm[.01 inch] of its true position [TP] at maximum matrial condtion. F D C E B M 0~15i 32-Pin SOP 4 ICE semiconductor, inc. Rev.1.1 2003/2/20 ICE23(L)M010 ITEM MILLIMETERS INCHES A 20.95max. .825max B 1.00[REF] .039[REF] C 1.27[TP] .050[TP] D .40[TyP] .016[TyP] E .05min. .0002min. F 3.05max. .120max. G 2.69±.13 .106±.005 H 14.12±.25 .556±.010 I 11.30±.13 .445±.005 J 1.42 .056 K .20[TYP] .008[TYP] L .79 .031 NOTE: Each lead centerline is located within .25 mm[.01 inch] of its true position [TP] at maximum matrial condtion. 32 17 1 16 H I A G J F K L E D B C 32-Pin TSOP ITEM A B C D E F G H I J K L M N MILLIMETERS 20.0±.20 18.40±.10 8.20max. .15[Typ.] .80[Typ.] .20±.10 .30±.10 .50[Typ.] .45max. 0~.20 1.00±.10 1.27max. .50 0~5。 INCHES .078±.006 .724±.004 .323max. .006[Typ.] .031[Typ.] .008±.004 .012±.004 .020[TyP] .018max. 0~.008 .039±.004 .050max .020 .500 A B C N M K L NOTE: Each lead centerline is located within .25 mm[.01 inch] of its true position [TP] D at maximum material condition. E 5 F G H I J ICE semiconductor, inc. Rev.1.1 2003/2/20 ICE23(L)M010 32-Pin PLCC A B 4 ITEM A B C D E F G H I J K L M N MILLIMETERS 12.44max. 11.50±.13 14.04±.13 14.98±.13 1.93 3.30±.25 2.03±.13 .51±.13 1.27[TyP] .71[REF] .46[REF] 10.40/12.94 (W) (L) .89R .25[TyP] INCHES .490±.005 .453±.005 .553±.005 .590±.005 .076 .130±.010 .080±.005 .20±.005 .050[TyP] .028[REF] .018[REF] .410/.510 (W) (L) .035R .10[TyP] 1 32 30 29 5 NOTE: Each lead centerline is located within .25 mm[.01 inch] of its true position [TP] at maximum material condition. 9 25 13 21 14 C 20 E 17 F G D N H M I J K L 6 ICE semiconductor, inc. Rev.1.1 2003/2/20