ETC UPD29F032202AL-X

DATA SHEET
MOS INTEGRATED CIRCUIT
µPD29F032202AL-X
32M-BIT CMOS LOW-VOLTAGE DUAL OPERATION FLASH MEMORY
4M-WORD BY 8-BIT (BYTE MODE) / 2M-WORD BY 16-BIT (WORD MODE)
Description
The µPD29F032202AL-X is a flash memory organized of 33,554,432 bits and 71 sectors. Sectors of this memory
can be erased at a low voltage (2.7 to 3.3 V, 3.0 to 3.6 V) supplied from a single power source, or the contents of the
entire chip can be erased. Two modes of memory organization, BYTE mode (4,194,304 words × 8 bits) and WORD
mode (2,097,152 words × 16 bits), are selectable so that the memory can be programmed in byte or word units.
The µPD29F032202AL-X can be read while its contents are being erased or programmed. The memory cell is
divided into two banks. While sectors in one bank are being erased or programmed, data can be read from the other
bank thanks to the simultaneous execution architecture. The banks are 4M bits and 28M bits.
This flash memory comes in two types. The T type has a boot sector located at the highest address (sector) and the
B type has a boot sector at the lowest address (sector).
Because the µPD29F032202AL-X enables the boot sector to be erased, it is ideal for storing a boot program. In
addition, program code that controls the flash memory can be also stored, and the program code can be
programmed or erased without the need to load it into RAM. Eight small sectors for storing parameters are provided,
each of which can be erased in 8K bytes units.
Once a program or erase command sequence has been executed, an automatic program or automatic erase
function internally executes program or erase and verification automatically.
Because the µPD29F032202AL-X can be electrically erased or programmed by writing an instruction, data can be
reprogrammed on-board after the flash memory has been installed in a system, making it suitable for a wide range of
applications.
This flash memory is packed in a 48-pin PLASTIC TSOP (I) and 63-pin TAPE FBGA.
Features
• Two bank organization enabling simultaneous execution of program / erase and read
• Bank organization: 2 banks (4M bits + 28M bits)
• Memory organization : 4,194,304 words × 8 bits (BYTE mode)
2,097,152 words × 16 bits (WORD mode)
• Sector organization : 71 sectors (8K bytes / 4K words × 8 sectors, 64K bytes / 32K words × 63 sectors)
• 2 types of sector organization
• T type : Boot sector allocated to the highest address (sector)
• B type : Boot sector allocated to the lowest address (sector)
• 3-state output
• Automatic program
• Program suspend / resume
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all devices/types available in every country. Please check with local NEC representative for
availability and additional information.
Document No. M14911EJ7V0DS00 (7th edition)
Date Published September 2002 NS CP (K)
Printed in Japan
The mark ★ shows major revised points.
©
2001
µPD29F032202AL-X
• Unlock bypass program
• Automatic erase
• Chip erase
• Sector erase (sectors can be combined freely)
• Erase suspend / resume
• Program / Erase completion detection
• Detection through data polling and toggle bits
• Detection through RY (/BY) pin
• Sector group protection
• Any sector group can be protected
• Any protected sector group can be temporary unprotected
• Sectors can be used for boot application
• Hardware reset and standby using /RESET pin
• Automatic sleep mode
• Boot block sector protect by /WP (ACC) pin
• Conforms to common flash memory interface (CFI)
• Extra One Time Protect Sector provided
µPD29F032202AL
Access time
ns (MAX.)
-A85TX, -A85BX
Operating supply
voltage
V
85
3.0 to 3.6
-B85TX, -B85BX
2.7 to 3.3
• Operating ambient temperature: –25 to +85°C
• Program / erase time
• Program : 9.0 µs / byte (TYP.)
11.0 µs / word (TYP.)
• Sector erase :
Program / erase cycle : 100,000 cycles
0.3 s (TYP.) (4K words sector), 0.5 s (TYP.) (32K words sector)
Program / erase cycle : 300,000 cycles
0.5 s (TYP.) (4K words sector), 0.7 s (TYP.) (32K words sector)
• Program / erase cycle : 300,000 cycles (MIN.)
2
Data Sheet M14911EJ7V0DS
Power supply current
(Active mode)
mA (MAX.)
Read
Program / Erase
16
30
Standby current
µA (MAX.)
5
µPD29F032202AL-X
Ordering Information
Part number
Access time
Operating
ns (MAX.)
supply voltage
Boot sector
Package
V
µPD29F032202ALGZ-A85TX-MJH
85
3.0 to 3.6
Top address (sector)
(T type)
µPD29F032202ALGZ-A85BX-MJH
48-pin PLASTIC TSOP (I) (12 × 20)
(Normal bent)
Bottom address (sector)
(B type)
µPD29F032202ALF9-A85TX-BS2
Top address (sector)
63-pin TAPE FBGA (11 × 7)
(T type)
µPD29F032202ALF9-A85BX-BS2
Bottom address (sector)
(B type)
µPD29F032202ALGZ-B85TX-MJH
2.7 to 3.3
Top address (sector)
(T type)
µPD29F032202ALGZ-B85BX-MJH
48-pin PLASTIC TSOP (I) (12 × 20)
(Normal bent)
Bottom address (sector)
(B type)
µPD29F032202ALF9-B85TX-BS2
Top address (sector)
63-pin TAPE FBGA (11 × 7)
(T type)
µPD29F032202ALF9-B85BX-BS2
Bottom address (sector)
(B type)
Remark
For address organization of sectors, see section Sector Organization / Sector Address Table.
Data Sheet M14911EJ7V0DS
3
µPD29F032202AL-X
Pin Configurations
/xxx indicates active low signal.
48-pin PLASTIC TSOP (I) (12 × 20) (Normal bent)
[ µPD29F032202ALGZ-A85TX-MJH ]
[ µPD29F032202ALGZ-A85BX-MJH ]
[ µPD29F032202ALGZ-B85TX-MJH ]
[ µPD29F032202ALGZ-B85BX-MJH ]
Marking Side
A15
A14
A13
A12
A11
A10
A9
A8
A19
A20
/WE
/RESET
NC
/WP (ACC)
RY (/BY)
A18
A17
A7
A6
A5
A4
A3
A2
A1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
A0 to A20
: Address inputs
I/O0 to I/O14 : Data Inputs / Outputs
I/O15, A−1
: Data 15 Input / output (WORD mode)
/CE
: Chip Enable
LSB address input (BYTE mode)
/WE
: Write Enable
/OE
: Output Enable
/BYTE
: Mode select
/RESET
: Hardware reset input
RY (/BY)
: Ready (Busy) output
/WP (ACC)
: Write Protect (Accelerated) input
VCC
: Supply Voltage
GND
: Ground
NC
Note
: No Connection
Note Some signals can be applied because this pin is not connected to the inside of the chip.
Remark Refer to Package Drawings for the 1-pin index mark.
4
Data Sheet M14911EJ7V0DS
A16
/BYTE
GND
I/O15, A−1
I/O7
I/O14
I/O6
I/O13
I/O5
I/O12
I/O4
VCC
I/O11
I/O3
I/O10
I/O2
I/O9
I/O1
I/O8
I/O0
/OE
GND
/CE
A0
µPD29F032202AL-X
63-pin TAPE FBGA (11 × 7)
[ µPD29F032202ALF9-A85TX-BS2]
[ µPD29F032202ALF9-A85BX-BS2]
[ µPD29F032202ALF9-B85TX-BS2]
[ µPD29F032202ALF9-B85BX-BS2]
Top View
Bottom View
Top View
Bottom View
8
7
6
5
4
3
2
1
A B C D E F G H J K L M
A B C D E F G H
8
7
A
B
NC
NC
8
NC
7
NC
6
C
6
5
5
4
4
3
3
2
NC
1
NC
2
NC
1
D
E
A
B
A3
A0 to A20
H G F E D C B A
FTop View
G
C
A15
A13
A12
A12
A11
A9
A8
A19
A8
/WE
/RESET
CE2s
/WE
RY(/BY) /WP(ACC)
/WP(ACC) /RESET
A7
A17
/LB
/UB
A4
A3
A7
A6
M L K J H G F E D C B A
Top View
NC
A14
A13
A10
A9
NC
A20
A18
RY(/BY)
A6
A18
A2
A5
A2
D
H
E
NC
A15
A14
A11
A10
A19
A16
A16
SA
I/O7
I/O6
I/O5
A20
I/O2
A5
A17
A1
A4
I/O0
I/O1
A0
VSS
A1
J
F
K
G
CIOf
VSS
/BYTE I/O15,A−1
I/O15, A-1 I/O7
I/O13
I/O14
I/O13
I/O12
I/O12
VCC
I/O4
VCCs
I/O11
I/O10
I/O3
VCCf
I/O9
I/O8
I/O9
I/O10
/OE
/CE
/OE
I/O0
A0
/CEf
H
GND
I/O14
I/O6
I/O5
I/O4
CIOs
I/O3
I/O11
I/O1
I/O2
GND
I/O8
L
M
NC
NC
NC
NC
NC
NC
NC
NC
/CE1s
: Address inputs
I/O0 to I/O14 : Data Inputs / Outputs
I/O15, A−1
: Data 15 Input / output (WORD mode)
/CE
: Chip Enable
LSB address input (BYTE mode)
/WE
: Write Enable
/OE
: Output Enable
/BYTE
: Mode select
/RESET
: Hardware reset input
RY (/BY)
: Ready (Busy) output
/WP (ACC)
: Write Protect (Accelerated) input
VCC
: Supply Voltage
GND
: Ground
NC
Note
: No Connection
Note Some signals can be applied because this pin is not connected to the inside of the chip.
Remark Refer to Package Drawings for the index mark.
INPUT / OUTPUT PIN FUNCTION
Refer to DUAL OPERATION FLASH MEMORY 32M BITS A SERIES Information (M14914E).
Data Sheet M14911EJ7V0DS
5
µPD29F032202AL-X
Block Diagram
A0 to A20
Address
buffers
Bank 2 address
Address latch
VCC
GND
X-decoder
Cell matrix
(Bank 2)
Y-decoder
Y-gating
Bank / Sector
decoder
I/O0 to I/O15, A−1
/WP(ACC)
SA / WC
Program / Erase
voltage generator
/RESET
/WE
/BYTE
/CE
/OE
State
control
(Command
register)
Data latch
SA / WC
Bank 1 address
6
Address latch
RY (/BY)
Y-decoder
Y-gating
X-decoder
Cell matrix
(Bank 1)
Data Sheet M14911EJ7V0DS
Input / Output
buffers
µPD29F032202AL-X
Sector Organization / Sector Address Table
[ -A85TX, -B85TX ]
(1/2)
Bank
Sector
Organization
K bytes / K words
Bank 1
8/4
8/4
8/4
8/4
8/4
8/4
8/4
8/4
64/32
64/32
64/32
64/32
64/32
64/32
64/32
Bank 2
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
Address
Sectors
Address
BYTE mode
WORD mode
3FFFFFH
3FE000H
3FDFFFH
3FC000H
3FBFFFH
3FA000H
3F9FFFH
3F8000H
3F7FFFH
3F6000H
3F5FFFH
3F4000H
3F3FFFH
3F2000H
3F1FFFH
3F0000H
3EFFFFH
3E0000H
3DFFFFH
3D0000H
3CFFFFH
3C0000H
3BFFFFH
3B0000H
3AFFFFH
3A0000H
39FFFFH
390000H
38FFFFH
380000H
37FFFFH
370000H
36FFFFH
360000H
35FFFFH
350000H
34FFFFH
340000H
33FFFFH
330000H
32FFFFH
320000H
31FFFFH
310000H
30FFFFH
300000H
2FFFFFH
2F0000H
2EFFFFH
2E0000H
2DFFFFH
2D0000H
2CFFFFH
2C0000H
2BFFFFH
2B0000H
2AFFFFH
2A0000H
29FFFFH
290000H
28FFFFH
280000H
27FFFFH
270000H
26FFFFH
260000H
25FFFFH
250000H
24FFFFH
240000H
23FFFFH
230000H
1FFFFFH
1FF000H
1FEFFFH
1FE000H
1FDFFFH
1FD000H
1FCFFFH
1FC000H
1FBFFFH
1FB000H
1FAFFFH
1FA000H
1F9FFFH
1F9000H
1F8FFFH
1F8000H
1F7FFFH
1F0000H
1EFFFFH
1E8000H
1E7FFFH
1E0000H
1DFFFFH
1D8000H
1D7FFFH
1D0000H
1CFFFFH
1C8000H
1C7FFFH
1C0000H
1BFFFFH
1B8000H
1B7FFFH
1B0000H
1AFFFFH
1A8000H
1A7FFFH
1A0000H
19FFFFH
198000H
197FFFH
190000H
18FFFFH
188000H
187FFFH
180000H
17FFFFH
178000H
177FFFH
170000H
16FFFFH
168000H
167FFFH
160000H
15FFFFH
158000H
157FFFH
150000H
14FFFFH
148000H
147FFFH
140000H
13FFFFH
138000H
137FFFH
130000H
12FFFFH
128000H
127FFFH
120000H
11FFFFH
118000H
A20
Sector Address Table
Bank Address Table
A19 A18 A17 A16 A15 A14
A13
A12
FSA70
1
1
1
1
1
1
1
1
1
FSA69
1
1
1
1
1
1
1
1
0
FSA68
1
1
1
1
1
1
1
0
1
FSA67
1
1
1
1
1
1
1
0
0
FSA66
1
1
1
1
1
1
0
1
1
FSA65
1
1
1
1
1
1
0
1
0
FSA64
1
1
1
1
1
1
0
0
1
FSA63
1
1
1
1
1
1
0
0
0
FSA62
1
1
1
1
1
0
x
x
x
FSA61
1
1
1
1
0
1
x
x
x
FSA60
1
1
1
1
0
0
x
x
x
FSA59
1
1
1
0
1
1
x
x
x
FSA58
1
1
1
0
1
0
x
x
x
FSA57
1
1
1
0
0
1
x
x
x
FSA56
1
1
1
0
0
0
x
x
x
FSA55
1
1
0
1
1
1
x
x
x
FSA54
1
1
0
1
1
0
x
x
x
FSA53
1
1
0
1
0
1
x
x
x
FSA52
1
1
0
1
0
0
x
x
x
FSA51
1
1
0
0
1
1
x
x
x
FSA50
1
1
0
0
1
0
x
x
x
FSA49
1
1
0
0
0
1
x
x
x
FSA48
1
1
0
0
0
0
x
x
x
FSA47
1
0
1
1
1
1
x
x
x
FSA46
1
0
1
1
1
0
x
x
x
FSA45
1
0
1
1
0
1
x
x
x
FSA44
1
0
1
1
0
0
x
x
x
FSA43
1
0
1
0
1
1
x
x
x
FSA42
1
0
1
0
1
0
x
x
x
FSA41
1
0
1
0
0
1
x
x
x
FSA40
1
0
1
0
0
0
x
x
x
FSA39
1
0
0
1
1
1
x
x
x
FSA38
1
0
0
1
1
0
x
x
x
FSA37
1
0
0
1
0
1
x
x
x
FSA36
1
0
0
1
0
0
x
x
x
FSA35
1
0
0
0
1
1
x
x
x
Data Sheet M14911EJ7V0DS
7
µPD29F032202AL-X
[ -A85TX, -B85TX ]
Bank
Sector
Organization
K bytes / K words
Bank 2
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
8
(2/2)
Address
Sectors
Address
BYTE mode
WORD mode
22FFFFH
220000H
21FFFFH
210000H
20FFFFH
200000H
1FFFFFH
1F0000H
1EFFFFH
1E0000H
1DFFFFH
1D0000H
1CFFFFH
1C0000H
1BFFFFH
1B0000H
1AFFFFH
1A0000H
19FFFFH
190000H
18FFFFH
180000H
17FFFFH
170000H
16FFFFH
160000H
15FFFFH
150000H
14FFFFH
140000H
13FFFFH
130000H
12FFFFH
120000H
11FFFFH
110000H
10FFFFH
100000H
0FFFFFH
0F0000H
0EFFFFH
0E0000H
0DFFFFH
0D0000H
0CFFFFH
0C0000H
0BFFFFH
0B0000H
0AFFFFH
0A0000H
09FFFFH
090000H
08FFFFH
080000H
07FFFFH
070000H
06FFFFH
060000H
05FFFFH
050000H
04FFFFH
040000H
03FFFFH
030000H
02FFFFH
020000H
01FFFFH
010000H
00FFFFH
000000H
117FFFH
110000H
10FFFFH
108000H
107FFFH
100000H
0FFFFFH
0F8000H
0F7FFFH
0F0000H
0EFFFFH
0E8000H
0E7FFFH
0E0000H
0DFFFFH
0D8000H
0D7FFFH
0D0000H
0CFFFFH
0C8000H
0C7FFFH
0C0000H
0BFFFFH
0B8000H
0B7FFFH
0B0000H
0AFFFFH
0A8000H
0A7FFFH
0A0000H
09FFFFH
098000H
097FFFH
090000H
08FFFFH
088000H
087FFFH
080000H
07FFFFH
078000H
077FFFH
070000H
06FFFFH
068000H
067FFFH
060000H
05FFFFH
058000H
057FFFH
050000H
04FFFFH
048000H
047FFFH
040000H
03FFFFH
038000H
037FFFH
030000H
02FFFFH
028000H
027FFFH
020000H
01FFFFH
018000H
017FFFH
010000H
00FFFFH
008000H
007FFFH
000000H
A20
Sector Address Table
Bank Address Table
A19 A18 A17 A16 A15 A14
A13
A12
FSA34
1
0
0
0
1
0
x
x
x
FSA33
1
0
0
0
0
1
x
x
x
FSA32
1
0
0
0
0
0
x
x
x
FSA31
0
1
1
1
1
1
x
x
x
FSA30
0
1
1
1
1
0
x
x
x
FSA29
0
1
1
1
0
1
x
x
x
FSA28
0
1
1
1
0
0
x
x
x
FSA27
0
1
1
0
1
1
x
x
x
FSA26
0
1
1
0
1
0
x
x
x
FSA25
0
1
1
0
0
1
x
x
x
FSA24
0
1
1
0
0
0
x
x
x
FSA23
0
1
0
1
1
1
x
x
x
FSA22
0
1
0
1
1
0
x
x
x
FSA21
0
1
0
1
0
1
x
x
x
FSA20
0
1
0
1
0
0
x
x
x
FSA19
0
1
0
0
1
1
x
x
x
FSA18
0
1
0
0
1
0
x
x
x
FSA17
0
1
0
0
0
1
x
x
x
FSA16
0
1
0
0
0
0
x
x
x
FSA15
0
0
1
1
1
1
x
x
x
FSA14
0
0
1
1
1
0
x
x
x
FSA13
0
0
1
1
0
1
x
x
x
FSA12
0
0
1
1
0
0
x
x
x
FSA11
0
0
1
0
1
1
x
x
x
FSA10
0
0
1
0
1
0
x
x
x
FSA9
0
0
1
0
0
1
x
x
x
FSA8
0
0
1
0
0
0
x
x
x
FSA7
0
0
0
1
1
1
x
x
x
FSA6
0
0
0
1
1
0
x
x
x
FSA5
0
0
0
1
0
1
x
x
x
FSA4
0
0
0
1
0
0
x
x
x
FSA3
0
0
0
0
1
1
x
x
x
FSA2
0
0
0
0
1
0
x
x
x
FSA1
0
0
0
0
0
1
x
x
x
FSA0
0
0
0
0
0
0
x
x
x
Data Sheet M14911EJ7V0DS
µPD29F032202AL-X
[ -A85BX, -B85BX ]
Bank
Sector
Organization
K bytes / K words
Bank 2
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
(1/2)
Address
Sectors
Address
BYTE mode
WORD mode
3FFFFFH
3F0000H
3EFFFFH
3E0000H
3DFFFFH
3D0000H
3CFFFFH
3C0000H
3BFFFFH
3B0000H
3AFFFFH
3A0000H
39FFFFH
390000H
38FFFFH
380000H
37FFFFH
370000H
36FFFFH
360000H
35FFFFH
350000H
34FFFFH
340000H
33FFFFH
330000H
32FFFFH
320000H
31FFFFH
310000H
30FFFFH
300000H
2FFFFFH
2F0000H
2EFFFFH
2E0000H
2DFFFFH
2D0000H
2CFFFFH
2C0000H
2BFFFFH
2B0000H
2AFFFFH
2A0000H
29FFFFH
290000H
28FFFFH
280000H
27FFFFH
270000H
26FFFFH
260000H
25FFFFH
250000H
24FFFFH
240000H
23FFFFH
230000H
22FFFFH
220000H
21FFFFH
210000H
20FFFFH
200000H
1FFFFFH
1F0000H
1EFFFFH
1E0000H
1DFFFFH
1D0000H
1CFFFFH
1C0000H
1FFFFFH
1F8000H
1F7FFFH
1F0000H
1EFFFFH
1E8000H
1E7FFFH
1E0000H
1DFFFFH
1D8000H
1D7FFFH
1D0000H
1CFFFFH
1C8000H
1C7FFFH
1C0000H
1BFFFFH
1B8000H
1B7FFFH
1B0000H
1AFFFFH
1A8000H
1A7FFFH
1A0000H
19FFFFH
198000H
197FFFH
190000H
18FFFFH
188000H
187FFFH
180000H
17FFFFH
178000H
177FFFH
170000H
16FFFFH
168000H
167FFFH
160000H
15FFFFH
158000H
157FFFH
150000H
14FFFFH
148000H
147FFFH
140000H
13FFFFH
138000H
137FFFH
130000H
12FFFFH
128000H
127FFFH
120000H
11FFFFH
118000H
117FFFH
110000H
10FFFFH
108000H
107FFFH
100000H
0FFFFFH
0F8000H
0F7FFFH
0F0000H
0EFFFFH
0E8000H
0E7FFFH
0E0000H
A20
Sector Address Table
Bank Address Table
A19 A18 A17 A16 A15 A14
A13
A12
FSA70
1
1
1
1
1
1
x
x
x
FSA69
1
1
1
1
1
0
x
x
x
FSA68
1
1
1
1
0
1
x
x
x
FSA67
1
1
1
1
0
0
x
x
x
FSA66
1
1
1
0
1
1
x
x
x
FSA65
1
1
1
0
1
0
x
x
x
FSA64
1
1
1
0
0
1
x
x
x
FSA63
1
1
1
0
0
0
x
x
x
FSA62
1
1
0
1
1
1
x
x
x
FSA61
1
1
0
1
1
0
x
x
x
FSA60
1
1
0
1
0
1
x
x
x
FSA59
1
1
0
1
0
0
x
x
x
FSA58
1
1
0
0
1
1
x
x
x
FSA57
1
1
0
0
1
0
x
x
x
FSA56
1
1
0
0
0
1
x
x
x
FSA55
1
1
0
0
0
0
x
x
x
FSA54
1
0
1
1
1
1
x
x
x
FSA53
1
0
1
1
1
0
x
x
x
FSA52
1
0
1
1
0
1
x
x
x
FSA51
1
0
1
1
0
0
x
x
x
FSA50
1
0
1
0
1
1
x
x
x
FSA49
1
0
1
0
1
0
x
x
x
FSA48
1
0
1
0
0
1
x
x
x
FSA47
1
0
1
0
0
0
x
x
x
FSA46
1
0
0
1
1
1
x
x
x
FSA45
1
0
0
1
1
0
x
x
x
FSA44
1
0
0
1
0
1
x
x
x
FSA43
1
0
0
1
0
0
x
x
x
FSA42
1
0
0
0
1
1
x
x
x
FSA41
1
0
0
0
1
0
x
x
x
FSA40
1
0
0
0
0
1
x
x
x
FSA39
1
0
0
0
0
0
x
x
x
FSA38
0
1
1
1
1
1
x
x
x
FSA37
0
1
1
1
1
0
x
x
x
FSA36
0
1
1
1
0
1
x
x
x
FSA35
0
1
1
1
0
0
x
x
x
Data Sheet M14911EJ7V0DS
9
µPD29F032202AL-X
[ -A85BX, -B85BX]
(2/2)
Bank
Sector
Organization
K bytes / K words
Bank 2
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
Bank 1
64/32
64/32
64/32
64/32
64/32
64/32
64/32
8/4
8/4
8/4
8/4
8/4
8/4
8/4
8/4
10
Address
Sectors
Address
BYTE mode
WORD mode
1BFFFFH
1B0000H
1AFFFFH
1A0000H
19FFFFH
190000H
18FFFFH
180000H
17FFFFH
170000H
16FFFFH
160000H
15FFFFH
150000H
14FFFFH
140000H
13FFFFH
130000H
12FFFFH
120000H
11FFFFH
110000H
10FFFFH
100000H
0FFFFFH
0F0000H
0EFFFFH
0E0000H
0DFFFFH
0D0000H
0CFFFFH
0C0000H
0BFFFFH
0B0000H
0AFFFFH
0A0000H
09FFFFH
090000H
08FFFFH
080000H
07FFFFH
070000H
06FFFFH
060000H
05FFFFH
050000H
04FFFFH
040000H
03FFFFH
030000H
02FFFFH
020000H
01FFFFH
010000H
00FFFFH
00E000H
00DFFFH
00C000H
00BFFFH
00A000H
009FFFH
008000H
007FFFH
006000H
005FFFH
004000H
003FFFH
002000H
001FFFH
000000H
0DFFFFH
0D8000H
0D7FFFH
0D0000H
0CFFFFH
0C8000H
0C7FFFH
0C0000H
0BFFFFH
0B8000H
0B7FFFH
0B0000H
0AFFFFH
0A8000H
0A7FFFH
0A0000H
09FFFFH
098000H
097FFFH
090000H
08FFFFH
088000H
087FFFH
080000H
07FFFFH
078000H
077FFFH
070000H
06FFFFH
068000H
067FFFH
060000H
05FFFFH
058000H
057FFFH
050000H
04FFFFH
048000H
047FFFH
040000H
03FFFFH
038000H
037FFFH
030000H
02FFFFH
028000H
027FFFH
020000H
01FFFFH
018000H
017FFFH
010000H
00FFFFH
008000H
007FFFH
007000H
006FFFH
006000H
005FFFH
005000H
004FFFH
004000H
003FFFH
003000H
002FFFH
002000H
001FFFH
001000H
000FFFH
000000H
A20
Sector Address Table
Bank Address Table
A19 A18 A17 A16 A15 A14
A13
A12
FSA34
0
1
1
0
1
1
x
x
x
FSA33
0
1
1
0
1
0
x
x
x
FSA32
0
1
1
0
0
1
x
x
x
FSA31
0
1
1
0
0
0
x
x
x
FSA30
0
1
0
1
1
1
x
x
x
FSA29
0
1
0
1
1
0
x
x
x
FSA28
0
1
0
1
0
1
x
x
x
FSA27
0
1
0
1
0
0
x
x
x
FSA26
0
1
0
0
1
1
x
x
x
FSA25
0
1
0
0
1
0
x
x
x
FSA24
0
1
0
0
0
1
x
x
x
FSA23
0
1
0
0
0
0
x
x
x
FSA22
0
0
1
1
1
1
x
x
x
FSA21
0
0
1
1
1
0
x
x
x
FSA20
0
0
1
1
0
1
x
x
x
FSA19
0
0
1
1
0
0
x
x
x
FSA18
0
0
1
0
1
1
x
x
x
FSA17
0
0
1
0
1
0
x
x
x
FSA16
0
0
1
0
0
1
x
x
x
FSA15
0
0
1
0
0
0
x
x
x
FSA14
0
0
0
1
1
1
x
x
x
FSA13
0
0
0
1
1
0
x
x
x
FSA12
0
0
0
1
0
1
x
x
x
FSA11
0
0
0
1
0
0
x
x
x
FSA10
0
0
0
0
1
1
x
x
x
FSA9
0
0
0
0
1
0
x
x
x
FSA8
0
0
0
0
0
1
x
x
x
FSA7
0
0
0
0
0
0
1
1
1
FSA6
0
0
0
0
0
0
1
1
0
FSA5
0
0
0
0
0
0
1
0
1
FSA4
0
0
0
0
0
0
1
0
0
FSA3
0
0
0
0
0
0
0
1
1
FSA2
0
0
0
0
0
0
0
1
0
FSA1
0
0
0
0
0
0
0
0
1
FSA0
0
0
0
0
0
0
0
0
0
Data Sheet M14911EJ7V0DS
µPD29F032202AL-X
Sector Group Address Table
[ -A85TX, -B85TX ]
Sector group
Size
Sector
A20
A19
A18
A17
A16
A15
A14
A13
A12
SGA0
0
0
0
0
0
0
×
×
×
64K Bytes (1 Sector)
SGA1
0
0
0
0
0
1
×
×
×
192K Bytes (3 Sectors) FSA1 to FSA3
1
0
1
1
FSA0
SGA2
0
0
0
1
×
×
×
×
×
256K Bytes (4 Sectors) FSA4 to FSA7
SGA3
0
0
1
0
×
×
×
×
×
256K Bytes (4 Sectors) FSA8 to FSA11
SGA4
0
0
1
1
×
×
×
×
×
256K Bytes (4 Sectors) FSA12 to FSA15
SGA5
0
1
0
0
×
×
×
×
×
256K Bytes (4 Sectors) FSA16 to FSA19
SGA6
0
1
0
1
×
×
×
×
×
256K Bytes (4 Sectors) FSA20 to FSA23
SGA7
0
1
1
0
×
×
×
×
×
256K Bytes (4 Sectors) FSA24 to FSA27
SGA8
0
1
1
1
×
×
×
×
×
256K Bytes (4 Sectors) FSA28 to FSA31
SGA9
1
0
0
0
×
×
×
×
×
256K Bytes (4 Sectors) FSA32 to FSA35
SGA10
1
0
0
1
×
×
×
×
×
256K Bytes (4 Sectors) FSA36 to FSA39
SGA11
1
0
1
0
×
×
×
×
×
256K Bytes (4 Sectors) FSA40 to FSA43
SGA12
1
0
1
1
×
×
×
×
×
256K Bytes (4 Sectors) FSA44 to FSA47
SGA13
1
1
0
0
×
×
×
×
×
256K Bytes (4 Sectors) FSA48 to FSA51
SGA14
1
1
0
1
×
×
×
×
×
256K Bytes (4 Sectors) FSA52 to FSA55
SGA15
1
1
1
0
×
×
×
×
×
256K Bytes (4 Sectors) FSA56 to FSA59
SGA16
1
1
1
1
0
0
×
×
×
192K Bytes (3 Sectors) FSA60 to FSA62
0
1
1
0
SGA17
1
1
1
1
1
1
0
0
0
8K Bytes (1 Sector)
FSA63
SGA18
1
1
1
1
1
1
0
0
1
8K Bytes (1 Sector)
FSA64
SGA19
1
1
1
1
1
1
0
1
0
8K Bytes (1 Sector)
FSA65
SGA20
1
1
1
1
1
1
0
1
1
8K Bytes (1 Sector)
FSA66
SGA21
1
1
1
1
1
1
1
0
0
8K Bytes (1 Sector)
FSA67
SGA22
1
1
1
1
1
1
1
0
1
8K Bytes (1 Sector)
FSA68
SGA23
1
1
1
1
1
1
1
1
0
8K Bytes (1 Sector)
FSA69
SGA24
1
1
1
1
1
1
1
1
1
8K Bytes (1 Sector)
FSA70
Remark × : VIH or VIL
Data Sheet M14911EJ7V0DS
11
µPD29F032202AL-X
[ -A85BX, -B85BX ]
Sector group
Size
Sector
A20
A19
A18
A17
A16
A15
A14
A13
A12
SGA0
0
0
0
0
0
0
0
0
0
8K Bytes (1 Sector)
FSA0
SGA1
0
0
0
0
0
0
0
0
1
8K Bytes (1 Sector)
FSA1
SGA2
0
0
0
0
0
0
0
1
0
8K Bytes (1 Sector)
FSA2
SGA3
0
0
0
0
0
0
0
1
1
8K Bytes (1 Sector)
FSA3
SGA4
0
0
0
0
0
0
1
0
0
8K Bytes (1 Sector)
FSA4
SGA5
0
0
0
0
0
0
1
0
1
8K Bytes (1 Sector)
FSA5
SGA6
0
0
0
0
0
0
1
1
0
8K Bytes (1 Sector)
FSA6
SGA7
0
0
0
0
0
0
1
1
1
8K Bytes (1 Sector)
FSA7
SGA8
0
0
0
0
0
1
×
×
×
192K Bytes (3 Sectors) FSA8 to FSA10
1
0
1
1
SGA9
0
0
0
1
×
×
×
×
×
256K Bytes (4 Sectors) FSA11 to FSA14
SGA10
0
0
1
0
×
×
×
×
×
256K Bytes (4 Sectors) FSA15 to FSA18
SGA11
0
0
1
1
×
×
×
×
×
256K Bytes (4 Sectors) FSA19 to FSA22
SGA12
0
1
0
0
×
×
×
×
×
256K Bytes (4 Sectors) FSA23 to FSA26
SGA13
0
1
0
1
×
×
×
×
×
256K Bytes (4 Sectors) FSA27 to FSA30
SGA14
0
1
1
0
×
×
×
×
×
256K Bytes (4 Sectors) FSA31 to FSA34
SGA15
0
1
1
1
×
×
×
×
×
256K Bytes (4 Sectors) FSA35 to FSA38
SGA16
1
0
0
0
×
×
×
×
×
256K Bytes (4 Sectors) FSA39 to FSA42
SGA17
1
0
0
1
×
×
×
×
×
256K Bytes (4 Sectors) FSA43 to FSA46
SGA18
1
0
1
0
×
×
×
×
×
256K Bytes (4 Sectors) FSA47 to FSA50
SGA19
1
0
1
1
×
×
×
×
×
256K Bytes (4 Sectors) FSA51 to FSA54
SGA20
1
1
0
0
×
×
×
×
×
256K Bytes (4 Sectors) FSA55 to FSA58
SGA21
1
1
0
1
×
×
×
×
×
256K Bytes (4 Sectors) FSA59 to FSA62
SGA22
1
1
1
0
×
×
×
×
×
256K Bytes (4 Sectors) FSA63 to FSA66
SGA23
1
1
1
1
0
0
×
×
×
192K Bytes (3 Sectors) FSA67 to FSA69
0
1
1
0
1
1
×
×
×
64K Bytes (1 Sector)
SGA24
1
1
1
1
Remark × : VIH or VIL
12
Data Sheet M14911EJ7V0DS
FSA70
µPD29F032202AL-X
Product ID Code (Manufacturer Code / Device Code)
Product ID Code
Input
A20 to
A6
A1
Output
A0 A–1
Note1
I/O15 I/O14 I/O13 I/O12 I/O11 I/O10 I/O9 I/O8 I/O7 I/O6 I/O5 I/O4 I/O3 I/O2 I/O1 I/O0
HEX
A12
Manufacturer Code
×
VIL
VIL
VIL
VIL
0
0
0
0
1
0
0
0
0
0010H
Device BYTE
code mode
×
VIL
VIL
VIH
VIL
A–1
High-Z
0
1
0
1
0
1
0
1
55H
A–1
High-Z
0
1
0
1
0
1
1
0
56H
-A85TX
0
0
0
0
0
0
0
-B85TX
-A85BX
-B85BX
WORD
mode
-A85TX
×
VIL
VIL
VIH
×
0
0
1
0
0
0
1
0
0
1
0
1
0
1
0
1
2255H
0
0
1
0
0
0
1
0
0
1
0
1
0
1
1
0
2256H
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
-B85TX
-A85BX
-B85BX
Sector group protection
SGA
VIL
VIH
VIL
VIL
0001H
Notes 1. A–1 is Valid only in the BYTE mode. I/O8 to I/O14 go into high impedance state in the BYTE mode, and
I/O15 is A–1 of the lowest address.
2. If 0001H is output, the sector group is protected. If 0000H is output, the sector group is unprotected.
Remark
x : VIH or VIL, SGA : Sector group address
Data Sheet M14911EJ7V0DS
13
Note2
µPD29F032202AL-X
Command Sequence
Command sequence
Bus
1st bus Cycle
Cycle Address
Read / Reset
Note1
Read / Reset
Note1
BYTE mode
BYTE mode
2nd bus Cycle
Address
Data
3rd bus Cycle
Address
Data
4th bus Cycle
Address
Data
5th bus Cycle
Address
Data
6th bus Cycle
Address
Data
1
×××H
F0H
RA
RD
–
–
–
–
–
–
–
–
3
AAAH
AAH
555H
55H
AAAH
F0H
RA
RD
–
–
–
–
A0H
PA
PD
–
–
–
–
WORD mode
Program
Data
555H
4
WORD mode
AAAH
2AAH
AAH
555H
555H
555H
55H
2AAH
AAAH
555H
Program Suspend
Note 2
1
BA
B0H
–
–
–
–
–
–
–
–
–
–
Program Resume
Note 3
1
BA
30H
–
–
–
–
–
–
–
–
–
–
6
AAAH
AAH
555H
55H
AAAH
80H
AAAH
AAH
555H
55H
AAAH
10H
Chip Erase
BYTE mode
WORD mode
Sector Erase
BYTE mode
555H
6
WORD mode
AAAH
2AAH
AAH
555H
555H
555H
55H
2AAH
AAAH
555H
80H
555H
AAAH
2AAH
AAH
555H
555H
555H
55H
FSA
30H
2AAH
Sector Erase Suspend
Note 4
1
BA
B0H
–
–
–
–
–
–
–
–
–
–
Sector Erase Resume
Note 5
1
BA
30H
–
–
–
–
–
–
–
–
–
–
3
AAAH
AAH
555H
55H
AAAH
20H
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
(BA)
90H
IA
ID
–
–
–
–
Unlock Bypass Set
BYTE mode
WORD mode
Unlock Bypass Program
Unlock Bypass Reset
Note 6
Note 6
Product ID
BYTE mode
555H
2AAH
555H
2
×××H
A0H
2
BA
90H
×××H 00H
3
AAAH
AAH
555H
PA
PD
Note11
55H
AAAH
WORD mode
555H
2AAH
(BA)
555H
Sector Group Protection
Note 7
4
×××H
60H
SPA
60H
SPA
40H
SPA
SD
–
–
–
–
Sector Group Unprotect
Note 8
4
×××H
60H
SUA
60H
SUA
40H
SUA
SD
–
–
–
–
1
AAH
98H
–
–
–
–
–
–
–
–
–
–
555H
55H
AAAH
88H
–
–
–
–
–
–
A0H
PA
PD
–
–
–
–
80H
AAAH
AAH
555H
55H
EOTPSA
30H
Query
Note 9
BYTE mode
WORD mode
Extra One Time Protect
BYTE mode
Sector Entry
WORD mode
Extra One Time Protect
Sector Program
Note 10
Extra One Time Protect
Sector Erase
Note 10
Extra One Time Protect
Sector Reset
Note 10
BYTE mode
14
3
BYTE mode
4
AAH
AAAH
2AAH
AAH
555H
6
AAAH
4
AAAH
WORD mode
BYTE mode
AAAH
555H
WORD mode
AAH
×××H
55H
555H
555H
55H
AAAH
55H
AAAH
555H
2AAH
60H
EOTPSA
AAAH
555H
2AAH
AAH
555H
4
555H
555H
2AAH
555H
WORD mode
Extra One Time Protect Sector
Protection
55H
555H
2AAH
90H
xxxH
00H
–
–
–
–
40H
EOTPSA
SD
–
–
–
–
555H
60H
EOTPSA
Note 10
Data Sheet M14911EJ7V0DS
µPD29F032202AL-X
Notes 1.
2.
Both these read / reset commands reset the device to the read mode.
Programming is suspended if B0H is input to the bank address being programmed to in a program
operation.
3.
Programming is resumed if 30H is input to the bank address being suspended to in a program-suspend
operation.
4.
Erasure is suspended if B0H is input to the bank address being erased in a sector erase operation.
5.
Erasure is resumed if 30H is input to the bank address being suspended in a sector-erase-suspend
operation.
6.
Valid only in the Unlock Bypass mode.
7.
Valid only in /RESET = VID (except in the Extra One Time Protect Sector mode).
8.
The command sequence that protects a sector group is excluded.
9.
Only A0 to A6 are valid as an address.
10. Valid only in the Extra One Time Protect Sector mode.
11. This command can be used even if this data is F0H.
Remarks 1. The system should generate the following address pattern :
WORD mode : 555H or 2AAH (A10 to A0)
BYTE mode
2. RA
: AAAH or 555H (A10 to A0, and A−1)
: Read address
RD
: Read data
IA
: Address input as follows
××00H (to read the manufacturer code)
××02H (to read the device code in the BYTE mode)
××01H (to read the device code in the WORD mode)
ID
: Code output. For the manufacture code, device code and sector group protection information,
refer to the Product ID code.
PA
: Program address
PD
: Program data
FSA
: Erase sector address. The sector to be erased is selected by the combination of A20 to A12.
Refer to the Sector Organization / Sector Address Table.
BA
: Bank address. Refer to the Sector Organization / Sector Address Table.
Data Sheet M14911EJ7V0DS
15
µPD29F032202AL-X
SPA
: Sector group address to be protected or protection-verified. Set the sector group address
(SGA) and (A6, A1, A0) = (VIL, VIH, VIL).
Sector group protection can be set for each sector group address. For details, refer DUAL
OPRATION FLASH MEMORY 32M BITS A SERIES Information (M14914E).
For the sector group address, refer to the Sector Group Address Table.
SUA
: Sector group address to be unprotected or unprotection-verified. Set the sector group address
(SGA) and (A6, A1, A0) = (VIH, VIH, VIL).
Sector group unprotect is performed for all sector group using a single command, however,
unprotect verification must be performed for each sector group address. For details, refer to
DUAL OPRATION FLASH MEMORY 32M BITS A SERIES Information (M14914E).
For the sector group address, refer to the Sector Group Address Table.
EOTPSA : Extra One Time Protect Sector area addresses. These addresses are 3F0000H to 3FFFFFH
(BYTE mode) / 1F8000H to 1FFFFFH (WORD mode) for top boot, and 000000H to 00FFFFH
(BYTE mode) / 000000H to 007FFFH (WORD mode) for bottom boot.
SD
: Data for verifying whether sector groups read from the address specified by SPA, SUA,
EOTPSA are protected or unprotected.
3. The sector group address is don't care except when a program / erase address or read address are
selected.
4. For the operation of bus, refer DUAL OPRATION FLASH MEMORY 32M BITS A SERIES Information
(M14914E).
5. × of address bit indicates VIH or VIL.
BUS OPERATIONS, COMMANDS, HARDWARE SEQUENCE FLAGS, HARDWARE DATA PROTECTION
Refer to DUAL OPERATION FLASH MEMORY 32M BITS A SERIES Information (M14914E).
16
Data Sheet M14911EJ7V0DS
µPD29F032202AL-X
Electrical Characteristics
Before turning on power, input GND ± 0.2 V to the /RESET pin until VCC ≥ VCC (MIN.).
Absolute Maximum Ratings
Parameter
Supply voltage
Symbol
VCC
Input / Output voltage
VT
Condition
with respect to GND
Unit
–0.5 to +4.0
V
–0.5
with respect /WP(ACC), /RESET
to GND
Rating
except /WP(ACC), /RESET
–0.5
Note 1
Note 1
to +13.0
V
to VCC + 0.4 (4.0 V MAX.)
Note 2
TA
–25 to +85
°C
Tstg
–55 to +125
°C
Operating ambient
temperature
Storage temperature
Notes 1. –2.0 V (MIN.) (pulse width ≤ 20 ns)
2. VCC + 2.0 V (MAX.) (pulse width ≤ 20 ns)
Caution Exposing the device to stress above those listed in Absolute Maximum Rating could cause
permanent damage. The device is not meant to be operated under conditions outside the limits
described in the operational section of this specification. Exposure to Absolute Maximum Rating
conditions for extended periods may affect device reliability.
Recommended Operating Conditions
Parameter
Symbol
Test condition
-A85TX, -A85BX
MIN.
TYP.
-B85TX, -B85BX
MAX.
MIN.
TYP.
Unit
MAX.
Supply voltage
VCC
3.0
3.6
2.7
3.3
V
Operating ambient temperature
TA
−25
+85
−25
+85
°C
Capacitance (TA = 25°°C, f = 1 MHz)
Parameter
Symbol
Test condition
MIN.
TYP.
MAX.
Unit
Input capacitance
CIN
VIN = 0 V
TBD
pF
Input / Output capacitance
CI/O
VI/O = 0 V
TBD
pF
Remarks 1. VIN : Input voltage, VI/O : Input / Output voltage
2. These parameters are not 100% tested.
Data Sheet M14911EJ7V0DS
17
µPD29F032202AL-X
DC Characteristics (Recommended Operating Conditions Unless Otherwise Noted)
Parameter
Symbol
Test condition
MIN.
TYP.
MAX.
Unit
High level input voltage
VIH
2.4
VCC+0.3
V
Low level input voltage
VIL
−0.3
+0.5
V
High level output voltage
VOH
IOH = −500 µA, VCC = VCC (MIN.)
Low level output voltage
VOL
IOL = +1.0 mA, VCC = VCC (MIN.)
2.4
V
0.4
V
Input leakage current
ILI
−1.0
+1.0
µA
I/O leakage current
ILO
−1.0
+1.0
µA
mA
Power
Read
BYTE mode
ICC1
supply
current
VCC = VCC (MAX.),
tCYCLE = 5 MHz
10
16
/CE = VIL, /OE = VIH
tCYCLE = 1 MHz
2
4
tCYCLE = 5 MHz
10
16
WORD mode
2
4
Program, Erase
ICC2
VCC = VCC (MAX.), /CE = VIL, /OE = VIH
tCYCLE = 1 MHz
15
30
mA
Standby
ICC3
VCC = VCC(MAX.), /CE = /RESET =
0.2
5
µA
/WP(ACC) = VCC ± 0.3 V, /OE = VIL
Standby / Reset
ICC4
VCC = VCC (MAX.), /RESET = GND ± 0.2 V
0.2
5
µA
Automatic sleep mode
ICC5
VIH = VCC ± 0.2 V, VIL = GND ± 0.2 V
0.2
5
µA
Read during programming
ICC6
VIH = VCC ± 0.2 V, VIL = GND ± 0.2 V
21
45
mA
Read during erasing
ICC7
VIH = VCC ± 0.2 V, VIL = GND ± 0.2 V
21
45
mA
Programming
ICC8
/CE = VIL, /OE = VIH,
17
35
mA
/WP (ACC) pin
5
10
mA
VCC
15
30
during suspend
Accelerated
Automatic programming during suspend
IACC
programming
/RESET high level input voltage
Accelerated programming voltage
Note
Low VCC lock-out voltage
VID
High Voltage is applied
11.5
12.5
V
VACC
High Voltage is applied
8.5
9.5
V
1.7
V
VLKO
Note When VCC is equal to or lower than VLKO, the device ignores all write cycles. Refer to DUAL OPERATION
FLASH MEMORY 32M BITS A SERIES Information (M14914E).
Remark
18
These DC characteristics are in common regardless of product classification.
Data Sheet M14911EJ7V0DS
µPD29F032202AL-X
AC Characteristics (Recommended Operating Conditions Unless Otherwise Noted)
AC Test Conditions
Input Waveform (Rise and Fall Time ≤ 5 ns)
3.0 V
1.5 V
Test points
1.5 V
0V
Output Waveform
1.5 V
Test points
1.5 V
Output Load
1 TTL + 30 pF
Data Sheet M14911EJ7V0DS
19
µPD29F032202AL-X
Read Cycle
Parameter
Symbol
Test Condition
MIN.
TYP.
MAX.
Read cycle time
tRC
Address access time
tACC
/CE = /OE = VIL
85
ns
/CE access time
tCE
/OE = VIL
85
ns
/OE access time
tOE
/CE = VIL
40
ns
Output disable time
tDF
/OE = VIL or /CE = VIL
30
ns
Output hold time
tOH
0
ns
/RESET pulse width
tRP
500
ns
/RESET hold time before read
tRH
50
ns
/RESET low to read mode
tREADY
/CE low to /BYTE low, high
85
Unit
ns
20
µs
tELFL/tELFH
5
ns
/BYTE low output disable time
tFLQZ
30
ns
/BYTE high access time
tFHQV
85
ns
/OE low level time from /WE high level
tOEH
20
ns
Remark
20
tDF is the time from inactivation of /CE or /OE to high impedance state output.
Data Sheet M14911EJ7V0DS
Note
µPD29F032202AL-X
Write Cycle (Program / Erase)
(1/2)
Parameter
Symbol
MIN.
Write cycle time
tWC
85
ns
Address setup time (/WE to address)
tAS
0
ns
Address setup time (/CE to address)
tAS
0
ns
Address hold time (/WE to address)
tAH
45
ns
Address hold time (/CE to address)
tAH
45
ns
Input data setup time
tDS
35
ns
Input data hold time
tDH
0
ns
tOEH
0
ns
/OE hold time
Read
Toggle bit, Data polling
TYP.
MAX.
Unit
10
Read recovery time before write (/OE to /CE)
tGHEL
0
ns
Read recovery time before write (/OE to /WE)
tGHWL
0
ns
/WE setup time (/CE to /WE)
tWS
0
ns
/CE setup time (/WE to /CE)
tCS
0
ns
/WE hold time (/CE to /WE)
tWH
0
ns
/CE hold time (/WE to /CE)
tCH
0
ns
Write pulse width
tWP
35
ns
/CE pulse width
tCP
35
ns
Write pulse width high
tWPH
30
ns
/CE pulse width high
tCPH
30
ns
Byte programming operation time
tBPG
9
200
µs
Word programming operation time
tWPG
11
200
µs
tSER
0.3
1.0
s
0.5
1.5
Sector erase operation time
4K words sector
32K words sector
4K words sector
0.5
3.0
32K words sector
0.7
5.0
33.9
102.5
48.1
339
7
150
Chip erase operation time
tCER
Accelerated programming time
Note
tACCPG
Program / erase cycle
1,2
1,3
s
1,2
1,3
µs
300,000
cycle
VCC setup time
tVCS
50
µs
RY (/BY) recovery time
tRB
0
ns
/RESET pulse width
tRP
500
ns
/RESET high-voltage (VID) hold time from high of RY(/BY)
tRRB
20
µs
tRH
50
ns
when sector group is temporarily unprotect
/RESET hold time
Notes 1. The preprogramming time prior to the erase operation is not included.
2. Program / erase cycle : 100,000 cycles
3. Program / erase cycle : 300,000 cycles
Data Sheet M14911EJ7V0DS
21
µPD29F032202AL-X
Write Cycle (Program / Erase)
(2/2)
Parameter
Symbol
MAX.
Unit
tEOE
85
ns
RY (/BY) delay time from valid program or erase operation
tBUSY
90
ns
Address setup time to /OE low in toggle bit
tASO
15
ns
Address hold time to /CE or /OE high in toggle bit
tAHT
0
ns
/CE pulse width high for toggle bit
tCEPH
20
ns
/OE pulse width high for toggle bit
tOEPH
20
ns
Voltage transition time
tVLHT
4
µs
1
Rise time to VID (/RESET)
tVIDR
500
ns
2
tVACCR
500
ns
1
Erase timeout time
tTOW
50
µs
3
Erase suspend transition time
tSPD
µs
3
From completion of automatic program / erase to data
MIN.
TYP.
Note
output time
Rise time to VACC (/WP(ACC))
20
Notes 1. Sector group protection and accelerated mode only.
2. Sector group protection only.
3. Table only.
Write operation (Program / Erase) Performance
Parameter
Sector erase time
Chip erase time
Description
MIN.
TYP.
MAX.
Unit
Note
s
1
s
2
s
1
The preprogramming time prior
4K words sector
0.3
1.0
to the erase operation
32K words sector
0.5
1.5
is not included
4K words sector
0.5
3.0
32K words sector
0.7
5.0
The preprogramming time prior
33.9
102.5
to the erase operation is not included
48.1
339
2
Byte programming time
Excludes system-level overhead
9
200
µs
Word programming time
Excludes system-level overhead
11
200
µs
Chip programming time
Excludes system-level overhead
Accelerated programming time
BYTE mode
40
WORD mode
25
Excludes system-level overhead
Program / erase cycle
7
300,000
Notes 1. Program / erase cycle : 100,000 cycles
2. Program / erase cycle : 300,000 cycles
TIMING CHARTS, FLOW CHARTS
Refer to DUAL OPERATION FLASH MEMORY 32M BITS A SERIES Information (M14914E).
22
Data Sheet M14911EJ7V0DS
s
150
µs
cycle
µPD29F032202AL-X
CFI Code List
(1/2)
Address A6 to A0
Data I/O15 to I/O0
Description
10H
0051H
11H
0052H
12H
0059H
13H
0002H
Main command set
14H
0000H
2 : AMD/FJ standard type
15H
0040H
Start address of PRIMARY table
16H
0000H
17H
0000H
Auxiliary command set
18H
0000H
00H : Not supported
19H
0000H
Start address of auxiliary algorithm table
1AH
0000H
1BH
0027H
"QRY" (ASCII code)
Minimum VCC voltage (program / erase)
I/O7 to I/O4 : 1 V/bit
I/O3 to I/O0 : 100 mV/bit
1CH
0036H
Maximum VCC voltage (program / erase)
I/O7 to I/O4 : 1 V/bit
I/O3 to I/O0 : 100 mV/bit
1DH
0000H
Minimum VPP voltage
1EH
0000H
Maximum VPP voltage
1FH
0004H
Typical word program time (2 N µs)
20H
0000H
Typical buffer program time (2 N µs)
21H
000AH
Typical sector erase time (2 N ms)
22H
0000H
Typical chip erase time (2 N ms)
23H
0005H
Maximum word program time (typical time × 2 N)
24H
0000H
Maximum buffer program time (typical time × 2 N)
25H
0004H
Maximum sector erasing time (typical time × 2 N)
26H
0000H
Maximum chip erasing time (typical time × 2 N)
27H
0016H
Capacity (2 N Bytes)
28H
0002H
I/O information
29H
0000H
2 : ×8/×16-bit organization
2AH
0000H
Maximum number of bytes when two banks are programmed (2 N)
2BH
0000H
2CH
0002H
Type of erase block
2DH
0007H
Information about erase block 1
2EH
0000H
bit0 to bit15 : y = number of sectors
2FH
0020H
bit16 to bit31 : z = size
30H
0000H
(Z × 256 Bytes)
Data Sheet M14911EJ7V0DS
23
µPD29F032202AL-X
CFI Code List
(2/2)
Address A6 to A0
Data I/O15 to I/O0
31H
003EH
Description
Information about erase block 2
32H
0000H
bit0 to bit15 : y = number of sectors
33H
0000H
bit16 to bit31 : z = size
34H
0001H
(z × 256 Bytes)
40H
0050H
"PRI" (ASCII code)
41H
0052H
42H
0049H
43H
0031H
Main version (ASCII code)
44H
0032H
Minor version (ASCII code)
45H
0000H
Address during command input
00H : Necessary
01H : Unnecessary
46H
0002H
Temporary erase suspend function
00H : Not supported
01H : Read only
02H : Read / Program
47H
0001H
Sector group protection
00H : Not supported
01H : Supported
48H
0001H
Temporary sector group protection
00H : Not supported
01H : Supported
49H
0004H
Sector group protection algorithm
4AH
00xxH
Number of sectors of bank 2
00H : Not supported
38H : µPD29F032202AL-X
4BH
0000H
Burst mode
00H : Not supported
4CH
0000H
Page mode
4DH
0085H
Minimum VACC voltage
00H : Not supported
I/O7 to I/O4 : 1 V/bit
I/O3 to I/O0 : 100 mV/bit
4EH
0095H
Maximum VACC voltage
I/O7 to I/O4 : 1 V/bit
I/O3 to I/O0 : 100 mV/bit
4FH
00xxH
Boot organization
02H : Bottom boot ( -A85BX, -B85BX )
03H : Top boot ( -A85TX, -B85TX )
50H
0001H
Temporary program suspend function
00H : Not supported
01H : Supported
24
Data Sheet M14911EJ7V0DS
µPD29F032202AL-X
Package Drawings
48-PIN PLASTIC TSOP (I) (12x20)
detail of lead end
1
48
F
G
R
Q
24
L
25
S
E
P
I
A
J
C
S
K
N
S
NOTES
1) Each lead centerline is located within 0.10 mm of
its true position (T.P.) at maximum material condition.
2) "A" excludes mold flash. (Includes mold flash : 12.4 mm MAX.)
B
D
M M
ITEM
A
MILLIMETERS
12.0±0.1
B
0.45 MAX.
C
0.5 (T.P.)
D
0.22±0.05
E
0.1±0.05
F
1.2 MAX.
G
1.0±0.05
I
18.4±0.1
J
0.8±0.2
K
0.145±0.05
L
0.5
M
0.10
N
0.10
P
20.0±0.2
Q
3°+5°
−3°
R
0.25
S
0.60±0.15
S48GZ-50-MJH-1
Data Sheet M14911EJ7V0DS
25
µPD29F032202AL-X
63-PIN TAPE FBGA (11x7)
w
E
ZD
S B
ZE
B
8
7
6
5
4
3
2
1
A
D
ML K J HGF EDCBA
w
INDEX MARK
S A
A
y1
A2
S
S
y
e
S
φb
φx
A1
M
S AB
ITEM
D
MILLIMETERS
7.00±0.10
E
11.00±0.10
w
0.20
A
0.97±0.10
A1
0.27±0.05
A2
e
0.70
0.80
b
x
0.45±0.05
0.08
y
y1
0.10
0.20
ZD
0.70
ZE
1.10
P63F9-80-BS2
26
Data Sheet M14911EJ7V0DS
µPD29F032202AL-X
Recommended Soldering Conditions
Please consult with our sales offices for soldering conditions of the µPD29F032202AL-X.
Types of Surface Mount Device
µPD29F032202ALGZ-MJH : 48-pin PLASTIC TSOP(I) (12 × 20) (Normal bent)
µPD29F032202ALF9-BS2 : 63-pin TAPE FBGA (11 × 7)
Data Sheet M14911EJ7V0DS
27
µPD29F032202AL-X
Revision History
Edition/
Date
Page
Type of
This
Previous
edition
edition
Location
Description
revision
(Previous edition -> This edition)
7th edition/
p.13
p.13
Modification
Product ID Code
Device code(Byte mode):I/O15 = Hi-Z→A–1
Sep.2002
p.16
p.15
Modification
Command Sequence
Remark 2 : SPA, SUA
p.20
p.19
Addition
Read Cycle
tOEH
28
Data Sheet M14911EJ7V0DS
µPD29F032202AL-X
[ MEMO ]
Data Sheet M14911EJ7V0DS
29
µPD29F032202AL-X
[ MEMO ]
30
Data Sheet M14911EJ7V0DS
µPD29F032202AL-X
NOTES FOR CMOS DEVICES
1
PRECAUTION AGAINST ESD FOR SEMICONDUCTORS
Note:
Strong electric field, when exposed to a MOS device, can cause destruction of the gate oxide and
ultimately degrade the device operation. Steps must be taken to stop generation of static electricity
as much as possible, and quickly dissipate it once, when it has occurred. Environmental control
must be adequate. When it is dry, humidifier should be used. It is recommended to avoid using
insulators that easily build static electricity. Semiconductor devices must be stored and transported
in an anti-static container, static shielding bag or conductive material. All test and measurement
tools including work bench and floor should be grounded. The operator should be grounded using
wrist strap. Semiconductor devices must not be touched with bare hands. Similar precautions need
to be taken for PW boards with semiconductor devices on it.
2
HANDLING OF UNUSED INPUT PINS FOR CMOS
Note:
No connection for CMOS device inputs can be cause of malfunction. If no connection is provided
to the input pins, it is possible that an internal input level may be generated due to noise, etc., hence
causing malfunction. CMOS devices behave differently than Bipolar or NMOS devices. Input levels
of CMOS devices must be fixed high or low by using a pull-up or pull-down circuitry. Each unused
pin should be connected to V DD or GND with a resistor, if it is considered to have a possibility of
being an output pin. All handling related to the unused pins must be judged device by device and
related specifications governing the devices.
3
STATUS BEFORE INITIALIZATION OF MOS DEVICES
Note:
Power-on does not necessarily define initial status of MOS device. Production process of MOS
does not define the initial operation status of the device. Immediately after the power source is
turned ON, the devices with reset function have not yet been initialized. Hence, power-on does
not guarantee out-pin levels, I/O settings or contents of registers. Device is not initialized until the
reset signal is received. Reset operation must be executed immediately after power-on for devices
having reset function.
Data Sheet M14911EJ7V0DS
31
µPD29F032202AL-X
Related Documents
Document Name
DUAL OPERATION FLASH MEMORY 32M BITS A SERIES Information
Document Number
M14914E
• The information in this document is current as of September, 2002. The information is subject to
change without notice. For actual design-in, refer to the latest publications of NEC's data sheets or
data books, etc., for the most up-to-date specifications of NEC semiconductor products. Not all
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(Note)
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M8E 00. 4