DS3245 Quad MOS Clock Driver General Description Features The DS3245 is a quad bipolar-to-MOS clock driver with TTL compatible inputs. It is designed to provide high output current and voltage capabilities necessary for optimum driving of high capacitance N-channel MOS memory systems. Only 2 supplies, 5 VDC and 12 VDC, are required without compromising the usual high VOH specification obtained by circuits using a third supply. The device features 2 common enable inputs, a refresh input, and a clock control input for simplified system designs. The circuit was designed for driving highly capacitive loads at high speeds and uses Schottky-clamped transistors. PNP transistors are used on all inputs, thereby minimizing input loading. Y Y Y Y Y Y Y Y TTL compatible inputs Operates from 2 standard supplies: 5 VDC, 12 VDC Internal bootstrap circuit eliminates need for external PNP’s PNP inputs minimize loading High voltage/current outputs Input and output clamping diodes Control logic optimized for use with MOS memory systems Pin and function equivalent to Intel 3245 Logic and Connection Diagrams Dual-In-Line Package TL/F/5873 – 2 Top View Order Number DS3245J or DS3245N See NS Package Number J16A or N16A TL/F/5873 – 1 C1995 National Semiconductor Corporation TL/F/5873 RRD-B30M115/Printed in U. S. A. DS3245 Quad MOS Clock Driver February 1986 Absolute Maximum Ratings Operating Conditions If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/Distributors for availability and specifications. Temperature Under Bias Min 4.75 11.4 0 Supply Voltage, VCC Supply Voltage, VDD Operating Temperature 9TA b 10§ C to a 85§ C Max 5.25 12.6 75 Units V V §C b 65§ C to a 150§ C Storage Temperature b 0.5V to a 7V Supply Voltage, VCC b 0.5V to a 14V Supply Voltage, VDD b 1.0V to VDD All Input Voltages b 1.0V to VDD a 1V Outputs for Clock Driver Maximum Power Dissipation* at 25§ C Cavity Package 1509 mW Molded Package 1476 mW *Derate cavity package 10.1 mW/§ C above 25§ C; derate molded package 11.8 mW/§ C above 25§ C. Electrical Characteristics (Notes 2 and 3) Max Units IFD Symbol Select Input Load Current VF e 0.45V b 0.25 mA IFE Enable Input Load Current VF e 0.45V b 1.0 mA IRD Select Input Leakage Current VR e 5V 10 mA IRE Enable Input Leakage Current VR e 5V 40 mA Output Low Voltage IOL e 5 mA, VIH e 2V 0.45 V VOL Parameter Conditions Min IOL e b5 mA VOH Output High Voltage Typ b 1.0 IOH e b1 mA, VIL e 0.8V V VDD b 0.50 V IOH e 5 mA VIL Input Low Voltage, All Inputs VIH Input High Voltage, All Inputs VCLAMP Input Clamp Voltage VDD a 1.0 V 0.8 V b 1.5 V 2 V VCC e Min, IIN e b12 mA b 1.0 Power Supply Current Drain Symbol Parameter Conditions Typ Max Units ICC Current from VCC Output in High State VCC e 5.25V, VDD e 12.6V Min 26 34 mA IDD Current from VDD Output in High State VCC e 5.25V, VDD e 12.6V 23 30 mA ICC Current from VCC Output in Low State VCC e 5.25V, VDD e 12.6V 29 39 mA IDD Current from VDD Output in Low State VCC e 5.25V, VDD e 12.6V 13 19 mA Note 1: ‘‘Absolute Maximum Ratings’’ are those values beyond which the safety of the device cannot be guaranteed. Except for ‘‘Operating Temperature Range’’ they are not meant to imply that the devices should be operated at these limits. The table of ‘‘Electrical Characteristics’’ provides conditions for actual device operation. Note 2: Unless otherwise specified min/max limits apply across the 0§ C to a § C range. All typical values are for TA e 25§ C and VCC e 5V and VDD e 12V. Note 3: All currents into device pins shown as positive, out of device pins as negative, all voltages referenced to ground unless otherwise noted. All values shown as max or min on absolute value basis. 2 Switching Characteristics TA e 0§ C to a 75§ C, VCC e 5V g 5%, VDD e 12V g 5% Symbol Parameter Conditions Min(1) Typ(2,4) 5 11 Max(3) Units 32 ns 32 ns tb a Input to Output Delay RSERIES e 0 tDR Delay Plus Rise Time RSERIES e 0 ns ta b Input to Output Delay RSERIES e 0 tDF Delay Plus Fall Time RSERIES e 0 tT Output Transition Time RSERIES e 20X 17 25 ns tDR Delay Plus Rise Time RSERIES e 20X 27 38 ns tDF Delay Plus Fall Time RSERIES e 20X 25 38 ns Max Units 20 3 7 ns 18 10 Capacitance TA e 25§ C(5) Symbol Parameter Conditions Min Typ CIN Input Capacitance, I1, I2, I3, I4 5 8 pF CIN Input Capacitance, R, C, E1, E2 8 12 pF Note 1: CL e 150 pF Note 2: CL e 200 pF Note 3: CL e 250 pF ( These values represent a range of total stray plus clock capacitance for nine 4k RAMs. Note 4: Typical values are measured at 25§ C. Note 5: This parameter is periodically sampled and is not 100% tested. Condition of measurement is f e 1 MHz, VBIAS e 2V, VCC e 0V, and TA e 25§ C. AC Test Circuit and Switching Time Waveforms Input pulse amplitudes: 3V Input pulse rise and fall times: 5 ns between 1V and 2V Measurements points: see waveforms TL/F/5873 – 3 TL/F/5873 – 4 3 DS3245 Quad MOS Clock Driver Physical Dimensions inches (millimeters) Ceramic Dual-in-Line Package (J) Order Number DS3245J NS Package Number J16A Molded Dual-in-Line Package (N) Order Number DS3245N NS Package Number N16A LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 1. 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