NSC DS3628J

DS1628/DS3628 Octal TRI-STATEÉ MOS Drivers
General Description
Features
The DS1628/DS3628 are octal Schottky memory drivers
with TRI-STATE outputs designed to drive high capacitive
loads associated with MOS memory systems. The drivers’
output (VOH) is specified at 3.4V to provide additional noise
immunity required by MOS inputs. A PNP input structure is
employed to minimize input currents. The circuit employs
Schottky-clamped transistors for high speed. A NOR gate of
two inputs, DIS1 and DIS2, controls the TRI-STATE mode.
Y
Y
Y
Y
Y
Y
High speed capabilities
Ð Typical 5 ns driving 50 pF & 8 ns driving 500 pF
TRI-STATE outputs
High VOH (3.4V min)
High density
Ð Eight drivers and two disable controls for TRI-STATE
in a 20-pin package
PNP inputs reduce DC loading on bus lines
Glitch-free power up/down
Schematic and Connection Diagrams
Dual-In-Line Package
Top View
TL/F/5875 – 1
(Equivalent Input/Output Circuit)
TL/F/5875 – 2
Order Number
DS1628J, DS3628J, DS3628N
See NS Package Number J20A or N20A
Typical Application
Truth Table
Disable Input
DIS 1
DIS 2
H
H
X
L
L
H
X
H
L
L
Input
Output
X
X
X
H
L
Z
Z
Z
L
H
H e high level
L e low level
X e don’t care
Z e high impedance (off)
TL/F/5875 – 3
TRI-STATEÉ is a registered trademark of National Semiconductor Corp.
C1995 National Semiconductor Corporation
TL/F/5875
RRD-B30M115/Printed in U. S. A.
DS1628/DS3628 Octal TRI-STATE MOS Drivers
February 1986
Absolute Maximum Ratings (Note 1)
Operating Conditions
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Supply Voltage
Logical ‘‘1’’ Input Voltage
Logical ‘‘0’’ Input Voltage
Supply voltage (VCC)
Temperature (TA)
DS1628
DS3628
7.0V
7.0V
Min
4.5
Max
5.5
Units
V
b 55
a 125
a 70
§C
§C
0
b 1.5V
b 65§ C to a 150§ C
Storage Temperature Range
Maximum Power Dissipation* at 25§ C
Cavity Package
1667 mW
Molded Package
1832 mW
Lead Temperature (Soldering, 10 seconds)
300§ C
*Derate cavity package 11.1 mW/§ C above 25§ C; derate molded package
14.7 mW/§ C above 25§ C.
Electrical Characteristics (Notes 2, 3)
Symbol
Parameter
Conditions
Min
Typ
Max
Units
0.8
V
VIN(1)
Logical ‘‘1’’ Input Voltage
2.0
VIN(0)
Logical ‘‘0’’ Input Voltage
V
IIN(1)
Logical ‘‘1’’ Input Current
VCC e 5.5V
VIN e 5.5V
0.1
40
mA
IIN(0)
Logical ‘‘0’’ Input Current
VCC e 5.5V
VIN e 5.5V
b 180
b 400
mA
VCLAMP
Input Clamp Voltage
VCC e 4.5V
IIN e b18 mA
b 0.7
b 1.2
V
VOH
Logical ‘‘1’’ Output Voltage
(No Load)
VCC e 4.5V, IOH e b10 mA
VOL
Logical ‘‘0’’ Output Voltage
(No Load)
VCC e 4.5V, IOL e 10 mA
DS1628
VOH
Logical ‘‘1’’ Output Voltage
(With Load)
VCC e 4.5V, IOH e b1.0 mA
DS1628
2.5
3.9
V
DS3628
2.7
3.9
V
VOL
Logical ‘‘0’’ Output Voltage
(With Load)
VCC e 4.5V, IOL e 20 mA
DS1628/DS3628
IID
Logical ‘‘1’’ Drive Current
VCC e 4.5V, VOUT e 0V, (Note 6)
IOD
Logical ‘‘0’’ Drive Current
VCC e 4.5V, VOUT e 4.5V, (Note 6)
Hi-Z
TRI-STATE Output Current
VOUT e 0.4V to 2.4V, DIS1 or DIS2 e 2.0V
ICC
Power Supply Current
VCC e 5.5V
DS1628
3.4
4.3
DS3628
3.5
4.3
DS3628
V
V
0.25
0.4
0.25
0.35
0.35
0.5
b 150
V
V
mA
150
b 40
V
mA
0.1
40
mA
One DIS Input e 3.0V
All Other Inputs e X, Outputs at Hi-Z
90
120
mA
DIS1, DIS2 e 0V, Others e 3V
Outputs on
70
100
mA
All Inputs e 0V, Outputs Off
25
50
mA
Units
Switching Characteristics (VCC e 5V, TA e 25§ C) (Note 6)
Symbol
tS a b
tSb a
tF
tR
Parameter
Storage Delay Negative Edge
Storage Delay Positive Edge
Fall Time
Rise Time
Conditions
(Figure 1 )
(Figure 1 )
(Figure 1 )
(Figure 1 )
Typ
Max
CL e 50 pF
Min
4.0
5.0
CL e 500 pF
6.5
8.0
CL e 50 pF
4.2
5.0
CL e 500 pF
6.5
8.0
CL e 50 pF
4.2
6.0
CL e 500 pF
19
22
CL e 50 pF
5.2
7.0
CL e 500 pF
20
24
ns
ns
ns
ns
tZL
Delay from Disable Input to Logical ‘‘0’’
Level (from High Impedance State)
CL e 50 pF
to GND
RL e 2 kX to VCC
(Figure 2 )
19
25
ns
tZH
Delay from Disable Input to Logical ‘‘1’’
Level (from High Impedance State)
CL e 50 pF
to GND
RL e 2 kX to GND
(Figure 2 )
13
20
ns
2
Switching Characteristics
Symbol
(Continued) (VCC e 5V, TA e 25§ C) (Note 6)
Parameter
Typ
Max
Units
tLZ
Delay from Disable Input to High Impedance
State (from Logical ‘‘0’’ Level)
CL e 50 pF
to GND
Conditions
RL e 400X to VCC
(Figure 3 )
Min
18
25
ns
tHZ
Delay from Disable Input to High Impedance
State (from Logical ‘‘1’’ Level)
CL e 50 pF
to GND
RL e 400X to GND
(Figure 3 )
8.5
15
ns
AC Test Circuits and Switching Time Waveforms
tS a b, tSb a , tr, tf
TL/F/5875 – 5
TL/F/5875 – 4
FIGURE 1
tZL
tZH
TL/F/5875 – 8
TL/F/5875–6
*ANY ONE OF EIGHT OUTPUTS
TL/F/5875 – 7
FIGURE 2
tLZ
tHZ
TL/F/5875–9
TL/F/5875 – 11
TL/F/5875 – 10
FIGURE 3
Note 1: ‘‘Absolute Maximum Ratings’’ are those values beyond which the safety of the device cannot be guaranteed. Except for ‘‘Operating Temperature Range’’
they are not meant to imply that the devices should be operated at these limits. The table of ‘‘Electrical Characteristics’’ provides conditions for actual device
operation.
Note 2: Unless otherwise specified, min/max limits apply across the b 55§ C to a 125§ C temperature range for the DS1628 and across the 0§ C to a 70§ C range for
the DS3628. All typical values are for TA e 25§ C and VCC e 5V.
Note 3: All currents into device pins shown as positive; all currents out of device pins shown as negative; all voltages references to ground unless otherwise noted.
All values shown as max or min on absolute value basis.
Note 4: The pulse generator has the following characteristics: ZOUT e 50X and PRR s 1 mHz. Rise and fall times between 10% and 90% points s 5 ns.
Note 5: CL includes probe and jig capacitance.
Note 6: When measuring output drive current and switching response for the DS1628 and DS3628 a 15X resistor should be placed in series with each output.
3
DS1628/DS3628 Octal TRI-STATE MOS Drivers
Physical Dimensions inches (millimeters)
Ceramic Dual-In-Line Package (J)
Order Number DS1628J or DS3628J
NS Package Number J20A
LIFE SUPPORT POLICY
Molded Dual-In-Line Package (N)
Order Number DS3628N
NS Package Number N20A
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