ETC DS1831/A/B

DS1831/A/B
Multisupply Micromonitor
www.maxim-ic.com
FEATURES
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5V power-on reset
3.3V (or 3V) power-on reset
Two referenced comparators with separate
outputs for monitoring additional supplies
Internal power is drawn from higher of either
the IN5V input or the IN3.3V input
Excellent for systems designed to operate
with multiple power supplies
Asserts resets during power transients
Pushbutton reset input for system override
Maintains reset for user configurable times
of 10ms, 100ms, or 1s
Watchdog timer for software monitoring
(DS1831A)
Precision temperature-compensated voltage
reference and voltage sensor
16 pin DIP and 16 pin 150mil SO available
Operating Temperature of -40°C to +85°C
PIN ASSIGNMENT
DS1831
IN5V
1
16
IN3.3V
RST5V
2
15
RST3.3V
TOL5V
3
14
TOL3.3V
TD5V
4
13
TD3.3V
PBRST5V
5
12
PBRST3.3V
IN1
6
11
NMI1
IN2
7
10
NMI2
GND
8
9
MPBRST
16-Pin (300mil) DIP
&
16-Pin (150mil) SO
DS1831B
DS1831A
IN5V
1
16
IN3.3V
RST3.3V
RST5V
2
15
RST3.3V
14
TOL3.3V
TOL5V
3
14
TOL3.3V
4
13
TD3.3V
TD5V
4
13
TD3.3V
PBRST5V
5
12
PBRST3.3V
PBRST5V
5
12
PBRST3.3V
IN1
6
11
NMI1
IN1
6
11
NMI1
ST
7
10
WDS
IN2
7
10
NMI2
GND
8
9
TDWD
GND
8
9
IN5V
1
16
IN3.3V
RST5V
2
15
TOL5V
3
TD5V
MPBRST
16-Pin (300mil) DIP
&
16-Pin (150mil) SO
16-Pin (300mil) DIP
&
16-Pin (150mil) SO
DESCRIPTION
The DS1831 multisupply monitor and reset monitors up to four system voltages: 5V supply, 3.3V (or 3V)
supply, and two additional user configurable voltage monitors. DS1831 power for internal operation
comes from the higher voltage level of the 3.3V input or the 5V input. One of these inputs must be greater
than 1V for device operation. Pushbutton (manual reset) functionality is provided for the 5V reset, the
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062602
DS1831/A/B
3.3V reset or for all reset outputs by the master pushbutton. The DS1831A replaces one reference
comparator and the master pushbutton with watchdog and the DS1831B replaces the 3.3V PBRST with a
last reset status output.
TOL and TD inputs allow user configuration of the DS1831 for multiple applications. The TOL inputs
configure the tolerance for the specified output and the TD inputs configure the reset time delays.
PIN DESCRIPTION
IN5V
5V Power Supply Input
RST 5V
5V Reset Open Drain Output
TOL5V
Selects 5V Input Tolerance
TD5V
Selects 5V Reset Time Delay
PBRST 5V
IN1
IN2
ST
GND
MPBRST
TDWD
NM12
Master Pushbutton (DS1831)
Watchdog Time Delay Select (DS1831A)
Non-maskable Interrupt 2 (DS1831)
WDS
Watchdog Status Output (DS1831A)
NM11
Non-maskable Interrupt 1
PBRST 3.3V
3.3V Reset Pushbutton
Pushbutton Status Output (DS1831B)
PBST
TD3.3V
Select 3.3V Reset Time Delay
Sense Input 1
TOL3.3V
Selects 3.3V Input Tolerance
Sense Input 2 (DS1831)
Watchdog Strobe Inputs
(DS1831A)
Ground
RST 3.3V
3.3V Reset Open Drain Output
5V Reset Pushbutton
IN3.3V
3.3V Power Supply Input
DS1831 BLOCK DIAGRAM Figure 1
IN5V
100k
PBRST5V
TD5V
VCC
TOL5V
TOLERANCE
BIAS
1.25V T.C.
+
TIME
DELAY
-
RST5V
REFERENCE
100k
MPBRST
Level
Sense
&
IN3.3V
100k
PBRST3.3V
TD3.3V
TOL3.3V
VCC
TOLERANCE
BIAS
TIME
DELAY
+
RST3.3V
NMI1
-
IN1
+
NMI2
-
IN2
+
GROUND
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DS1831/A/B
OPERATION—POWER MONITOR
The DS1831 provides the functions of detecting out-of-tolerance conditions on a 3.3V (or 3V) and 5V
power supply and warning a processor-based system of impending power failure. When an input is
detected as out-of-tolerance on either voltage input the RST for that supply will be forced active low.
When that input returns to a valid state the associated RST will remain active for the time delay selected
with the associated TD input and then return to an inactive state until the next input out-of-tolerance
condition.
On power-up both resets are kept active for the selected reset time after the associated power supply input
has reached the selected tolerance. This allows the power supply and system power to stabilize before
RST is released.
All internal operating current for the DS1831 will be supplied by either the IN3.3V or IN5V input which
ever has the highest voltage level.
OPERATION—TOLERANCE SELECT
The DS1831 provides two TOL inputs for individual customization of the DS1831 to specific application
requirements. If the TOL for the 5V supply is tied to the 5V input a 5% tolerance is selected. If the TOL
is connected to ground a 10% tolerance is selected or if it is left unconnected a 15% tolerance is selected.
If the TOL for the 3.3V supply is tied to the 3.3V input a 5% tolerance is selected, a 10% tolerance is
selected if it is connected to ground, and a 20% tolerance is selected if the input is left unconnected.
These tolerance conditions are set at power up and can only be changed by power cycling the device.
OPERATION—RESET TIME-DELAY SELECT
The DS1831 provides two TD inputs for individual customization of reset time-delays and an additional
one for the DS1831A watchdog. TD inputs select time delays for the IN5V and IN3.3V resets outputs and
the Watchdog on the DS1831A. The reset time delays are shown in Table 1. These allow the selection of
minimum delays of 10ms, 100ms, and 1000ms.
Wiring an individual reset output to the push-button input of the other voltage reset allows custom reset
timings or allows for the sequencing of the reset outputs. See Figure 2.
These time-delays are set at power-up and cannot be changed after the device reaches an in-tolerance
condition.
TD INPUTS/RESET AND WATCHDOG TIME-DELAYS Table 1
TD
GND
Float
VCC
MIN
10ms
100ms
1000ms
RESET TIME-DELAY
TYP
16ms
160ms
1600ms
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MAX
20ms
200ms
2000ms
DS1831/A/B
PUSHBUTTON RESET SEQUENCING Figure 2
3.3V Supply
5V Supply
IN5V
RST5V
1
16
2
DS1831 15
3
14
4
13
5
12
TOL5V
TD5V
PBRST5V
IN3.3V
RST3.3V
TOL3.3V
TD3.3V
PBRST3.3V
GND
NOTE: The RST 5V output is connected to the IN3.3V via a 100 kW resistor in the push-button input and
therefore does not require a pull-up resistor (an addition pull up can be used to accelerate responses). If an
external pull up is used in this example it must be connected to the 3.3V power supply.
OPERATION—PUSHBUTTON RESET
The DS1831 provides three pushbutton inputs for manual reset of the device. Pushbutton inputs for the
3.3V reset, 5V reset, and a master pushbutton reset (DS1831 and DS1831B only) input; provide multiple
options for system control. The 3.3V pushbutton reset and 5V pushbutton resets provide a simple manual
reset for the associated reset output; while the master pushbutton reset forces all resets and NMI outputs
active low.
The 5V reset pushbutton input and the 3.3V reset pushbutton input provide manual reset control input for
each associated reset output. When the output associated with a pushbutton input is not active, a
pushbutton reset can be generated by pulling the associated PBRST pin low for at least 20µs. When the
pushbutton is held low the reset will be forced active and will remain active for a reset cycle after the
pushbutton is released. See Figure 2 for an application example that allows a user to sequence the reset
outputs.
A master pushbutton reset cycle can be started if at least one voltage input (IN5V, IN3.3V, IN1, or IN2) is in
tolerance and at least one output is active. A master pushbutton reset is generated by pulling the MPBRST
pin low for at least 20µs. When the pushbutton is held low all outputs are forced active and will remain
active for a reset or NMI time delay after the pushbutton is released. The Master Pushbutton input is
pulled high through an internal 100kW pull up resistor and debounced via internal circuitry. See Figure 3
for an application example. Figures 4 and 5 for the timing diagram.
The 5V and 3.3V pushbutton reset inputs are pulled high through an internal 100kW pull up resistor to the
voltage input, which is associated with that pushbutton. The master pushbutton is pulled to the greater of
the IN5V and IN3.3V inputs.
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DS1831/A/B
PUSHBUTTON RESET Figure 3
5V Supply
IN5V
10 kW
RST5V
1
16
2
DS1831 15
3
14
4
13
5
12
TOL5V
TD5V
PBRST5V
GND
TIMING DIAGRAM—MASTER PUSHBUTTON RESET Figure 4
tPB
MPBRST
tPDLY
VIH
VIL
tRST
RST5V and RST3.3V
VOH
NMI1 and NMI2
tNMI
VOH
5 of 14
DS1831/A/B
TIMING DIAGRAM—5V OR 3.3V PUSHBUTTON RESET Figure 5
tPB
PBRST5V
(or PBRST3.3V)
tPDLY
VIH
VIL
tRST
RST5V (or RST3.3V)
VOH
VIL
OPERATION—PUSHBUTTON STATUS
The DS1831B provides a master pushbutton status open drain output. The PBST output indicates the
status of the most recent reset condition. If the last reset was generated by the master pushbutton input it
would maintain a low condition until cleared by another event (except the master pushbutton) generating
a reset. Once cleared it will remain high until the master pushbutton is pulled low generating a reset
condition. The PBST output is open drain and will require a pull-up resistor on the output to maintain a
valid condition. The value of the pull up resistor is not critical in most cases but must be set low enough
to pull the output to a high state. A common value used is 10kW (see Figure 6).
DS1831B APPLICATION EXAMPLE Figure 6
5V Supply
IN5V
RST5V
VSENSE2
VSENSE1
3.3V Supply
1
16
IN3.3V
15
TOL5V
3
14
TOL3.3V
TD5V
4
13
TD3.3V
IN1
IN2
GND
DS1831B
5
12
6
11
7
10
8
9
10kW
RST3.3V
2
PBRST5V
VCC
PBST
NMI1
NMI2
MPBRST
6 of 14
VCC
10 kW
DS1831/A/B
OUTPUT VALID CONDITIONS
The DS1831 can maintain valid outputs as long as one input remains above 1.0V. Accurate voltage
monitoring additionally requires that either the 3.3V IN or 5V IN input be above 1.5V. If this condition is
not met and at least one of the supply inputs are at or above 1.0V all outputs are maintained in the active
condition. The DS1831 requires pull-up resistors on the outputs to maintain a valid output. The value of
the pull up resistor is not critical in most cases but must be set low enough to pull the output to a high
state. A common pull-up resistor value used is 10kW (see Figure 7).
APPLICATION DIAGRAM—OPEN DRAIN OUTPUTS Figure 7
3.3V Supply
5V Supply
IN5V
10 KW
RST5V
TOL5V
TD5V
PBRST5V
1
16
2
DS1831 15
3
14
4
13
5
12
IN3.3v
10 kW
RST3.3V
TOL3.3V
TD3.3V
PBRST3.3V
GND
NOTE: If outputs are at different voltages the outputs can not be connected to form a wired AND.
OPERATION—NON-MASKABLE INTERRUPT
The DS1831 has two referenced comparator (DS1831A has only one referenced comparator) that can be
used to monitor upstream voltages or other system specific voltages. Each comparator is referenced to the
1.25V internal band gap reference and controls an open-drain output. When a voltage being monitored
decays to the voltage sense point, the DS1831 pulses the NMI output to the active state for a minimum
10µs. The comparator detection circuitry also has built-in hysteresis of 100µV. The supply must be below
the voltage sense point for approximately 2µs before a low NMI will be generated. In this way, power
supply noise is minimized in the monitoring function, reducing false interrupts. See Figure 8 for the nonmaskable timing diagram.
Versatile trip voltages can be configured by the use of an external resistor divider to divide the voltage at
a sense point to the 1.25V trip levels of the referenced comparators. See Figure 9 for an example circuit
diagram and sample equations. The equations demonstrate a design process to determine the resistor
values to use.
Connecting one or both NMI outputs to one of the reset specific PBRST s allows the non-maskable
interrupt to generate an automatic reset for the reset time period when an out-of-tolerance condition
occurs in a monitored supply. An example is shown in Figure 9.
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DS1831/A/B
The output associated with the specific input will be held low if the voltage on the input pin is less than
1.25V. If the voltage is above 1.25V the output will not sink current and will be pulled up by the required
pull up resistor. The value of the resistors is not critical in most cases but must be set low enough to pull
the output to a high state. A common value used is 10kW. If a NMI output is connected to a pushbutton
input an additional pull-up resistor can be used (to improve speed of transitions) but is not required.
During a power-up, any detected IN pin levels above VTP by the comparator are disabled from generating
an inactive (high) interrupt until at least 1 supply on the VIN inputs rises above 1.5 volts. All NMI outputs
will be held active (low) until at least one VIN reaches 1.5 volts at which point the NMI outputs will be
based on the value of the associated IN input.
TIMING DIAGRAM—NON-MASKABLE INTERRUPT Figure 8
VIN >1.25V
VTP(max)
VTP
VTP(min)
VTP(min)
VTP
VTP(max)
tNMI
NMI
tIPD
VOH
VOL
8 of 14
DS1831/A/B
NON-MASKABLE INTERRUPT CIRCUIT EXAMPLE Figure 9
VSENSE1
VSENSE2
VCC
R1
PBRST3.3V
PBRST5V
R3
R2
IN1
DS1831
IN2
R4
NMI1
10 KW
NMI2
GND
MPBRST
Example:
VSENSE1 = 11.50V trip point VSENSE1 =
Therefore:
11.50V =
R1 + 100 k W
100 kW
R1 + R2
R2
X 1.25V
X 1.25V
Resulting In: R1 = 820kW
Repeat the same steps to solve for R3 and R4 with VSENSE2.
OPERATION - WATCHDOG TIMER
The watchdog timer function (DS1831A only) forces the WDS signal active (low) when the ST input
does not have a transition (high-to-low or low-to-high) within the predetermined time period. The timeout period is determined by the condition of the TDWD pin. If TDWD is connected to ground the minimum
watchdog time-out would be 10ms, TD floating would yield a minimum time-out of 100ms, and TDWD
connected to VCC would provide a time-out of 1000ms minimum. Time-out of the watchdog starts when
at least one of the RST outputs becomes inactive (high). If a transition occurs on the ST input pin prior to
time-out, the watchdog timer is reset and begins to time-out again. If the watchdog timer is allowed to
time-out, then the WDS output is pulsed active for a minimum of 100µs.
The WDS output is an open-drain output and must be pulled up externally. In most applications this
output would be connected to one of the Pushbutton inputs and would not require an external pull-up
resistor. The value of the resistors is not critical in most cases but must be set low enough to pull the
output to a high state. A common value used is 10kW. If a WDS output is connected to a pushbutton input
an additional pull-up resistor can be used (to improve speed of transitions) but is not required.
9 of 14
DS1831/A/B
The ST input can be derived from many microprocessor outputs. The most typical signals used are the
microprocessor address signals, data signals, or control signals. When the microprocessor functions
normally, these signals would, as a matter of routine, cause the watchdog to be reset prior to time-out. To
guarantee that the watchdog timer does not time-out, a transition must occur at or less than the minimum
times shown in Table 1. A typical circuit example is shown in Figure 10. The watchdog timing is shown
in Figure 11.
The DS1831A watchdog function cannot be disabled. The watchdog strobe input must be strobed to avoid
a watchdog time-out however the watchdog status output can be disconnected yielding the same result.
WATCHDOG CIRCUIT EXAMPLE Figure 10
VSENSE1
VCC
R1
PBRST3.3V
PBRST5V
IN1
µP
R2
NMI1
10kW
DS1831
ST
WDS
GND
TDWD
TIMING DIAGRAM—STROBE INPUT Figure 11
INVALID
EDGES
VALID
EDGES
INDETERMINATE
EDGES
ST
MIN
tST
tTD
WDS
10 of 14
MAX
DS1831/A/B
RESET TIMING DIAGRAM—POWER UP Figure 12
tR
VINTP (MAX)
VINTP (MIN)
VINTP
IN5V (or IN3.3V)
tRPU
VOH
RST5V (or RST3.3V)
RESET TIMING DIAGRAM - POWER DOWN Figure 13
IN5V (or IN3.3V)
VINTP (MAX)
RST5V (or RST3.3V)
tF
VINTP
VINTP (MIN)
tRPD
VOL
11 of 14
DS1831/A/B
ABSOLUTE MAXIMUM RATINGS*
Voltage on IN5V or IN3.3V
Pins Relative to Ground
Voltage on either RST Relative to Ground
Voltage on PBRST 3.3V Relative to Ground
Voltage on PBRST 5V Relative to Ground
Voltage on MPBRST, IN1, IN2
Relative to Ground
Operating Temperature Range
Storage Temperature Range
Soldering Temperature
*
-0.5V to +6.0V
-0.5V to the greater of IN5V + 0.5V or IN3.3V + 0.5V
-0.5V to IN3.3V + 0.5V
-0.5V to IN5V + 0.5V
-0.5V to the greater of IN5V + 0.5V or IN3.3V + 0.5V
-40°C to +85°C
-55°C to +125°C
See IPC/JEDEC J-STD-020A specification
This is a stress rating only and functional operation of the device at these or any other conditions
above those indicated in the operation sections of this specification is not implied. Exposure to
absolute maximum rating conditions for extended periods of time may affect reliability.
RECOMMENDED DC OPERATING CONDITIONS
PARAMETER
SYMBOL
MIN
IN5V (Supply Voltage)
V IN
1.0
IN3.3V (Supply Voltage)
V IN
1.0
2
ST and MPBRST input
VIH
VINT - 0.4
High Level
VIH
2
PBRST 3.3V input High Level
VIH
2
PBRST 5V input High Level
ST, PBRST 3.3V, PBRST 5V and
VIL
-0.3
MPBRST input Low Level
* VINT is the greater voltage level of the IN5V or IN3.3V.
(-40°C to 85°C)
MAX
5.5
5.5
IN3.3V + 0.3
IN5V + 0.3
UNITS
V
V
V
V
V
V
0.5
V
VINT + 0.3
NOTES
1
1
2*
3*
DC ELECTRICAL CHARACTERISTICS
(-40°C to 85°C; IN3.3V, IN5V = 1.0V to 5.5V)
PARAMETER
Input Leakage
Output Current @ 0.4V
Operating Current @ Ü5.5V
Operating Current @ Ü3.6V
IN5V Trip Point (TOL5V = IN5V)
IN5V Trip Point (TOL5V = GND)
IN5V Trip Point (TOL5V = Float)
IN3.3V Trip Point (TOL3.3V = IN3.3V)
IN3.3V Trip Point (TOL3.3V = GND)
IN3.3V Trip Point (TOL3.3V = Float)
IN Input Trip Points
SYMBOL
IIL
IOL
ICC
ICC
VINTP
VINTP
VINTP
VINTP
VINTP
VINTP
VTP
MIN
-1.0
+10
4.50
4.25
4.00
2.98
2.80
2.47
1.15
12 of 14
TYP
MAX
+1.0
80
60
4.63
4.38
4.15
3.06
2.88
2.55
1.25
100
80
4.75
4.49
4.24
3.15
2.97
2.64
1.30
UNITS
mA
mA
mA
µA
V
V
V
V
V
V
V
NOTES
4
5
6
DS1831/A/B
CAPACITANCE
PARAMETER
Input Capacitance
Input Capacitance
(tA = +25°C)
SYMBOL
CIN
COUT
MAX
5
7
UNITS
pF
pF
NOTES
AC ELECTRICAL CHARACTERISTICS
(-40°C to 85°C; IN3.3V, IN5V = 1.0V to 5.5V)
PARAMETER
RESET Active Time (TD=Low)
RESET Active Time (TD=Float)
RESET Active Time (TD=High)
VCC Detect to RST
VCC Detect to RST
VIN Detect to NMI
NMI Active Time
PBRST = VIL
PBRST Stable Low to Reset
Active
Watchdog Timeout (TD(WD)=Low)
Watchdog Timeout (TDWD=Float)
Watchdog Timeout (TDWD=High)
ST Pulse Width
Vin Slew Rate (V INTP(MAX) to V
INTP(MIN))
Vin Slew Rate (V INTP(MAX) to V
INTP(MIN))
SYMBOL
tRST
tRST
tRST
tRPU
tRPD
tIPD
tNMI
tPB
MIN
TYP
MAX
10
16
20
100
160
200
1000
1600
2000
See RESET Active Time
2
10
2
10
20
20
tPDLY
16
160
1600
UNITS
ms
ms
ms
ms
ms
ms
ms
ms
50
ms
20
200
2000
ms
ms
ms
ns
tTD
tTD
tTD
tST
10
100
1000
10
tF
300
ms
tR
0
ns
NOTES
7
7
7
7
8
8
NOTES:
1)
2)
3)
4)
5)
6)
7)
8)
All voltages are referenced to ground.
Measured with both IN3.3V & IN5V ³ 2.7V.
Measured with both IN3.3V & IN5V £ 2.7V.
All Pushbutton inputs are internally pulled to the associated Supply IN input or the greatest Supply IN
input for the MPBRST with an internal Impedance of 100kW.
Measured with outputs open and IN3.3V or IN5V £ 5.5V
Measured with outputs open and IN3.3V or IN5V £ 3.6V.
Measured using tR = 5µs
Noise immunity - pulses <2µs at a trip level will not cause a RST or NMI .
13 of 14
DS1831/A/B
ORDERING INFORMATION
Ordering Part
Package Type
Description
Number
DS1831
16-Pin DIP 300mil
5V/3.3V Multisupply Monitor
DS1831S
16-Pin SO 150mil
5V/3.3V Multisupply Monitor
DS1831A
16-Pin DIP 300mil
5V/3.3V Multisupply Monitor w/Watchdog
DS1831AS
16-Pin SO 150mil
5V/3.3V Multisupply Monitor w/Watchdog
DS1831B
16-Pin DIP 300mil
5V/3.3V Multisupply Monitor w/Pushbutton Status
DS1831BS
16-Pin SO 150mil
5V/3.3V Multisupply Monitor w/Pushbutton Status
* Add “/T&R” for tape and reeling of surface mount packages.
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