ETC IDT74FST3244PG

IDT74FST3244
OCTAL BUS SWITCH
INDUSTRIAL TEMPERATURE RANGE
OCTAL BUS SWITCH
IDT74FST3244
FEATURES:
DESCRIPTION:
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The FST3244 belongs to IDT's family of Bus switches. Bus switch
devices perform the function of connecting or isolating two ports without
providing any inherent current sink or source capability. Thus they
generate little or no noise of their own while providing a low resistance path
for an external driver. These devices connect input and output ports through
an n-channel FET. When the gate-to-source junction of this FET is
adequately forward-biased the device conducts or the resistance between
input and output ports is small. Without adequate bias on the gate-to-source
junction of the FET, the FET is turned off, therefore with no VCC applied, the
device has hot insertion capability.
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Bus switches provide zero delay paths
Extended commercial range of –40°C to +85°C
Low switch on-resistance
TTL-compatible input and output levels
ESD > 2000V per MIL-STD-883, Method 3015; > 200V using
machine model (C = 200pF, R = 0)
Available in QSOP, SOIC, SSOP, TSSOP, and PDIP Packages
Hot insertion capability
Very low power dissipation
The low on-resistance and simplicity of the connection between input
and output ports reduces the delay in this path to close to zero.
The FST3244 is an octal TTL-compatible bus switch. The OE pins
provide output enable control for all 8 bits. This device is pin-compatible
with and functionally similar to the FCT244T.
PIN CONFIGURATION
FUNCTIONAL BLOCK DIAGRAM
1 OE
1 OE
1
20
Vcc
1A 0
1B 0
1A 0
2
19
2 OE
1A 1
1B 1
2B 3
3
18
1B 0
1A 2
1B 2
1A 1
4
17
2A 3
1A 3
1B 3
2B 2
5
16
1B 1
1A 2
6
15
2A 2
2B 1
7
14
1B 2
1A 3
8
13
2A 1
2B 0
9
12
1B 3
10
11
2A 0
2 OE
2A 0
2B 0
2A 1
2B 1
GND
2A 2
2B 2
2A 3
2B 3
P20-1
SO20-2
SO20-8
SO20-9
SO20-7
QSOP/ SOIC/ SSOP/ TSSOP/ PDIP
TOP VIEW
INDUSTRIAL TEMPERATURE RANGE
OCTOBER 1999
1
c
1999 Integrated Device Technology, Inc.
DSC-5522/-
IDT74FST3244
OCTAL BUS SWITCH
INDUSTRIAL TEMPERATURE RANGE
ABSOLUTE MAXIMUM RATINGS(1)
Symbol
PIN DESCRIPTION
Rating
Max.
Unit
VTERM(2)
Terminal Voltage with Respect to GND
–0.5 to +7
V
Pin Names
xOE
TSTG
Storage Temperature
–65 to +150
°C
xAx
A Port Bits
IOUT
Maximum Continuous Channel Current
128
mA
xBx
B Port Bits
Description
Output Enable Inputs (Active LOW)
FST LINK
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM
RATINGS may cause permanent damage to the device. This is a
stress rating only and functional operation of the device at these or
any other conditions above those indicated in the operational sections
of this specification is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect reliability.
2. Vcc, Control, and Switch terminals.
FUNCTION TABLE
CAPACITANCE (1)
Symbol
Parameter
CIN
Control Input Capacitance
CI/O
Conditions(2)
Switch Input/Output
Capacitance
Switch Off
Typ.
8
Unit
13
pF
(1)
1OE
2OE
H
H
Disconnect
Description
L
H
Connect 1A to 1B
H
L
Connect 2A to 2B
L
L
Connect 1A to 1B and 2A to 2B
NOTE:
1. H = HIGH
L = LOW
pF
NOTES:
1. Capacitance is characterized but not tested.
2. TA = 25°C, f = 1MHz, VIN = 0V, VOUT = 0V
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified:
Operating Conditions: TA = -40°C to +85°C, VCC = 5.0V ±5%
Typ.(1)
—
Max.
—
—
—
0.8
V
—
—
±1
µA
—
—
±1
—
—
±1
—
—
±1
VCC = Min., IIN = –18mA
—
–0.7
–1.2
V
Switch Power Off Leakage
VCC = 0V, VIN or VO ≤ 5.5V
—
—
±1
µA
Quiescent Power Supply Current
VCC = Max., VIN = GND or VCC
—
0.1
3
µA
Symbol
VIH
Parameter
Control Input HIGH Voltage
Test Conditions
Guaranteed Logic HIGH Level
VIL
Control Input LOW Voltage
Guaranteed Logic LOW Level
IIH
Control Input HIGH Current
VCC = Max.
VI = VCC
IIL
Control Input LOW Current
VI = GND
IOZH
Current during
IOZL
Bus Switch DISCONNECT
VIK
Clamp Diode Voltage
IOFF
ICC
VCC = Max., VO = 0 to 5V
Min.
2
Unit
V
µA
BUS SWITCH IMPEDANCE OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified:
Operating Conditions: TA = -40°C to +85°C, VCC = 5.0V ±5%
Symbol
RON
IOS
Parameter
Switch CONNECT Resistance, A to B(2)
Short Circuit Current, A to B(3)
Test Conditions
Vcc = Min., VIN = 0V
ION = 30mA
Vcc = Min., VIN = 2.4V
ION = 15mA
A(B) = 0V, B(A) = VCC
NOTES:
1. Typical values are at Vcc = 5.0V, +25°C ambient.
2. The voltage drop between the indicated ports divided by the current through the switch.
3. Not more than one output should be shorted at one time. Duration of the test should not esceed one second.
2
Min.
—
Typ.(1)
5
Max.
7
—
10
15
100
—
—
Unit
Ω
mA
IDT74FST3244
OCTAL BUS SWITCH
INDUSTRIAL TEMPERATURE RANGE
POWER SUPPLY CHARACTERISTICS
Symbol
∆ICC
ICCD
Parameter
Quiescent Power Supply Current
TTL Inputs HIGH
Dynamic Power Supply Current(4)
IC
Total Power Supply Current(6)
Test Conditions(1)
VCC = Max.
VIN = 3.4V(3)
VCC = Max.
Outputs Open
1 Enable Pin Toggling
50% Duty Cycle
VCC = Max.
Outputs Open
2 Enable Pins Toggling
fi = 10MHz
50% Duty Cycle
Min.
—
Typ.(2)
0.5
Max.
1.5
Unit
mA
VIN = VCC
VIN = GND
—
120
160
µ A/
MHz/
Enable
VIN = VCC
VIN = GND
—
2.4
3.2
mA
VIN = 3.4
VIN = GND
—
2.9
4.7
NOTES:
1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at VCC = 3.3V, +25°C ambient.
3. Per TTL driven input (VIN = 3.4V). All other inputs at VCC or GND.
4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations.
5. CPD = ICCD/VCC
CPD = Power Dissipation Capacitance
6. IC = IQUIESCENT + IINPUTS + IDYNAMIC
IC = ICC + ∆ICC DHNT + ICCD (fiN)
ICC = Quiescent Current
∆ICC = Power Supply Current for a TTL High Input (VIN = 3.4V)
DH = Duty Cycle for TTL Inputs High
NT = Number of TTL Inputs at DH
ICCD = Dynamic Current Caused by an Input Transition Pair (HLH or LHL)
fi = Input Frequency
N = Number of Switches Toggling at fi
All currents are in milliamps and all frequencies are in megahertz.
SWITCHING CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified:
Operating Conditions: TA = -40°C to +85°C, VCC = 5.0V ±5%
Symbol
tPLH
tPHL
tPZH
tPZL
tPHZ
tPLZ
|QCI|
Description
Data Propagation Delay
A to B, B to A(2)
Switch CONNECT Delay
xOE to A or B
Switch DISCONNECT Delay
xOE to A or B
Charge Injection During Switch DISCONNECT,
xOE to A or B(3)
Min.(2)
—
Typ.
—
Max.
0.25
Unit
ns
1.5
—
6.5
ns
1.5
—
5.5
ns
—
1.5
—
pC
NOTES:
1. See test circuit and waveforms.
2. The bus switch contributes no propagation delay other than the RC delay of the load interacting with the RC of the switch.
3. IQCII is the charge injection for a single switch DISCONNECT and applies to either single switches or multiplexers.
IQDCII is the charge injection for a multiplexer as the multiplexed port switches from one path to another. Charge Injection is reduced becasue the injection
from the DISCONNECT of the first path is compensated by the CONNECT of the second path.
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IDT74FST3244
OCTAL BUS SWITCH
INDUSTRIAL TEMPERATURE RANGE
TEST CIRCUITS AND WAVEFORMS
PROPAGATION DELAY
TEST CIRCUITS FOR ALL OUTPUTS
V CC
7.0V
500 Ω
tPL H
V O UT
V IN
Pulse
Generator
tPH L
VOH
1.5V
VOL
OUTPUT
D.U.T.
tPL H
50pF
RT
3V
1.5V
0V
SAME PHASE
INPUT TRANSITION
C
500 Ω
tPH L
3V
1.5V
0V
OPPOSITE P HASE
INPUT TRANSITION
L
SET-UP, HOLD, AND RELEASE TIMES
SWITCH POSITION
Test
Switch
Disable Low
tH
t SU
Closed
TIMING
INPUT
Enable Low
All Other Tests
3V
1.5V
0V
3V
1.5V
0V
DATA
INPUT
Open Drain
Open
t REM
ASYNCHRONOUS
CONTROL
FCT LINK
DEFINITIONS:
CL = Load capacitance: includes jig and probe capacitance.
RT = Termination resistance: should be equal to ZOUT of the Pulse
Generator.
SYNCHRONOUS
CONTROL
t SU
3V
1.5V
0V
3V
1.5V
0V
tH
CHARGE INJECTION
VCC
ENABLE AND DISABLE TIMES
ENABLE
1 M Hz
Signal
G enerator
Enable/Select
(1 )
D.U.T.
Switch
O ut
3V
V O U T(3 )
CONTROL
INPUT
Switch In
(2 )
Switch In (M UX)
DISABLE
1.5V
t PZL
CL =
50pF
OUTPUT
NORMALLY
LOW
SW ITCH
CLOSED
NOTES:
1. Select is used with multiplexers for measuring IQDCII during multiplexer
select. During all other tests Enable is used.
2. Used with multiplexers to measure IQDCII only.
3. Charge Injection = ∆VOUT CL, with Enable toggling for IQCII or Select toggling
for IQDCII. ∆VOUT is the change in VOUT and is measured with a 10MΩ
probe.
0.3V
1.5V
tW
HIGH-LOW -HIGH
PULSE
VOL
tPHZ
0.3V
VOH
1.5V
0V
0V
NOTES:
1. Diagram shown for input Control Enable-LOW and input Control DisableHIGH
2. Pulse Generator for All Pulses: Rate ≤ 1.0MHz; tF ≤ 2.5ns; tR ≤ 2.5ns
PULSE WIDTH
LOW -HIGH-LOW
PULSE
SW ITCH
OPEN
3.5V
3.5V
1.5V
tPZH
OUTPUT
NORMALLY
HIGH
0V
tPLZ
1.5V
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IDT74FST3244
OCTAL BUS SWITCH
INDUSTRIAL TEMPERATURE RANGE
ORDERING INFORMATION
IDT
XX
Tem p. Range
FST
X
XX
X
Fam ily
Device Type
Package
PY
P
SO
Q
PG
Shrink Small Outline Package (SO20-7)
Plastic DIP (P20-1)
Sm all O utline IC (SO20-2)
Quarter-size Sm all O utline Package (SO20-8)
Thin Shrink Small Outline Package (SO20-9)
244
8-Bit Switch
3
Octal Bus Switch
74
− 40 ° C to +85 ° C
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