PI49FCT32806 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 3.3V, 2 x 1:5 CMOS Clock Driver Description Features Low output skew: <270ps Switching frequency of 133 MHz Fast output rise/fall time <1.5ns Low propagation delay <3.0ns Low input capacitance <6.0pF Balanced CMOS outputs Industrial Temperature: 40°C to +85°C 3.3V ±10% operation Packages available: 20-pin 300-mil wide SOIC (S) 20-pin 150-mil wide QSOP (Q) 20-pin 209-mil wide SSOP (H) Pericom Semiconductors PI49FCT series of logic circuits are produced using the Companys advanced submicron CMOS technology to achieve fast speed, low skew, fast slew rate, and low propagation delay for most computing and communication applications. The PI49FCT32806 are inverting drivers. The outputs are configured into 2 groups of 1-in, 5-out with independent output enable. Group B has an extra MON output. Excellent output signals to power and ground ratio minimize power and ground noise, and also improves output performance. PI49FCT32806 integrate series damping resistors on all outputs. PI49FCT32806 Logic Block Diagram Product Pin Configuration OEA VCCA OA0 5 INA OA0–4 OA1 OA2 GNDA 5 INB OB0–4 OA3 OA4 OEB GNDQ OEA MON INA 20 19 18 17 16 15 14 13 12 11 VCCB OB0 OB1 OB2 GNDB OB3 OB4 MON OEB INB Truth Table(1) Product Pin Description Pin Name OEA, OEB INA, INB OAN, OBN MON GND VCC 1 2 3 4 20-Pin 5 H,Q,S 6 7 8 9 10 Inputs Description Hi-Z State Output Enable Inputs (Active LOW) Clock Inputs Clock Outputs Monitor Output Ground Power OEA, OEB L L H H INA, INB L H L H Outputs OAN, OBN MON H H L L Z H Z L Note: 1. H = High Voltage Level Z = High Impedance L = Low Voltage Level 1 PS8495 08/10/00 PI49FCT32806 3.3V, 2 x 1:5 CMOS Clock Driver 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 Capacitance (TA = 25°C, f = 1 MHz) Parameters(1) Description Test Conditions Typ Max. Units CIN Input Capacitance VIN = 0V 3.0 4 pF COUT Output Capacitance VOUT = 0V 6 pF Maximum Ratings (Above which the useful life may be impaired. For user guidelines, not tested.) Storage Temperature ............................................................ 65°C to +150°C Ambient Temperature with Power Applied ........................... 40°C to +85°C Supply Voltage to Ground Potential (Inputs & Vcc Only) ...... 0.5V to +4.6V Supply Voltage to Ground Potential (Outputs & I/O Only) .... 0.5V to +4.6V DC Input Voltage .................................................................... 0.5V to +4.6V DC Output Current .............................................................................. 120mA Power Dissipation ................................................................................. 0.5W Note: Stresses greater than those listed under MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. Operating Range Ambient Temperature = 40°C to +85°C, VCC = 3.3V ± 0.3V DC Electrical Characteristics (Over the Operating Range) Symbol Te s t Conditions (1) De s cription M in. Typ.(2) M ax. VO H VC C = min. VIN = VIL or VIH Output high voltage IO H = 8mA 2.4(3) 3.0 VO L Output low voltage VC C = min. VIN = VIL or VIH IOL = 12mA 0.4 0.5 VIH Input high voltage LOW logic 2.0 Vcc- 0.2 VIL Input low voltage HIGH logic 0.5 0.8 IIH Input high current VC C = 3.6V, VIN = 3.6V 1 IIL Input low current VC C = 3.6V, VIN = 0V 1 IO ZH IO ZL High impedance output current VC C = 3.6V all outputs disabled 1 1 VIK Clamp diode voltage VC C = min., IIN = 18mA 0.7 1.2 IOH Output HIGH(4) current VO UT = 1.5V, VIN = VILor VIH VC C = 3.3V 25 45 80 IOL Output LOW(4) current VO UT = 1.5V, VIN = VILor VIH VC C = 3.3V 25 45 90 IO S Short circuit(5) current VC C = max. VO UT = GND 50 100 180 RS Internal series resistor VO UT = VC C VO UT = GND 22 Units V µA V mA Ohm (Please see page 3 for Notes.) 2 PS8495 08/10/00 PI49FCT32806 3.3V, 2 x 1:5 CMOS Clock Driver 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 Notes: 1. For Max. or Min. conditions, use appropriate value specified under Electrical Characteristics for the applicable device type. 2. Typical values are at VCC = 3.3V, +25°C ambient and maximum loading. 3. VOH = VCC 0.6V at rated current. 4. This parameter is determined by device characterization but is not production tested. 5. Not more than one output should be shorted at one time. Duration of the test should not exceed one second. Power Supply Characteristics Test Conditions(1) Parameters Description Min. Typ(2) Max. Units ICC Quiescent Power Supply Current VCC = Max. VIN = GND or VCC 3 30 µA DICC Supply Current per Inputs @ TTL HIGH VCC = Max. VIN = VCC 0.6V(3) 15.0 300 µA ICCD Supply Current per Input per MHz(4) VCC = Max., Outputs Open OEA or OEB = GND Per Output Toggling 50% Duty Cycle VIN = VCC VIN = GND 0.08 0.16 mA/ MHZ VCC = Max., Outputs Open fO = 10 MHZ 50% Duty Cycle OEA or OEB = GND Mon. Outputs Toggling VIN = VCC VIN = GND 3.3 9.0(5) VIN = VCC 0.6V VIN = GND 3.3 10.0(5) VIN = VCC VIN = GND 1.8 6.0 VIN = VCC 0.6V VIN = GND 1.8 7.0(5) IC VCC = Max., Outputs Open fO = 2.5 MHZ 50% Duty Cycle OEA or OEB = GND Eleven Outputs Toggling mA (5) Notes: 1. For Max. or Min. conditions, use appropriate value specified under Electrical Characteristics for the applicable device. 2. Typical values are at VCC = 3.3V, +25°C ambient. 3. Per TTL driven input (VIN = VCC 0.6V); all other inputs at VCC or GND. 4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations. 5. Values for these conditions are examples of the IC formula. These limits are guaranteed but not tested. 6. IC = IQUIESCENT + IINPUTS + IDYNAMIC IC = ICC + ∆ICC DHNT + ICCD (fONO) ICC = Quiescent Current ∆ICC = Power Supply Current for a TTL High Input (VIN = VCC 0.6V) DH = Duty Cycle for TTL Inputs High NT = Number of TTL Inputs at DH ICCD = Dynamic Current Caused by an Input Transition Pair (HLH or LHL) fO = Output Frequency NO = Number of Outputs at fO All currents are in milliamps and all frequencies are in megahertz. 3 PS8495 08/10/00 PI49FCT32806 3.3V, 2 x 1:5 CMOS Clock Driver 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 Switching Characteristics over Operating Range Condition M ax.(2) Units Symbol De s cription tPLH tPHL Propagation Delay A to Bn(4) 15pF 3.0 tR/tF Rise/Fall Time(2) 0.5V - 2.0V 15pF 1.5 tSK (p) Pulse Skew(2) Same Output 0.7 tSK (o) Output Skew(2) Same Package, Same Bank 0.27 tSK (t) Package Skew(2) Same Device, Same Bank 0.55 CL = 15pF 5.2 CL = 15pF 133 tZL, tZH, Enable/Disable tLZ, tHZ Time FM A X Input Frequency Switch Position Test Switch Disable LOW Enable LOW 6V Disable HIGH Enable HIGH GND All Other Inputs Open Definitions: CL = Load capacitance: includes jig and probe capacitance. RT = Termination resistance: should be equal to ZOUT of the Pulse Generator. ns MHz Note: 1. Lumped load, CL = 15pF 2. These parameters are guaranteed by design 3. Minimum propagation delay of 1.5ns is guaranteed but not tested. Tests Circuit for Enable/Disable Time Tests Circuit for FIN >100 MHz(2) +6.0V VCC VCC 500Ω Pulse D.U.T. Generator Pulse Generator f = 10MHz f = 125MHz RT CL= 15pF D.U.T. RT 500Ω CL 15pF RT = Termination resistance should be equal to ZOUT of the pulse generator 4 PS8495 08/10/00 PI49FCT32806 3.3V, 2 x 1:5 CMOS Clock Driver 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 SWITCHING WAVEFORMS Output Skew tSK(o) Propagation Delay 3V Input 3V 1.5V Input tPLHx tPHL tPLH 1.5V 0V 0V tPHLx VOH VOH Output Ox 1.5V 1.5V VOL VOL tSK(o) tSK(o) VOH Oy Enable and Disable Times Disable tSK(o) = | tPLHy – tPLHx | or | tPHLy – tPHLx | 3V OE 1.5V Pulse Skew tSK(p) 0V tPLZ tPZL Normally Low 3.0V Switch Closed Normally High 3V 3.0V Input 1.5V 0.3V Switch Open 1.5V 0V VOL tPLH tPHZ tPZH Output VOL tPHLy tPLHy Enable Output 1.5V tPHL VOH 0.3V VOH Output 1.5V 1.5V 0V VOL 0V tSK(p) = | tPHL – tPLH | Package Skew tSK(t) 3V Input 1.5V 0V tPHL1 tPLH1 VOH Package 1 Output 1.5V VOL tSK(t) tSK(t) VOH Package 2 Output 1.5V tPLH2 VOL tPHL2 tSK(t) = | tPLH2 – tPLH1 | or | tPHL2 – tPHL1 | 5 PS8495 08/10/00 PI49FCT32806 3.3V, 2 x 1:5 CMOS Clock Driver 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 20-Pin SOIC Package Drawing (S) 20 .2914 7.40 .2992 7.60 0.254 x 45˚ 0.737 .010 .029 1 .496 12.60 .511 12.99 .0091 .0125 0-8˚ 0.41 .016 1.27 .050 .020 0.508 REF .030 0.762 .0926 2.35 .1043 2.65 SEATING PLANE .050 BSC 1.27 0.23 0.32 .013 .020 0.33 0.51 .0040 .0118 .394 .419 10.00 10.65 0.10 0.30 X.XX DENOTES CONTROLLING X.XX DIMENSIONS IN MILLIMETERS 20-Pin QSOP Package Drawing (Q) 20 .150 .157 3.81 3.99 .015 x 45˚ 0.38 1 .007 .010 .337 8.56 .344 8.74 .058 REF 1.47 .016 .050 .053 1.35 .069 1.75 SEATING PLANE .025 BSC 0.635 0.178 0.254 0.41 1.27 .228 .244 5.79 6.19 .004 0.101 .010 0.254 .008 0.203 .012 0.305 X.XX DENOTES DIMENSIONS X.XX IN MILLIMETERS 6 PS8495 08/10/00 PI49FCT32806 3.3V, 2 x 1:5 CMOS Clock Driver 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 20-Pin SSOP Package Drawing (H) 20 .197 .220 5.00 5.60 1 .004 .009 .272 .295 6.90 7.50 0.55 .022 0.95 .037 .078 2.00 Max SEATING PLANE .0256 BSC 0.65 .0098 Max. 0.25 0.09 0.25 .291 .322 7.40 8.20 .002 Min 0.050 X.XX DENOTES DIMENSIONS X.XX IN MILLIMETERS Ordering Information Orde ring Code Part M arking Package Type PI49FCT32806H PI49FCT32806H 20- pin 209 mil SSO P PI49FCT32806Q PI49FCT32806Q 20- pin 150 mil Q SO P PI49FCT32806S PI49FCT32806S 20- pin 300 mil SO IC Rating Industrial Pericom Semiconductor Corporation 2380 Bering Drive • San Jose, CA 95131 • 1-800-435-2336 • Fax (408) 435-1100 • http://www.pericom.com 7 PS8495 08/10/00