ETC PT6102N

PT6100 Series
1 Amp Adjustable Positive Step-down
Integrated Switching Regulator
SLTS029A
(Revised 6/30/2000)
•
•
•
•
•
•
•
90% Efficiency
Adjustable Output Voltage
Internal Short Circuit Protection
Over-Temperature Protection
On/Off Control (Ground Off)
Small SIP Footprint
Meets Requirements for FCC
Part 15; Class B limits for
Radiated Emissions
• Wide Input Range
Pin-Out Information
Pin
Standard Application
VOADJ
12
VIN
2,3,4
PT6100
VOUT
9,10,11
1
5,6,7,8
C1
INH
C2
+
Q1
COM
COM
C1 = Optional 1µF ceramic
Q1 = NFET
C2 = Required 100µF electrolytic
Specifications
1
2
3
4
5
6
7
8
9
10
11
12
Function
Inhibit
(30V max)
Vin
Vin
Vin
GND
GND
GND
GND
Vout
Vout
Vout
Vout Adj
The PT6100 Series is a line of High-Performance 1 Amp, 12-Pin SIP (Single In-line
Package) Integrated Switching Regulators
(ISRs) designed to meet the on-board power
conversion needs of battery powered or other
equipment requiring high efficiency and small
size. This high performance ISR family offers
a unique combination of features combining
90% typical efficiency with open-collector
on/off control and adjustable output voltage.
Quiescent current in the shutdown mode is
less than 100µA.
Ordering Information
PT Series Suffix (PT1234X)
PT6101
PT6102
PT6103
Case/Pin
Configuration
Vertical Through-Hole
Horizontal Through-Hole
Horizontal Surface Mount
= +5 Volts
= +3.3 Volts
= +12 Volts
N
A
C
Pkg Style 200
PT6100 SERIES
Characteristics
(Ta =25°C unless noted)
Symbols
Conditions
Min
Typ
Max
Units
Output Current
Io
Over Vin range
0.1*
—
1.0
A
Short Circuit Current
Isc
Vin = Vin min
—
3.5
—
Apk
Input Voltage Range
Vin
0.1 ≤ Io ≤ 1.0 A
9
—
26
30/38**
30/38**
V
V
Output Voltage Tolerance
∆Vo
Over Vin Range, Io = 1.0 A
Ta = 0°C to +60°C
—
±1.0
±2.0
%Vo
Line Regulation
Regline
Over Vin range
—
±0.25
±0.5
%Vo
Load Regulation
Regload
0.1 ≤ Io ≤ 1.0 A
—
±0.25
±0.5
%Vo
Vo Ripple/Noise
Vn
Vin=Vin min, Io=1.0 A
—
±2
—
%Vo
Transient Response
with Co = 100µF
ttr
Vos
50% load change
Vo over/undershoot
—
—
100
5.0
200
—
µSec
%Vo
Efficiency
η
Vin=9V, Io=0.5A, Vo=3.3V
Vin=9V, Io=0.5A, Vo=5V
Vin=16V, Io=0.5A, Vo=12V
—
—
—
84
89
91
—
—
—
%
%
%
Switching Frequency
ƒo
Over Vin and Io ranges
400
500
600
kHz
Shutdown Current
Quiescent Current
Isc
Inl
Vin = 15V
Io = 0A, Vin =10V
—
—
100
10
—
—
µA
mA
Output Voltage
Adjustment Range
Vo
Below Vo
Above Vo
See Application Notes.
Absolute Maximum
Operating Temperature Range
Ta
Recommended Operating
Temperature Range
Ta
Thermal Resistance
θja
Storage Temperature
Ts
(Note: inhibit function cannot
be used with Vin above 30V.)
Vo = 3.3V
Vo = 5V
Vo = 12V
9
16
—
—
V
-40
—
+85
°C
Free Air Convection, Vo= 3.3V
(40-60LFM)
Vo= 5V
Vin=24V, Io=0.75A
Vo= 12V
-40
-40
-40
—
—
—
+85***
+85***
+80***
°C
Free Air Convection
(40-60LFM)
—
—
—
50
40
40
—
—
—
°C/W
Vo = 3.3V
Vo = 5V
Vo = 12V
-40
—
+125
°C
Mechanical Shock
Per Mil-STD-883D, Method 2002.3
1 msec, Half Sine, mounted to a fixture
—
500
—
G’s
Mechanical Vibration
Per Mil-STD-883D, Method 2007.2
20-2000 Hz, Soldered in a PC board
—
10
—
G’s
—
5.0
—
grams
Weight
* ISR will operate down to no load with reduced specifications.
** Input voltage cannot exceed 30V when the inhibit function is used.
***See Thermal Derating chart.
Note: The PT6100 Series requires a 100µF electrolytic or tantalum output capacitor for proper operation in all applications.
For technical support and more information, see inside back cover or visit www.ti.com/powertrends
Typical Characteristics
PT6100 Series
1 Amp Adjustable Positive Step-down
Integrated Switching Regulator
PT6101, 5.0 VDC
(See Note 1)
Efficiency vs Output Current
100
100
90
90
Efficiency - %
Efficiency - %
Efficiency vs Output Current
PT6103, 12.0 VDC
(See Note 1)
Vin
80
9.0V
12.0V
70
15.0V
18.0V
26.0V
60
(See Note 1)
Efficiency vs Output Current
100
90
Vin
80
9.0V
12.0V
18.0V
24.0V
30.0V
38.0V
70
Efficiency - %
PT6102, 3.3 VDC
80
16.0V
20.0V
24.0V
70
30.0V
38.0V
60
60
50
50
50
40
40
0
0.2
0.4
0.6
0.8
0
1
0.2
0.4
0.6
0.8
1
40
0
Iout-(Amps)
Ripple vs Output Current
180
80
160
26.0V
18.0V
50
15.0V
12.0V
40
350
300
120
38.0V
30.0V
100
24.0V
18.0V
12.0V
80
9.0V
250
38.0V
20
40
100
10
20
50
0
0
0.2
0.4
Iout-(Amps)
Thermal Derating (Ta)
20.0V
16.0V
0
0
1
24.0V
150
60
0.8
30.0V
200
30
0.6
1
Vin
9.0V
0.4
0.8
400
Ripple-(mV)
60
0.6
Ripple vs Output Current
140
Vin
Ripple-(mV)
Ripple-(mV)
70
0.2
0.4
Iout-(Amps)
Ripple vs Output Current
90
0
0.2
Iout-(Amps)
0.6
0.8
1
0
0.2
0.4
Iout-(Amps)
Thermal Derating (Ta)
(See Note 2)
0.6
0.8
1
Iout-(Amps)
Thermal Derating (Ta)
(See Note 2)
(See Note 2)
50°C
1
1
1
70°C
70°C
85°C
0.4
0.2
85°C
Iout-(Amps)
0.6
0.6
0.4
12
15
18
21
24
27
Vin-(Volts)
85°C
0.4
0
0
9
0.6
0.2
0.2
0
70°C
0.8
0.8
Iout-(Amps)
0.8
Iout-(Amps)
60°C
9
12
15
18
21
24
27
30
33
36
16
39
18
20
22
24
Vin-(Volts)
(n
Power Dissipation vs Output Current
28
30
32
34
36
38
Vin-(Volts)
Power Dissipation vs Output Current
Power Dissipation vs Output Current
2
1.4
1
26
1.8
0.9
1.2
0.8
1.6
26.0V
0.6
18.0V
15.0V
0.5
12.0V
0.4
9.0V
0.3
Vin
1
38.0V
30.0V
24.0V
18.0V
12.0V
9.0V
0.8
0.6
PD-(Watts)
PD-(Watts)
0.7
PD-(Watts)
Vin
Vin
1.4
38.0V
1.2
30.0V
24.0V
1
20.0V
0.8
16.0V
0.6
0.4
0.2
0.4
0.2
0.1
0.2
0
0
0.2
0.4
0.6
Iout-(Amps)
0.8
1
0
0
0
0.2
0.4
0.6
0.8
1
0
0.2
Iout-(Amps)
0.4
0.6
0.8
1
Iout-(Amps)
Note 1: All data listed in the above graphs, except for derating data, has been developed from actual products tested at 25°C. This data is considered typical data for the ISR.
Note 2: Thermal derating graphs are developed in free air convection cooling of 40-60 LFM. (See Thermal Application Notes.)
For technical support and more information, see inside back cover or visit www.ti.com/powertrends
Application Notes
PT6100/6210/6300 Series
Adjusting the Output Voltage of Power Trends’
Wide Input Range Bus ISRs
The output voltage of the Power Trends’ Wide Input
Range Series ISRs may be adjusted higher or lower than the
factory trimmed pre-set voltage with the addition of a single
external resistor. Table 1 accordingly gives the allowable
adjustment range for each model for either series as Va (min)
and Va (max).
Adjust Up:
An increase in the output voltage is obtained by
adding a resistor R2, between pin 12 (Vo adjust) and pins 5-8
(GND).
Figure 1
2,3,4
Vin
PT6100/6200/6300
Vin
Vo
GND
9,10,11
Vo
Vo(adj)
5,6,7,8
12
(R1)
Adj Down
C1
1µF Ceramic
(Optional)
C2
+
100µF
(Req’d)
R2
Adjust
Up
COM
COM
Adjust Down: Add a resistor (R1), between pin 12 (Vo adjust)
and pins 9-11(Vout).
Refer to Figure 1 and Table 2 for both the placement and value
of the required resistor; either (R1) or R2 as appropriate.
Notes:
1. Use only a single 1% resistor in either the (R1) or R2
location. Place the resistor as close to the ISR as possible.
2. Never connect capacitors from Vo adjust to either GND or
Vout. Any capacitance added to the Vo adjust pin will affect
the stability of the ISR.
3. Adjustments to the output voltage may place additional
limits on the maximum and minimum input voltage for the
part. The revised maximum and minimum input voltage
limits must comply with the following requirements. Note
that the minimum input voltage limits are also model
dependant.
Vin (max) = (8 x Va)V or *30/38V,
whichever is less.
The values of (R1) [adjust down], and R2 [adjust up], can
also be calculated using the following formulae.
(R1)
=
Ro (Va – 1.25)
Vo – Va
kΩ
R2
=
1.25 Ro
Va – Vo
kΩ
Where: Vo = Original output voltage
Va = Adjusted output voltage
Ro = The resistance value fromTable 1
*
Limit is 30V when inhibit function is active.
Table 1
ISR ADJUSTMENT RANGE AND FORMULA PARAMETERS
PT6x0x/PT6x1x series:
1Adc Rated
2Adc Rated
3Adc Rated
Vin (min) = (Va + 4)V or 9V,
whichever is greater.
PT6x2x series:
Vo <10V;
Vin (min) = (Va + 2.0)V or 7.0V,
whichever is greater.
Vo ≥10V;
Vin (min) = (Va + 2.5)V
PT6102
PT6213
PT6303
PT6101
Vo (nom)
Va (min)
3.3
1.89
Va (max)
Ω)
Ro (kΩ
For technical support and more information, see inside back cover or visit www.ti.com/powertrends
PT6212
PT6302
PT6103
PT6214
PT6304
5.0
5.0
12.0
1.88
2.18
2.43
6.07
11.25
8.5
22.12
66.5
150.0
90.9
243.0
Application Notes continued
PT6100/6210/6300 Series
Table 2
ISR ADJUSTMENT RESISTOR VALUES
1Adc Rated
2Adc Rated
3Adc Rated
Vo (nom)
Va (req.d)
PT6102
PT6213
PT6303
3.3
PT6101
1.9
(30.9)kΩ
2.0
(38.4)kΩ
2.1
ISR ADJUSTMENT RESISTOR VALUES (Cont)
PT6103
PT6214
PT6304
12.0
1Adc Rated
2Adc Rated
3Adc Rated
Vo (nom)
Va (req.d)
PT6101
5.0
PT6212
PT6302
5.0
PT6103
PT6214
PT6304
12.0
(31.5)kΩ
(37.5)kΩ
6.2
156.0kΩ
94.7kΩ
(207.0)kΩ
6.4
134.0kΩ
81.2kΩ
(47.1)kΩ
(44.0)kΩ
(223.0)kΩ
6.6
117.0kΩ
71.0kΩ
2.2
(57.4)kΩ
(50.9)kΩ
(241.0)kΩ
(30.8)kΩ
6.8
104.0kΩ
63.1kΩ
2.3
(69.8)kΩ
(259.0)kΩ
(58.3)kΩ
(35.4)kΩ
7.0
93.8kΩ
56.8kΩ
2.4
(279.0)kΩ
(85.0)kΩ
(66.3)kΩ
(40.2)kΩ
7.2
85.2kΩ
51.6kΩ
(301.0)kΩ
2.5
(104.0)kΩ
(75.0)kΩ
(45.5)kΩ
(32.0)kΩ
7.4
78.1kΩ
47.3kΩ
(325.0)kΩ
2.6
(128.0)kΩ
(84.4)kΩ
(51.1)kΩ
(34.9)kΩ
7.6
72.1kΩ
43.7kΩ
(351.0)kΩ
2.7
(161.0)kΩ
(94.6)kΩ
(57.3)kΩ
(37.9)kΩ
7.8
67.0kΩ
40.6kΩ
(379.0)kΩ
2.8
(206.0)kΩ
(106.0)kΩ
(64.0)kΩ
(40.9)kΩ
8.0
62.5kΩ
37.9kΩ
(410.0)kΩ
2.9
(274.0kΩ
(118.0)kΩ
(71.4)kΩ
(44.1)kΩ
8.2
58.6kΩ
35.5kΩ
(444.0)kΩ
3.0
(388.0)kΩ
(131.0)kΩ
(79.5)kΩ
(47.3)kΩ
8.4
55.1kΩ
33.4kΩ
(483.0)kΩ
3.1
(615.0)kΩ
(146.0)kΩ
(88.5)kΩ
(50.5)kΩ
8.6
52.1kΩ
(525.0)kΩ
3.2
(1300.0)kΩ
(163.0)kΩ
(98.5)kΩ
(53.8)kΩ
8.8
49.3kΩ
(573.0)kΩ
(181.0)kΩ
(110.0)kΩ
(57.3)kΩ
9.0
46.9kΩ
(628.0)kΩ
3.3
5.0
PT6212
PT6302
5.0
3.4
831.0kΩ
(202.0)kΩ
(122.0)kΩ
(60.8)kΩ
9.5
41.7kΩ
(802.0)kΩ
3.5
416.0kΩ
(225.0)kΩ
(136.0)kΩ
(64.3)kΩ
10.0
37.5kΩ
(1060.0)kΩ
3.6
227.0kΩ
(252.0)kΩ
(153.0)kΩ
(68.0)kΩ
10.5
34.1kΩ
(1500.0)kΩ
3.7
208.0kΩ
(283.0)kΩ
(171.0)kΩ
(71.7)kΩ
11.0
31.3kΩ
3.8
166.0kΩ
(319.0)kΩ
(193.0)kΩ
(75.6)kΩ
11.5
3.9
139.0kΩ
(361.0)kΩ
(219.0)kΩ
(79.5)kΩ
12.0
4.0
119.0kΩ
(413.0)kΩ
(250.0)kΩ
(83.5)kΩ
12.5
608.0kΩ
4.1
104.0kΩ
(475.0)kΩ
(288.0)kΩ
(87.7)kΩ
13.0
304.0kΩ
4.2
92.4kΩ
(533.0)kΩ
(335.0)kΩ
(91.9)kΩ
13.5
203.0kΩ
4.3
83.1kΩ
(654.0)kΩ
(396.0)kΩ
(96.3)kΩ
14.0
152.0kΩ
4.4
75.6kΩ
(788.0)kΩ
(477.0)kΩ
(101.0)kΩ
14.5
122.0kΩ
4.5
69.3kΩ
(975.0)kΩ
(591.0)kΩ
(105.0)kΩ
15.0
101.0kΩ
4.6
63.9kΩ
(1260.0)kΩ
(761.0)kΩ
(110.0)kΩ
15.5
86.8kΩ
4.7
59.4kΩ
(1730.0)kΩ
(1050.0)kΩ
(115.0)kΩ
16.0
75.9kΩ
4.8
55.4kΩ
(1610.0)kΩ
(120.0)kΩ
16.5
67.5kΩ
4.9
52.0kΩ
(125.0)kΩ
17.0
60.8kΩ
5.0
48.9kΩ
(130.0)kΩ
17.5
55.2kΩ
5.1
46.2kΩ
1880.0kΩ
1140.0kΩ
(136.0)kΩ
18.0
50.6kΩ
5.2
43.8kΩ
937.0kΩ
568.0kΩ
(141.0)kΩ
18.5
46.7kΩ
5.3
41.6kΩ
625.0kΩ
379.0kΩ
(147.0)kΩ
19.0
43.4kΩ
5.4
39.6kΩ
469.0kΩ
284.0kΩ
(153.0)kΩ
19.5
40.5kΩ
5.5
37.8kΩ
375.0kΩ
227.0kΩ
(159.0)kΩ
20.0
38.0kΩ
5.6
36.1kΩ
313.0kΩ
189.0kΩ
(165.0)kΩ
20.5
35.7kΩ
5.7
34.6kΩ
268.0kΩ
162.0kΩ
(172.0)kΩ
21.5
33.8kΩ
5.8
33.3kΩ
234.0kΩ
142.0kΩ
(178.0)kΩ
21.5
32.0kΩ
5.9
32.0kΩ
208.0kΩ
126.0kΩ
(185.0)kΩ
22.0
30.4kΩ
6.0
30.8kΩ
188.0kΩ
114.0kΩ
(192.0)kΩ
R1 = (Blue)
R2 = Black
For technical support and more information, see inside back cover or visit www.ti.com/powertrends
Application Notes
PT6100/6210/6300 Series
Using the Inhibit Function on Power Trends’
Wide Input Range Bus ISRs
For applications requiring output voltage On/Off control, the 12pin ISR products incorporate an inhibit function.
The function has uses in areas such as battery conservation,
power-up sequencing, or any other application where the
regulated output from the module is required to be switched
off. The On/Off function is provided by the Pin 1 (Inhibit)
control.
The ISR functions normally with Pin 1 open-circuit,
providing a regulated output whenever a valid source voltage
is applied to Vin, (pins 2, 3, & 4). When a low-level2 ground
signal is applied to Pin 1, the regulator output will be disabled.
Figure 1 shows an application schematic, which details
the typical use of the Inhibit function. Note the discrete
transistor (Q1). The Inhibit control has its own internal
pull-up with a maximum open-circuit voltage of 8.3VDC.
Only devices with a true open-collector or open-drain output can be used to control this pin. A discrete bipolar
transistor or MOSFET is recommended.
Equation 1 may be used to determine the approximate
current drawn by Q1 when the inhibit is active.
Equation 1
Istby
= Vin ÷ 155kΩ
± 20%
Figure 1
2,3,4
V in
PT6100/6210/6300
Vin
Vo
Inh*
1
C1, 1µF
(Optional)
GND
5,6,7,8
V out
12
C2
100µF
Q1
BSS138
Inh
9,10,11
Vo(adj)
+
COM
COM
Turn-On Time: The output of the ISR is enabled automatically
when external power is applied to the input. The Inhibit control
pin is pulled high by its internal pull-up resistor. The ISR
produces a fully regulated output voltage within 1-msec of
either the release of the Inhibit control pin, or the application
of power. The actual turn-on time will vary with the input
voltage, output load, and the total amount of capacitance connected to the output Using the circuit of Figure 1, Figure 2
shows the typical rise in output voltage for the PT6101 following the turn-off of Q1 at time t =0. The waveform was
measured with a 9Vdc input voltage, and 5-Ohm resistive load.
Figure 2
6
5
4
Vo (Vdc)
Notes:
1. The Inhibit control logic is similar for all Power Trends’
modules, but the flexibility and threshold tolerances will be
different. For specific information on the inhibit function
of other ISR models, consult the applicable application
note.
2. Use only a true open-collector device (preferably a discrete
transistor) for the Inhibit input. Do Not use a pull-up
resistor, or drive the input directly from the output of a
TTL or other logic gate. To disable the output voltage,
the control pin should be pulled low to less than +1.5VDC.
3. When the Inhibit control pin is active, i.e. pulled low, the
maximum allowed input voltage is limited to +30Vdc.
4. Do not control the Inhibit input with an external DC
voltage. This will lead to erratic operation of the ISR and
may over-stress the regulator.
5. Avoid capacitance greater than 500pF at the Inhibit control
pin. Excessive capacitance at this pin will cause the ISR to
produce a pulse on the output voltage bus at turn-on.
6. Keep the On/Off transition to less than 10µs. This
prevents erratic operation of the ISR, which can cause a
momentary high output voltage.
3
2
1
0
-0.2
For technical support and more information, see inside back cover or visit www.ti.com/powertrends
0
0.2
0.4
t (milli-secs)
0.6
0.8
1
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