® INA2132 INA 213 2 Dual, Low Power, Single-Supply DIFFERENCE AMPLIFIER FEATURES APPLICATIONS ● DESIGNED FOR LOW COST ● LOW QUIESCENT CURRENT: 160µA per Amplifier ● WIDE POWER SUPPLY RANGE: Single Supply: 2.7V to 36V Dual Supplies: ±1.35V to ±18V ● LOW GAIN ERROR: ±0.05% max ● LOW NONLINEARITY: 0.001% max ● HIGH CMRR: 90dB ● HIGHLY VERSATILE CIRCUIT ● EASY TO USE ● SO-14 PACKAGE ● DIFFERENTIAL INPUT AMPLIFIER ● INSTRUMENTATION AMPLIFIER BUILDING BLOCK ● UNITY-GAIN INVERTING AMPLIFIER ● G = 1/2 AMPLIFIER ● G = 2 AMPLIFIER ● SUMMING AMPLIFIER ● DIFFERENTIAL CURRENT RECEIVER ● VOLTAGE-CONTROLLED CURRENT SOURCE ● BATTERY-POWERED SYSTEMS ● GROUND LOOP ELIMINATOR V+ DESCRIPTION 11 The INA2132 is a dual low power, unity-gain difference amplifier offering excellent value at very low cost. Each channel consists of a precision op amp with a laser-trimmed precision resistor network, providing accurate gain and high common-mode rejection. Excellent TCR tracking of the resistors maintains gain accuracy and common-mode rejection over temperature. The internal op amp’s common-mode range extends to the negative supply—ideal for single-supply applications. The difference amplifier is the foundation of many commonly used circuits. The INA2132 provides this circuit function without using an expensive precision resistor network. The INA2132 is available in the SO-14 surface-mount package and is specified for operation over the extended industrial temperature range, –40°C to +85°C. A single version of this product with similar specifications is also available. See the INA132 data sheet for details. –In A 2 40kΩ 40kΩ 13 A +In A –In B 3 6 40kΩ 40kΩ 40kΩ 40kΩ 5 40kΩ 14 10 9 B +In B 12 40kΩ 8 Sense A Out A Ref A Sense B Out B Ref B INA2132 4 V– International Airport Industrial Park • Mailing Address: PO Box 11400, Tucson, AZ 85734 • Street Address: 6730 S. Tucson Blvd., Tucson, AZ 85706 • Tel: (520) 746-1111 Twx: 910-952-1111 • Internet: http://www.burr-brown.com/ • Cable: BBRCORP • Telex: 066-6491 • FAX: (520) 889-1510 • Immediate Product Info: (800) 548-6132 ©1998 Burr-Brown Corporation SBOS108 PDS-1488A Printed in U.S.A. December, 1998 SPECIFICATIONS: VS = ±15V At TA = +25°C, RL = 10kΩ connected to ground, and reference pins connected to ground unless otherwise noted. INA2132U PARAMETER CONDITIONS VOLTAGE(1) OFFSET Initial vs Temperature vs Power Supply vs Time Channel Separation(2) MIN INA2132UA TYP MAX ±75 ±1 ±5 0.3 0.04 ±250 ±5 ±30 MIN TYP MAX UNITS ✻ ✻ ✻ ✻ ±500 ±10 ✻ µV µV/°C µV/V µV/mo µV/V RTO VOS dVOS /dT PSRR VS = ±1.35V to ±18V dc INPUT IMPEDANCE(3) Differential Common-Mode INPUT VOLTAGE RANGE Common-Mode Voltage Range(4) Common-Mode Rejection Ratio CMRR OUTPUT VOLTAGE NOISE(5) f = 0.1Hz to 10Hz f = 1kHz VO = 0V VCM = –30V to 28V, RS = 0Ω 2 (V–) 80 ✻ 74 1.6 65 1 ±0.01 ±1 ±0.0001 VO = –14V to 13.5V VO = –14V to 13.5V OUTPUT Voltage, Positive Negative Positive Negative Current Limit, per Amplifier Capacitive Load (stable operation) RL = 100kΩ to Ground RL = 100kΩ to Ground RL = 10kΩ to Ground RL = 10kΩ to Ground Continuous to Common ✻ ✻ V dB ✻ ✻ µVp-p nV/√Hz –3dB ✻ ✻ ✻ ✻ ±0.05 ±10 ±0.001 ✻ ✻ ✻ ✻ (V+) –1 (V+) –0.8 (V–) +0.5 (V–) +0.15 (V+) –1.5 (V+) –0.8 (V–) +1 (V–) +0.25 ±12 10 300 0.1 85 88 7 SR VO = 10V Step VO = 10V Step 50% Overdrive POWER SUPPLY Rated Voltage VS Voltage Range Quiescent Current (per amplifier) IQ TEMPERATURE RANGE Specification Operation Storage Thermal Resistance 2 (V+) –2 90 kΩ kΩ RTO GAIN Initial Error vs Temperature Nonlinearity FREQUENCY RESPONSE Small-Signal Bandwidth Slew Rate Settling Time: 0.1% 0.01% Overload Recovery Time ✻ ✻ 80 40 ±15 ±1.35 ±160 IO = 0mA –40 –55 –55 θJA 100 ±0.1 ✻ ±0.002 ✻ ✻ ✻ ✻ ✻ ✻ V V V V mA nF ✻ ✻ ✻ ✻ ✻ kHz V/µs µs µs µs ✻ ±18 ±185 ✻ +85 +125 +125 ✻ ✻ ✻ V/V % ppm/°C % of FS ✻ ✻ ✻ ✻ ✻ ✻ ✻ V V µA °C °C °C °C/W ✻ Specifications the same as INA2132U. NOTES: (1) Includes effects of amplifier’s input bias and offset currents. (2) Measured output offset change of one channel for a full-scale swing (VO = –14V to 13.5V) on the opposite channel. (3) 40kΩ resistors are ratio matched but have ±20% absolute value. (4) 2 (V–) –VREF < VCM < 2 ((V+) –1) –VREF. For more detail, see Applications Information section. (5) Includes effects of amplifier’s input current noise and thermal noise contribution of resistor network. The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes no responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject to change without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant any BURR-BROWN product for use in life support devices and/or systems. ® INA2132 2 SPECIFICATIONS: VS = +5V Single Supply At TA = +25°C, RL = 10kΩ connected to VS /2, and reference pin connected to VS /2, unless otherwise noted. INA2132U PARAMETER OFFSET VOLTAGE(1) Initial vs Temperature CONDITIONS RTO MIN VOS dVOS /dT INPUT VOLTAGE RANGE Common-Mode Voltage Range(2) Common-Mode Rejection CMRR OUTPUT Voltage, Positive Negative Positive Negative POWER SUPPLY Rated Voltage Voltage Range Quiescent Current INA2132UA TYP MAX ±150 ±2 ±500 MIN TYP MAX UNITS ✻ ✻ ±750 µV µV/°C ✻ VCM = –2.5V to +5.5V, RS = 0Ω –2.5 80 90 ✻ 74 ✻ V dB RL = 100kΩ to Ground RL = 100kΩ to Ground RL = 10kΩ to Ground RL = 10kΩ to Ground (V+) –1 +0.25 (V+) –1 +0.25 (V+) –0.75 +0.06 (V+) –0.8 +0.12 ✻ ✻ ✻ ✻ ✻ ✻ ✻ ✻ V V V V +5.5 ✻ +5 VS +2.7 ±155 IO = 0mA IQ +36 ±185 ✻ ✻ ✻ ✻ V V µA ✻ Specifications the same as INA2132U. NOTE: (1) Includes effects of amplifier’s input bias and offset currents. (2) 2 (V–) –VREF < VCM < 2 ((V+) –1) –VREF. For more detail, see Applications Information section. PIN CONFIGURATION ABSOLUTE MAXIMUM RATINGS Top View SO-14 NC 1 –In A 2 14 Ref A 13 Out A Supply Voltage, V+ to V– .................................................................... 36V Input Voltage Range .......................................................................... ±80V Output Short-Circuit (to ground) .............................................. Continuous Operating Temperature .................................................. –55°C to +125°C Storage Temperature ..................................................... –55°C to +125°C Junction Temperature .................................................................... +150°C Lead Temperature (soldering, 10s) ............................................... +300°C A +In A 3 12 Sense A V– 4 11 V+ +In B 5 10 Sense B ELECTROSTATIC DISCHARGE SENSITIVITY This integrated circuit can be damaged by ESD. Burr-Brown recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. B –In B 6 9 Out B NC 7 8 Ref B ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. NC = No Connection PACKAGE/ORDERING INFORMATION PRODUCT PACKAGE PACKAGE DRAWING NUMBER(1) INA2132U " INA2132UA " SO-14 Surface-Mount " SO-14 Surface-Mount " 235 " 235 " SPECIFIED TEMPERATURE RANGE PACKAGE MARKING ORDERING NUMBER(2) TRANSPORT MEDIA –40°C to +85°C " –40°C to +85°C " INA2132U " INA2132UA " INA2132U INA2132U/2K5 INA2132UA INA2132UA/2K5 Rails Tape and Reel Rails Tape and Reel NOTES: (1) For detailed drawing and dimension table, please see end of data sheet, or Appendix C of Burr-Brown IC Data Book. (2) Models with a slash (/) are available only in Tape and Reel in the quantities indicated (e.g., /2K5 indicates 2500 devices per reel). Ordering 2500 pieces of “INA2132U/2K5” will get a single 2500-piece Tape and Reel. For detailed Tape and Reel mechanical information, refer to Appendix B of Burr-Brown IC Data Book. ® 3 INA2132 TYPICAL PERFORMANCE CURVES At TA = +25°C and VS = ±15V, unless otherwise noted. COMMON-MODE REJECTION vs FREQUENCY GAIN vs FREQUENCY 100 20 CL = 100pF RL = 10kΩ 0 CL = 1000pF RL = ∞ –20 90 Common-Mode Rejection (dB) Closed-Loop Gain (dB) VS = ±15V or +5V –40 VS = ±15V 80 VS = +5V 70 60 50 40 –60 30 10k 100k 1M 10 100 1k Frequency (Hz) POWER SUPPLY REJECTION vs FREQUENCY 1M 150 +PSRR 140 VS = ±15V 100 80 Channel Separation (dB) Power Supply Rejection (dB) 100k CHANNEL SEPARATION vs FREQUENCY 120 VS = +5V 60 –PSRR 40 10k Frequency (Hz) 20 130 120 110 100 90 80 70 60 0 100 1k 10k 100k 50 1M 0.1 1 10 100 Frequency (Hz) V+ 25°C (V+) –1.5 (V+) –2 –40°C (V+) –2.5 (V–) +2.5 –55°C –40°C 85°C 25°C (V–) +1 1M 13 200 –55°C Quiescent Current (µA) Output Voltage Swing (V) 85°C (V+) –1 (V–) +2 100k 210 125°C (V–) +1.5 10k QUIESCENT and SHORT-CIRCUIT CURRENT vs TEMPERATURE OUTPUT VOLTAGE SWING vs OUTPUT CURRENT (V+) –0.5 1k Frequency (Hz) 125°C 12 ±ISC 190 11 180 10 IQ 170 9 160 8 (V–) +0.5 150 V– ±2 0 ±4 ±6 ±8 ±10 –75 –25 0 25 50 Temperature (°C) Output Current (mA) ® INA2132 –50 4 75 100 7 125 Short-Circuit Current |mA| 10 TYPICAL PERFORMANCE CURVES (CONT) At TA = +25°C and VS = ±15V, unless otherwise noted. SMALL-SIGNAL STEP RESPONSE CL = 200pF SLEW RATE vs TEMPERATURE 0.18 0.14 50mV/div Slew Rate (V/µs) 0.16 0.12 0.10 0.08 0.06 –75 –50 –25 0 25 50 75 100 10µs/div 125 Temperature (°C) SMALL-SIGNAL STEP RESPONSE CL = 1000pF 5V/div 50mV/div LARGE-SIGNAL STEP RESPONSE 10µs/div 100µs/div SETTLING TIME vs LOAD CAPACITANCE INPUT COMMON-MODE VOLTAGE RANGE vs OUTPUT VOLTAGE 100 40 10V Step Common-Mode Voltage (V) Settling Time (µs) 96 92 0.01% 88 84 0.1% 80 100pF VS = ±15V 30 20 VS = +5V 10 0 –10 VS = ±5V –20 VREF = 0V G=1 –30 –40 1000pF 10,000pF –16 Load Capacitance –12 –8 –4 0 4 8 12 16 Output Voltage (V) ® 5 INA2132 TYPICAL PERFORMANCE CURVES (CONT) At TA = +25°C and VS = ±15V, unless otherwise noted. 0.1Hz to 10Hz PEAK-TO-PEAK VOLTAGE NOISE OFFSET VOLTAGE PRODUCTION DISTRIBUTION 25 0.5µV/div Percent of Amplifiers (%) VS = ±15V 20 15 10 5 500 400 300 200 100 0 –100 –200 –300 –500 –400 0 500ms/div Offset Voltage (µV) OFFSET VOLTAGE PRODUCTION DISTRIBUTION OFFSET VOLTAGE DRIFT PRODUCTION DISTRIBUTION 18 VS = ±15V 35 Percent of Amplifiers (%) 14 12 10 8 6 4 30 25 20 15 10 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5 6 6.5 7 7.5 8 8.5 9 9.5 10 700 600 500 400 300 200 0 100 –100 –200 –300 0 –400 0 –500 5 –600 2 –700 Percent of Amplifiers (%) 16 40 VS = +5V Offset Voltage Drift (µV/°C) Offset Voltage (µV) ® INA2132 6 APPLICATIONS INFORMATION In the case where VREF is grounded, the equation simplifies to: Figure 1 shows the basic connections required for operation of the INA2132. Power supply bypass capacitors should be connected close to the device pins. 2 • (V–) < VCM < 2 • ((V+) – 1) For more information, see the typical performance curve titled “Input Common-Mode Voltage Range vs Output Voltage.” The differential input signal is connected to pins 2 and 3 (or pins 6 and 5) as shown. The source impedances connected to the inputs must be nearly equal to assure good commonmode rejection. An 8Ω mismatch in source impedance will degrade the common-mode rejection of a typical device to approximately 80dB. Gain accuracy will also be slightly affected. If the source has a known impedance mismatch, an additional resistor in series with one input can be used to preserve good common-mode rejection. OPERATING VOLTAGE The INA2132 operates from single (+2.7V to +36V) or dual (±1.35V to ±18V) supplies with excellent performance. Specifications are production tested with +5V and ±15V supplies. Most behavior remains unchanged throughout the full operating voltage range. Parameters which vary significantly with operating voltage are shown in the Typical Performance Curves. Do not interchange pins 3 and 14 (or pins 5 and 8) or pins 2 and 12 (or pins 6 and 10), even though nominal resistor values are equal. These resistors are laser-trimmed for precise resistor ratios to achieve accurate gain and highest CMRR. Interchanging these pins may not provide specified performance. As shown in Figure 1, sense line should be connected as close to the load as possible. The INA2132 can accurately measure differential signals that are beyond the power supply rails. Linear commonmode range extends to twice the negative power supply voltage and nearly twice the positive power supply voltage. Output phase reversal does not occur when the inputs to the internal operational amplifier are overloaded to either rail. See typical performance curve, “Common-Mode Range vs Output Voltage.” NOTE: Pin numbers in parentheses ( ) refer to channel B. OFFSET VOLTAGE TRIM V+ V– 1µF 1µF The INA2132 is laser-trimmed for low offset voltage and drift. Most applications require no external offset adjustment. Figure 2 shows an optional circuit for trimming the output offset voltage. The output is referred to the output reference terminal (pin 14 or pin 8), which is normally grounded. A voltage applied to the Ref terminal will be summed with the output signal. This can be used to null offset voltage. The source impedance of a signal applied to the Ref terminal should be less than 8Ω to maintain good common-mode rejection. To assure low impedance at the Ref terminal, the trim voltage can be buffered with an op amp, such as the OPA277. 11 4 INA2132 V2 V3 2(6) 3 (5) R1 R2 40kΩ 40kΩ 12 (10) 13 (9) R3 RL 40kΩ R4 40kΩ VOUT = V3 – V2 Ref 14 (8) INA2132 2 (6) V2 FIGURE 1. Basic Power Supply and Signal Connections. R2 R1 12 (10) 13 (9) To ensure valid operation of the differential amplifier, please note the following points: 8Ω V3 1) VOUT = V3 – V2 + VREF 2) VOUT must be within the specified linear range. For example, with ±15V supplies and a 100kΩ load, the output will be defined by: 3 (5) VO R3 R4 +15V VO = V3 – V2 Offset Adjustment Range = ±500µV (V–) + 0.15V < VOUT < (V+) – 0.8V 3) Input common-mode range at the nodes of the op amp must be V– ≤ VCM ≤ (V+) – 1. To ensure that the inputs to the differential amp (+In and –In) meet this criteria, limit the common-mode voltage inputs to: 14 (8) Ref R = 237kΩ 100kΩ 8Ω –15V NOTE: For ±750µV range, R = 158kΩ. 2 • (V–) – VREF < VCM < 2 • ((V+) – 1) – VREF FIGURE 2. Offset Adjustment. ® 7 INA2132 CAPACITIVE LOAD DRIVE CAPABILITY directly adjacent on the top and bottom sides of a circuit board. Stray coupling then produces a common-mode signal which is rejected by the INA2132’s input. The INA2132 can drive large capacitive loads, even at low supplies. It is stable with a 10nF load. Refer to the “SmallSignal Step Response” and “Settling Time vs Load Capacitance” typical performance curves. +5V CHANNEL CROSSTALK 11 The two channels of the INA2132 are completely independent, including all bias circuitry. At dc and low frequency, there is virtually no signal coupling between channels. Crosstalk increases with frequency and is dependent on source impedance and signal characteristics. See the typical performance curve “Channel Separation vs Frequency” for more information. INA2132 12 (10) 2 (6) –In 13 (9) Most crosstalk is produced by capacitive coupling of signals from one channel to the input section of the other channel. To minimize coupling, separate the input traces as far as practical from any signals associated with the opposite channel. A grounded guard trace surrounding the inputs helps reduce stray coupling between channels. Run the differential inputs of each channel parallel to each other or 4 12 Bits Out 0V-4V Input 14 (8) 3 (5) +In ADS7806(1) τS = 45µs (4V Step to 0.01%) NOTE: (1) For 16-bit output, use ADS7809. FIGURE 5. Differential Input Data Acquisition. INA2132 –In 2 (6) BUF634 inside feedback loop contributes no error. 12 (10) Logic In VO 0 –V1 1 +V1 INA2132 2 (6) 13 (9) 12 (10) V1 BUF634 VO DG188 +In 14 (8) 3 (5) (Low IQ mode) RL VO 13 (9) 3 (5) 14 (8) 1 FIGURE 3. Low Power, High Output Current Precision Difference Amplifier. Logic In FIGURE 6. Digitally Controlled Gain of ±1 Amplifier. INA2132 V2 12 (10) 2 (6) INA2132 2 (6) 12 (10) V2 13 (9) R 13 (9) R V3 R 3 (5) 14 (8) IO = (V3 – V2)/R V1 IO = (V1 – V2) (1/40k + 1/R) IO Load Load FIGURE 4. Differential Input Voltage-to-Current Converter for Low IOUT. IO FIGURE 7. Precision Voltage-to-Current Converter with Differential Inputs. ® INA2132 14 (8) 3 (5) 8 INA2132 INA2132 2 12 13 A V1 13 A V01 14 3 12 2 V2 14 3 V3 V01 V2 6 6 10 10 9 B 8 5 9 B V02 8 5 VLS Level-Shift Voltage Reference V01 – V02 = 2 (V2 – V1) V01 = (V3 – V2) + FIGURE 8. Differential Output Difference Amplifier. VLS 2 FIGURE 9. Precision Level Shifter. V1 INA2132 –In The INA2132 can be combined with op amps to form a complete instrumentation amplifier with specialized performance characteristics. Burr-Brown offers many complete high performance IAs. Products with similar performances are shown below. A1 2 (6) 12 (10) R2 13 (9) R1 VO R2 14 (8) 3 (5) V2 +In A2 VO = (1 + 2R2 /R1) (V2 –V1) A1, A2 FEATURES SIMILAR COMPLETE BURR-BR0WN IAs OPA227 OPA129 OPA2277 OPA2130 OPA2234, OPA2241, OPA2244 OPA2237 Low Noise Ultra-Low Bias Current (fA) Low Offset Drift, Low Noise Low Power, FET-Input (pA) Single Supply, Precision, Low Power Single Supply, Low Power, MSOP-8 INA103 INA116 INA114, INA128 INA121 INA122, INA118 INA122, INA126 FIGURE 10. Precision Instrumentation Amplifier. ® 9 INA2132 INA2132 2 (6) INA2132 2 (6) 12 (10) V2 13 (9) 12 (10) 13 (9) V0 V0 3 (5) V1 14 (8) V0 = V1 3 (5) 14 (8) FIGURE 14. Precision Unity-Gain Buffer. V0 = – V2 FIGURE 11. Precision Inverting Unity-Gain Amplifier. INA2132 12 (10) 2 (6) INA2132 2 (6) 13 (9) 12 (10) 3 (5) V0 V1 13 (9) V3 3 (5) 14 (8) V0 = 1/2 V3 V0 = 2 • V1 14 (8) V0 = V3 /2 FIGURE 15. Precision Gain = 2 Amplifier. FIGURE 12. Precision Gain = 1/2 Amplifier. INA2132 INA2132 12 (10) 2 (6) 2 (6) 12 (10) 13 (9) V1 13 (9) V1 V3 3 (5) V0 V3 V0 3 (5) 14 (8) 14 (8) V0 = (V1 + V3)/2 V0 = V1 + V3 FIGURE 13. Precision Average Value Amplifier. FIGURE 16. Precision Summing Amplifier. ® INA2132 10 IMPORTANT NOTICE Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgment, including those pertaining to warranty, patent infringement, and limitation of liability. TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily performed, except those mandated by government requirements. Customers are responsible for their applications using TI components. In order to minimize risks associated with the customer’s applications, adequate design and operating safeguards must be provided by the customer to minimize inherent or procedural hazards. TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other intellectual property right of TI covering or relating to any combination, machine, or process in which such semiconductor products or services might be or are used. TI’s publication of information regarding any third party’s products or services does not constitute TI’s approval, warranty or endorsement thereof. Copyright 2000, Texas Instruments Incorporated