ETC LT1812IS6

LT1812
3mA, 100MHz, 750V/µs
Operational Amplifier
with Shutdown
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FEATURES
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DESCRIPTIO
The LT®1812 is a low power, high speed, very high slew
rate operational amplifier with excellent DC performance.
The LT1812 features reduced supply current, lower input
offset voltage, lower input bias current and higher DC gain
than other devices with comparable bandwidth. A power
saving shutdown feature reduces supply current to 50µA.
The circuit topology is a voltage feedback amplifier with
the slewing characteristics of a current feedback amplifier.
100MHz Gain Bandwidth
750V/µs Slew Rate
3.6mA Maximum Supply Current
Available in SOT-23 and S8 Packages
50µA Supply Current in Shutdown
8nV/√Hz Input Noise Voltage
Unity-Gain Stable
1.5mV Maximum Input Offset Voltage
4µA Maximum Input Bias Current
400nA Maximum Input Offset Current
40mA Minimum Output Current, VOUT = ±3V
±3.5V Minimum Input CMR, VS = ±5V
30ns Settling Time to 0.1%, 5V Step
Specified at ±5V, Single 5V Supplies
Operating Temperature Range: – 40°C to 85°C
The output drives a 100Ω load to ±3.5V with ±5V supplies.
On a single 5V supply, the output swings from 1.1V to 3.9V
with a 100Ω load connected to 2.5V. The amplifier is stable
with a 1000pF capacitive load which makes it useful in
buffer and cable driver applications.
The LT1812 is manufactured on Linear Technology’s
advanced low voltage complementary bipolar process.
The dual version is the LT1813. For higher supply voltage
single, dual and quad operational amplifiers with up to
70MHz gain bandwidth, see the LT1351 through LT1365
data sheets.
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APPLICATIO S
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Wideband Amplifiers
Buffers
Active Filters
Video and RF Amplification
Cable Drivers
Data Acquisition Systems
, LTC and LT are registered trademarks of Linear Technology Corporation.
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TYPICAL APPLICATIO
Filter Frequency Response
10
4MHz, 4th Order Butterworth Filter
0
–10
VOLTAGE GAIN (dB)
232Ω
274Ω
232Ω
665Ω
VIN
–
47pF
274Ω
220pF
+
562Ω
LT1812
470pF
–
+
22pF
LT1812
VOUT
–20
–30
–40
–50
–60
–70
–80
1812 TA01
–90
0.1
VS = ±5V
VIN = 600mVP-P
PEAKING < 0.12dB
1
10
FREQUENCY (MHz)
100
1812 TA02
1
LT1812
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ABSOLUTE
RATI GS
(Note 1)
Total Supply Voltage (V + to V –) ............................. 12.6V
Differential Input Voltage (Transient Only, Note 2) ... ±3V
Input Voltage, Shutdown Voltage ............................. ±VS
Output Short-Circuit Duration (Note 3) ............ Indefinite
Operating Temperature Range (Note 8) ... – 40°C to 85°C
Specified Temperature Range
(Note 8) .............................................. – 40°C to 85°C
Maximum Junction Temperature ......................... 150°C
Storage Temperature Range .................. – 65°C to 150°C
Lead Temperature (Soldering, 10 sec)................... 300°C
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PACKAGE/ORDER I FOR ATIO
ORDER PART
NUMBER
ORDER PART
NUMBER
TOP VIEW
TOP VIEW
5 V+
VOUT 1
V– 2
+IN 3
+
–
LT1812CS5
LT1812IS5
4 –IN
S5 PACKAGE
5-LEAD PLASTIC SOT-23
TJMAX = 150°C, θJA = 250°C/ W
(NOTE 9)
V– 2
+IN 3
S5 PART
MARKING
LTLH
LTLJ
6 V+
VOUT 1
5 SHDN
+
–
LT1812CS6
LT1812IS6
4 –IN
S6 PACKAGE
6-LEAD PLASTIC SOT-23
TOP VIEW
NC 1
8
SHDN
–IN 2
–
7
V+
+IN 3
+
6
VOUT
5
NC
V–
S6 PART
MARKING
TJMAX = 150°C, θJA = 230°C/ W
(NOTE 9)
LTLK
LTLL
ORDER PART
NUMBER
4
LT1812CS8
LT1812IS8
S8 PART
MARKING
S8 PACKAGE
8-LEAD PLASTIC SO
TJMAX = 150°C, θJA = 150°C/ W
(NOTE 9)
1812
1812I
Consult factory for Military grade parts.
ELECTRICAL CHARACTERISTICS
TA = 25°C, VS = ±5V, VCM = 0V unless otherwise noted (Note 10).
SYMBOL
PARAMETER
CONDITIONS
VOS
Input Offset Voltage
(Note 4)
IOS
Input Offset Current
IB
Input Bias Current
en
Input Noise Voltage Density
f = 10kHz
in
Input Noise Current Density
f = 10kHz
RIN
Input Resistance
VCM = ±3.5V
Differential
CIN
Input Capacitance
VCM
Input Voltage Range (Positive)
Input Voltage Range (Negative)
CMRR
Common Mode Rejection Ratio
MIN
3
3.5
VCM = ±3.5V
75
TYP
MAX
UNITS
0.4
1.5
mV
30
400
nA
– 0.9
±4
µA
8
nV/√Hz
1
pA/√Hz
10
1.5
MΩ
MΩ
2
pF
4.2
– 4.2
85
±1.25
Minimum Supply Voltage
– 3.5
V
V
dB
±2
V
PSRR
Power Supply Rejection Ratio
VS = ±2V to ±5.5V
78
97
dB
AVOL
Large-Signal Voltage Gain
VOUT = ±3V, RL = 500Ω
VOUT = ±3V, RL = 100Ω
1.5
1.0
3.0
2.5
V/mV
V/mV
VOUT
Maximum Output Swing
RL = 500Ω, 30mV Overdrive
RL = 100Ω, 30mV Overdrive
±3.80
±3.35
±4.0
±3.5
V
V
IOUT
Maximum Output Current
VOUT = ±3V, 30mV Overdrive
±40
±60
mA
ISC
Output Short-Circuit Current
VOUT = 0V, 1V Overdrive (Note 3)
±75
±110
mA
SR
Slew Rate
AV = – 1 (Note 5)
500
750
V/µs
2
LT1812
ELECTRICAL CHARACTERISTICS
SYMBOL
TA = 25°C, VS = ±5V, VCM = 0V unless otherwise noted (Note 10).
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
FPBW
Full Power Bandwidth
3V Peak (Note 6)
GBW
Gain Bandwidth Product
f = 200kHz
40
MHz
75
100
MHz
tr, tf
Rise Time, Fall Time
AV = 1, 10% to 90%, 0.1V, RL = 100Ω
2
ns
OS
Overshoot
AV = 1, 0.1V, RL = 100Ω
25
%
tPD
Propagation Delay
AV = 1, 50% VIN to 50% VOUT, 0.1V, RL = 100Ω
2.8
ns
ts
Settling Time
5V Step, 0.1%, AV = – 1
30
ns
THD
Total Harmonic Distortion
f = 1MHz, VOUT = 2VP-P, AV = 2, RL = 500Ω
–76
dB
Differential Gain
VOUT = 2VP-P, AV = 2, RL = 150Ω
0.12
%
Differential Phase
VOUT = 2VP-P, AV = 2, RL = 150Ω
0.07
DEG
Ω
ROUT
Output Resistance
AV = 1, f = 1MHz
0.4
ISHDN
SHDN Pin Current
SHDN > V – + 2.0V (On) (Note 11)
SHDN < V – + 0.4V (Off) (Note 11)
0
– 50
±1
µA
µA
IS
Supply Current
SHDN > V – + 2.0V (On) (Note 11)
SHDN < V – + 0.4V (Off) (Note 11)
3
50
3.6
100
mA
µA
TYP
0.5
30
– 1.0
8
1
10
1.5
2
4
1
82
2.0
1.5
4.1
3.9
0.9
1.1
±40
±80
350
55
94
2.1
25
3
30
–75
0.22
0.21
MAX
2.0
400
±4
UNITS
mV
nA
µA
nV/√Hz
pA/√Hz
MΩ
MΩ
pF
V
V
dB
V/mV
V/mV
V
V
V
V
mA
mA
V/µs
MHz
MHz
ns
%
ns
ns
dB
%
DEG
–100
TA = 25°C, VS = 5V, VCM = 2.5V, RL to 2.5V unless otherwise noted (Note 10).
SYMBOL
VOS
IOS
IB
en
in
RIN
PARAMETER
Input Offset Voltage
Input Offset Current
Input Bias Current
Input Noise Voltage Density
Input Noise Current Density
Input Resistance
CIN
VCM
CMRR
AVOL
Input Capacitance
Input Voltage Range (Positive)
Input Voltage Range (Negative)
Common Mode Rejection Ratio
Large-Signal Voltage Gain
VOUT
Maximum Output Swing (Positive)
Maximum Output Swing (Negative)
IOUT
ISC
SR
FPBW
GBW
tr, tf
OS
tPD
ts
THD
Maximum Output Current
Output Short-Circuit Current
Slew Rate
Full Power Bandwidth
Gain Bandwidth Product
Rise Time, Fall Time
Overshoot
Propagation Delay
Settling Time
Total Harmonic Distortion
Differential Gain
Differential Phase
CONDITIONS
(Note 4)
f = 10kHz
f = 10kHz
VCM = 1.5V to 3.5V
Differential
MIN
3
3.5
VCM = 1.5V to 3.5V
VOUT = 1.5V to 3.5V, RL = 500Ω
VOUT = 1.5V to 3.5V, RL = 100Ω
RL = 500Ω, 30mV Overdrive
RL = 100Ω, 30mV Overdrive
RL = 500Ω, 30mV Overdrive
RL = 100Ω, 30mV Overdrive
VOUT = 3.5V or 1.5V, 30mV Overdrive
VOUT = 2.5V, 1V Overdrive (Note 3)
AV = – 1 (Note 5)
1V Peak (Note 6)
f = 200kHz
AV = 1, 10% to 90%, 0.1V, RL = 100Ω
AV = 1, 0.1V, RL = 100Ω
AV = 1, 50% VIN to 50% VOUT, 0.1V, RL = 100Ω
2V Step, 0.1%, AV = – 1
f = 1MHz, VOUT = 2VP-P, AV = 2, RL = 500Ω
VOUT = 2VP-P, AV = 2, RL = 150Ω
VOUT = 2VP-P, AV = 2, RL = 150Ω
73
1.0
0.7
3.9
3.7
±25
±55
200
65
1.5
1.1
1.3
3
LT1812
ELECTRICAL CHARACTERISTICS
SYMBOL
ROUT
ISHDN
IS
PARAMETER
Output Resistance
SHDN Pin Current
Supply Current
TA = 25°C, VS = 5V, VCM = 2.5V, RL to 2.5V unless otherwise noted (Note 10).
CONDITIONS
AV = 1, f = 1MHz
SHDN > V – + 2.0V (On) (Note 11)
SHDN < V – + 0.4V (Off) (Note 11)
SHDN > V – + 2.0V (On) (Note 11)
SHDN < V – + 0.4V (Off) (Note 11)
MIN
– 50
TYP
0.45
0
– 20
2.7
20
MAX
TYP
MAX
2
15
500
±5
±1
3.6
50
UNITS
Ω
µA
µA
mA
µA
0°C ≤ TA ≤ 70°C, VS = ±5V, VCM = 0V unless otherwise noted (Note 10).
SYMBOL
VOS
∆VOS/∆T
IOS
IB
VCM
PSRR
AVOL
PARAMETER
Input Offset Voltage
Input Offset Voltage Drift
Input Offset Current
Input Bias Current
Input Voltage Range (Positive)
Input Voltage Range (Negative)
Common Mode Rejection Ratio
Minimum Supply Voltage
Power Supply Rejection Ratio
Large-Signal Voltage Gain
VOUT
Maximum Output Swing
IOUT
ISC
SR
GBW
ISHDN
Maximum Output Current
Output Short-Circuit Current
Slew Rate
Gain Bandwidth Product
SHDN Pin Current
CMRR
IS
4
Supply Current
CONDITIONS
(Note 4)
(Note 7)
MIN
10
3.5
– 3.5
VCM = ±3.5V
73
±2
VS = ±2V to ±5.5V
VOUT = ±3V, RL = 500Ω
VOUT = ±3V, RL = 100Ω
RL = 500Ω, 30mV Overdrive
RL = 100Ω, 30mV Overdrive
VOUT = ±3V, 30mV Overdrive
VOUT = 0V, 1V Overdrive (Note 3)
AV = – 1 (Note 5)
f = 200kHz
SHDN > V – + 2.0V (On) (Note 11)
SHDN < V – + 0.4V (Off) (Note 11)
SHDN > V – + 2.0V (On) (Note 11)
SHDN < V – + 0.4V (Off) (Note 11)
76
1.0
0.7
±3.70
±3.25
±35
±60
400
65
±1.5
–150
4.6
150
UNITS
mV
µV/°C
nA
µA
V
V
dB
V
dB
V/mV
V/mV
V
V
mA
mA
V/µs
MHz
µA
µA
mA
µA
LT1812
ELECTRICAL CHARACTERISTICS
0°C ≤ TA ≤ 70°C, VS = 5V, VCM = 2.5V, RL to 2.5V unless otherwise noted (Note 10).
SYMBOL
VOS
∆VOS/∆T
IOS
IB
VCM
CMRR
AVOL
PARAMETER
Input Offset Voltage
Input Offset Voltage Drift
Input Offset Current
Input Bias Current
Input Voltage Range (Positive)
Input Voltage Range (Negative)
Common Mode Rejection Ratio
Large-Signal Voltage Gain
VOUT
Maximum Output Swing (Positive)
Maximum Output Swing (Negative)
IOUT
ISC
SR
GBW
ISHDN
IS
Maximum Output Current
Output Short-Circuit Current
Slew Rate
Gain Bandwidth Product
SHDN Pin Current
Supply Current
CONDITIONS
(Note 4)
(Note 7)
MIN
TYP
10
MAX
2.5
15
500
±5
3.5
1.5
VCM = 1.5V to 3.5V
VOUT = 1.5V to 3.5V, RL = 500Ω
VOUT = 1.5V to 3.5V, RL = 100Ω
RL = 500Ω, 30mV Overdrive
RL = 100Ω, 30mV Overdrive
RL = 500Ω, 30mV Overdrive
RL = 100Ω, 30mV Overdrive
VOUT = 3.5V or 1.5V, 30mV Overdrive
VOUT = 2.5V, 1V Overdrive (Note 3)
AV = – 1 (Note 5)
f = 200kHz
SHDN > V – + 2.0V (On) (Note 11)
SHDN < V – + 0.4V (Off) (Note 11)
SHDN > V – + 2.0V (On) (Note 11)
SHDN < V – + 0.4V (Off) (Note 11)
71
0.7
0.5
3.8
3.6
1.2
1.4
±20
±45
150
55
±1.5
– 75
4.5
75
UNITS
mV
µV/°C
nA
µA
V
V
dB
V/mV
V/mV
V
V
V
V
mA
mA
V/µs
MHz
µA
µA
mA
µA
– 40°C ≤ TA ≤ 85°C. VS = ±5V, VCM = 0V unless otherwise noted (Notes 8, 10).
SYMBOL
VOS
∆VOS/∆T
IOS
IB
VCM
PSRR
AVOL
PARAMETER
Input Offset Voltage
Input Offset Voltage Drift
Input Offset Current
Input Bias Current
Input Voltage Range (Positive)
Input Voltage Range (Negative)
Common Mode Rejection Ratio
Minimum Supply Voltage
Power Supply Rejection Ratio
Large-Signal Voltage Gain
VOUT
Maximum Output Swing
IOUT
ISC
SR
GBW
ISHDN
Maximum Output Current
Output Short-Circuit Current
Slew Rate
Gain Bandwidth Product
SHDN Pin Current
CMRR
IS
Supply Current
CONDITIONS
(Note 4)
(Note 7)
MIN
TYP
10
MAX
3
30
600
±6
3.5
– 3.5
VCM = ±3.5V
72
±2
VS = ±2V to ±5.5V
VOUT = ±3V, RL = 500Ω
VOUT = ±3V, RL = 100Ω
RL = 500Ω, 30mV Overdrive
RL = 100Ω, 30mV Overdrive
VOUT = ±3V, 30mV Overdrive
VOUT = 0V, 1V Overdrive (Note 3)
AV = – 1 (Note 5)
f = 200kHz
SHDN > V – + 2.0V (On) (Note 11)
SHDN < V – + 0.4V (Off) (Note 11)
SHDN > V – + 2.0V (On) (Note 11)
SHDN < V – + 0.4V (Off) (Note 11)
75
0.8
0.6
±3.60
±3.15
±30
±55
350
60
±2
– 200
5
200
UNITS
mV
µV/°C
nA
µA
V
V
dB
V
dB
V/mV
V/mV
V
V
mA
mA
V/µs
MHz
µA
µA
mA
µA
5
LT1812
ELECTRICAL CHARACTERISTICS
– 40°C ≤ TA ≤ 85°C, VS = 5V, VCM = 2.5V, RL to 2.5V unless otherwise noted (Notes 8, 10).
SYMBOL
VOS
∆VOS/∆T
IOS
IB
VCM
CMRR
AVOL
PARAMETER
Input Offset Voltage
Input Offset Voltage Drift
Input Offset Current
Input Bias Current
Input Voltage Range (Positive)
Input Voltage Range (Negative)
Common Mode Rejection Ratio
Large-Signal Voltage Gain
VOUT
Maximum Output Swing (Positive)
Maximum Output Swing (Negative)
IOUT
ISC
SR
GBW
ISHDN
IS
Maximum Output Current
Output Short-Circuit Current
Slew Rate
Gain Bandwidth Product
SHDN Pin Current
Supply Current
CONDITIONS
(Note 4)
(Note 7)
TYP
10
MAX
3.5
30
600
±6
3.5
1.5
VCM = 1.5V to 3.5V
VOUT = 1.5V to 3.5V, RL = 500Ω
VOUT = 2.0V to 3.0V, RL = 100Ω
RL = 500Ω, 30mV Overdrive
RL = 100Ω, 30mV Overdrive
RL = 500Ω, 30mV Overdrive
RL = 100Ω, 30mV Overdrive
VOUT = 3.5V or 1.5V, 30mV Overdrive
VOUT = 2.5V, 1V Overdrive (Note 3)
AV = – 1 (Note 5)
f = 200kHz
SHDN > V – + 2.0V (On) (Note 11)
SHDN < V – + 0.4V (Off) (Note 11)
SHDN > V – + 2.0V (On) (Note 11)
SHDN < V – + 0.4V (Off) (Note 11)
Note 1: Absolute Maximum Ratings are those values beyond which the life of
the device may be impaired.
Note 2: Differential inputs of ±3V are appropriate for transient operation only,
such as during slewing. Large sustained differential inputs can cause
excessive power dissipation and may damage the part.
Note 3: A heat sink may be required to keep the junction temperature below
absolute maximum when the output is shorted indefinitely.
Note 4: Input offset voltage is pulse tested and is exclusive of warm-up drift.
Note 5: Slew rate is measured between ±2V on the output with ±3V input for
±5V supplies and 2VP-P on the output with a 3VP-P input for single 5V
supplies.
Note 6: Full power bandwidth is calculated from the slew rate:
FPBW = SR/2πVP.
Note 7: This parameter is not 100% tested.
6
MIN
70
0.6
0.4
3.7
3.5
1.3
1.5
±17
±40
125
50
±2
– 100
5
100
UNITS
mV
µV/°C
nA
µA
V
V
dB
V/mV
V/mV
V
V
V
V
mA
mA
V/µs
MHz
µA
µA
mA
µA
Note 8: The LT1812C is guaranteed to meet specified performance from
0°C to 70°C. The LT1812C is designed, characterized and expected to meet
specified performance from –40°C to 85°C but is not tested or QA sampled
at these temperatures. The LT1812I is guaranteed to meet specified
performance from –40°C to 85°C.
Note 9: Thermal resistance varies with the amount of PC board metal
connected to the package. The nominal values are for short traces
connected to the pins. The thermal resistance can be substantially reduced
by connecting Pin 2 of the 5-lead or 6-lead SOT-23 or Pin 4 of the SO-8 to a
large metal area.
Note 10: For the 8-lead SO and 6-lead SOT-23 parts, the electrical
characteristics apply to the “ON” state, unless otherwise noted. These parts
are in the “ON” state when either SHDN is not connected,
or SHDN > V – +␣ 2.0V.
Note 11: The shutdown (SHDN) feature is not available on the 5-lead
SOT-23 parts. These parts are always in the “ON” state.
LT1812
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TYPICAL PERFOR A CE CHARACTERISTICS
Input Common Mode Range
vs Supply Voltage
Supply Current vs Temperature
Input Bias Current vs
Common Mode Voltage
V+
5
0
SUPPLY CURRENT (mA)
4
VS = ±5V
3
VS = ±2.5V
2
1
–1.0
INPUT BIAS CURRENT (µA)
INPUT COMMON MODE RANGE (V)
– 0.5
–1.5
– 2.0
TA = 25°C
∆VOS < 1mV
2.0
1.5
1.0
TA = 25°C
VS = ± 5V
– 0.5
–1.0
–1.5
0.5
V–
50
25
0
75
TEMPERATURE (°C)
100
125
0
1
4
3
2
5
SUPPLY VOLTAGE (± V)
Input Bias Current
vs Temperature
INPUT VOLTAGE NOISE (nV/√Hz)
–0.6
VS = ±5V
–1.0
VS = ±2.5V
–1.2
–1.4
–50 –25
in
10
1
en
1
50
25
75
0
TEMPERATURE (°C)
100
10
125
100
1k
10k
FREQUENCY (Hz)
V+
VS = ± 5V
VO = ± 3V
TA = 25°C
VIN = 30mV
– 0.5
OUTPUT VOLTAGE SWING (V)
OPEN-LOOP GAIN (dB)
67.5
RL = 500Ω
RL = 100Ω
65.0
62.5
100
VS = ± 5V
67.5
VS = ± 2.5V
65.0
60
100
125
1812 G07
1k
LOAD RESISTANCE (Ω)
Output Voltage Swing
vs Load Current
V+
– 0.5
RL = 500Ω
RL = 100Ω
– 2.0
2.0
RL = 100Ω
1.5
1.0
RL = 500Ω
0
1
4
3
2
5
SUPPLY VOLTAGE (± V)
10k
1812 G06
–1.0
–1.5
VS = ± 5V
VIN = 30mV
85°C
25°C
– 40°C
– 2.0
2.0
1.5
1.0
0.5
V–
50
25
75
0
TEMPERATURE (°C)
70.0
62.5
0.1
100k
–1.0
–1.5
0.5
60.0
–50 –25
72.5
Output Voltage Swing
vs Supply Voltage
Open-Loop Gain vs Temperature
72.5
TA = 25°C
1812 G05
1812 G04
70.0
75.0
OUTPUT VOLTAGE SWING (V)
INPUT BIAS CURRENT (µA)
10
TA = 25°C
VS = ± 5V
AV = 101
RS = 10k
INPUT CURRENT NOISE (pA/√Hz)
–0.4
75.0
Open-Loop Gain
vs Resistive Load
100
0
5.0
1812 G03
Input Noise Spectral Density
–0.2
0
2.5
– 2.5
INPUT COMMON MODE VOLTAGE (V)
1812 G02
1812 G01
–0.8
– 2.0
– 5.0
7
6
OPEN-LOOP GAIN (dB)
0
–50 –25
6
7
1812 G08
V–
–60
–40
0
20
40
–20
OUTPUT CURRENT (mA)
60
1812 G09
7
LT1812
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TYPICAL PERFOR A CE CHARACTERISTICS
Open-Loop Gain and Phase vs
Frequency
70
VS = ± 5V
SOURCE
TA = 25°C
AV = –1
RF = RG = 500Ω
60
115
Gain vs Frequency
2
80
GAIN (dB)
SINK
105
100
40
60
±2.5V
30
±2.5V
±5V
40
±5V
20
20
10
0
VS = ±2.5V
0
PHASE
GAIN
TA = 25°C
AV = 1
NO RL
4
100
50
110
6
120
PHASE (DEG)
OUTPUT SHORT-CIRCUIT CURRENT (mA)
120
GAIN (dB)
Output Short-Circuit Current
vs Temperature
VS = ±5V
–2
–4
–6
–8
95
0
90
–50 –25
50
25
75
0
TEMPERATURE (°C)
100
–10
10k
125
–10
–20
100k
1M
10M
FREQUENCY (Hz)
–12
–14
1M
–40
1000M
100M
10M
100M
FREQUENCY (Hz)
1812 G16
1812 G13
1812 G10
Gain Bandwidth and Phase
Margin vs Supply Voltage
Settling Time vs Output Step
5
110
Gain vs Frequency
8
TA = 25°C
4
GBW
RL = 500Ω
TA = 25°C
AV = 2
RL = 100Ω
6
0
–1
TA = 25°C
VS = ± 5V
AV = –1
RF = 500Ω
CF = 3pF
0.1% SETTLING
–3
–4
–5
0
5
70
45
PHASE MARGIN
RL = 100Ω
40
35
30
0
5
4
3
SUPPLY VOLTAGE (±V)
1
6
2
1812 G11
115
GAIN BANDWIDTH (MHz)
AV = 1
0.01
TA = 25°C
VS = ± 5V
100k
1M
10M
FREQUENCY (Hz)
100M
1812 G12
8
10M
100M
FREQUENCY (Hz)
500M
1812 G17
Gain vs Frequency
12
TA = 25°C
AV = –1
V = ±5V
8 S
RF = RG = 500Ω
NO RL
RL = 500Ω
GBW
VS = ± 5V
105
0.1
0.001
10k
–6
1M
35
7
GBW
VS = ±2.5V
95
85
40
PHASE MARGIN
VS = ±5V
50
25
0
75
TEMPERATURE (°C)
100
CL= 500pF
CL= 200pF
36
125
–8
CL= 100pF
CL= 50pF
CL= 0
0
–4
1812 G15
CL= 1000pF
4
38
PHASE MARGIN
VS = ±2.5V
–50 –25
PHASE MARGIN (DEG)
OUTPUT IMPEDANCE (Ω)
AV = 100
AV = 10
VS = ±5V
–2
Gain Bandwidth and Phase
Margin vs Temperature
100
1
VS = ±2.5V
0
1812 G19
Output Impedance vs Frequency
10
2
–4
PHASE MARGIN
RL = 500Ω
20
15
10
25
SETTLING TIME (ns)
4
GAIN (dB)
–2
GBW
RL = 100Ω
GAIN (dB)
GAIN BANDWIDTH (MHz)
1
90
PHASE MARGIN (DEG)
OUTPUT STEP (V)
3
2
500M
1
10M
FREQUENCY (Hz)
100M 200M
1812 G18
LT1812
U W
TYPICAL PERFOR A CE CHARACTERISTICS
100
VS = ±5V
50
40
30
VS = ±2.5V
20
10
0
–50 –25
80
–PSRR
60
+PSRR
40
20
100
40
20
0
1k
125
1M
100k
FREQUENCY (Hz)
10k
10M
Slew Rate vs Supply Voltage
SLEW RATE (V/µs)
SR –
SR +
700
600
500
100k
1M
FREQUENCY (Hz)
10M
Slew Rate vs Input Level
TA =25°C
AV = –1
V = ±5V
1000 RS = R = R = 500Ω
F
G
L
SR –
400
SR +
300
400
100M
1200
TA =25°C
AV = –1
VIN = ±1V
500 RF = RG = RL = 500Ω
800
10k
1812 G21
Slew Rate vs Supply Voltage
600
1200
TA =25°C
1100 AV = –1
/2
V =V
1000 RIN= R S(TOTAL)
F
G = RL = 500Ω
900
1k
100M
1812 G20
1812 G14
SLEW RATE (V/µs)
60
0
50
25
75
0
TEMPERATURE (°C)
TA = 25°C
VS = ±5V
80
SLEW RATE (V/µs)
60
100
TA = 25°C
AV = 1
VS = ±5V
COMMON MODE REJECTION RATIO (dB)
VSHDN = V – + 0.4V
POWER SUPPLY REJECTION RATIO (dB)
SHUTDOWN SUPPLY CURRENT (µA)
70
Common Mode Rejection Ratio
vs Frequency
Power Supply Rejection Ratio
vs Frequency
Shutdown Supply Current
vs Temperature
800
SR –
SR +
600
400
300
200
200
1
4
3
2
5
SUPPLY VOLTAGE (±V)
7
6
200
0
1
4
3
2
5
SUPPLY VOLTAGE (±V)
SLEW RATE (V/µs)
TOTAL HARMONIC DISTORTION + NOISE (%)
1200
SR+
VS = ±5V
800
600
SR –
VS = ±2.5V
400
200
0
–50 –25
SR+
VS = ±2.5V
50
25
75
0
TEMPERATURE (°C)
0
100
125
1812 G25
1
2
4
3
5
6
INPUT LEVEL (VP-P)
9
AV = – 1
8
AV = –1
0.005
AV = 1
0.002
TA = 25°C
VS = ± 5V
VO = 2VP-P
RL = 500Ω
10
8
Undistorted Output Swing
vs Frequency
0.01
0.001
7
1812 G24
Total Harmonic Distortion + Noise
vs Frequency
Slew Rate vs Temperature
1000
7
1812 G23
1812 G22
SR–
VS = ±5V
6
OUTPUT VOLTAGE (VP-P)
0
100
6
5
4
3
2
1
1k
10k
FREQUENCY (Hz)
100k
1812 G26
AV = 1
7
TA = 25°C
VS = ± 5V
RL = 100Ω
2% MAX DISTORTION
0
100k
1M
10M
FREQUENCY (Hz)
100M
1812 G27
9
LT1812
U W
TYPICAL PERFOR A CE CHARACTERISTICS
Differential Gain and Phase
vs Supply Voltage
–50
DIFFERENTIAL GAIN
RL = 150Ω
2ND HARMONIC
3RD HARMONIC
RL = 100Ω
–60
–70
–80
3RD HARMONIC
–90
2ND HARMONIC
RL = 500Ω
–100
100k
0.20
90
0.15
80
0.05
0.25
0
DIFFERENTIAL PHASE
RL = 150Ω
0.20
0.15
DIFFERENTIAL PHASE
RL = 1k
0.10
10M
4
10
8
6
TOTAL SUPPLY VOLTAGE (V)
50
AV = –1
40
30
0
12
10
100
1000
CAPACITIVE LOAD (pF)
10000
1812 G30
Small-Signal Transient,
AV = 1, CL = 1000pF
1812 G32
Large-Signal Transient,
AV = 1
1812 G34
60
1812 G29
1812 G31
Large-Signal Transient,
AV = –1
AV = 1
70
10
TA = 25°C
Small-Signal Transient,
AV = 1
Small-Signal Transient,
AV = –1
TA = 25°C
VS = ±5V
20
0.05
0
1M
FREQUENCY (Hz)
100
0.10
DIFFERENTIAL GAIN
RL = 1k
1812 G28
10
Capacitive Load Handling
0.25
DIFFERENTIAL GAIN (%)
HARMONIC DISTORTION (dB)
–40
TA = 25°C
AV = 2
VS = ± 5V
VO = 2VP-P
DIFFERENTIAL PHASE (DEG)
–30
OVERSHOOT (%)
2nd and 3rd Harmonic Distortion
vs Frequency
1812 G33
Large-Signal Transient,
AV = 1, CL = 1000pF
1812 G35
1812 G36
LT1812
U
W
U U
APPLICATIO S I FOR ATIO
Layout and Passive Components
The LT1812 amplifier is more tolerant of less than ideal
layouts than other high speed amplifiers. For maximum
performance (for example, fast settling) use a ground
plane, short lead lengths and RF-quality bypass capacitors
(0.01µF to 0.1µF). For high drive current applications, use
low ESR bypass capacitors (1µF to 10µF tantalum).
The parallel combination of the feedback resistor and gain
setting resistor on the inverting input combine with the
input capacitance to form a pole that can cause peaking or
even oscillations. If feedback resistors greater than 2k are
used, a parallel capacitor of value
CF > RG • CIN/RF
should be used to cancel the input pole and optimize
dynamic performance. For applications where the DC
noise gain is 1 and a large feedback resistor is used, CF
should be greater than or equal to CIN. An example would
be an I-to-V converter.
capacitive load increases, both the bandwidth and phase
margin decrease so there will be peaking in the frequency
domain and in the transient response. Coaxial cable can be
driven directly, but for best pulse fidelity, a resistor of
value equal to the characteristic impedance of the cable
(i.e., 75Ω) should be placed in series with the output. The
other end of the cable should be terminated with the same
value resistor to ground.
Slew Rate
The slew rate is proportional to the differential input
voltage. Highest slew rates are therefore seen in the
lowest gain configurations. For example, a 5V output step
in a gain of 10 has a 0.5V input step, whereas in unity gain
there is a 5V input step. The LT1812 is tested for slew rate
in a gain of – 1. Lower slew rates occur in higher gain
configurations.
Shutdown
The device should not be used as a comparator because
with sustained differential inputs, excessive power dissipation may result.
The LT1812 has a shutdown pin (SHDN, Pin 8) for
conserving power. When this pin is open or biased at
least 2V above the negative supply, the part operates
normally. When pulled down to V –, the supply current
drops to about 50µA. Typically, the turn-off delay is 1µs
and the turn-on delay 0.5µs. The current out of the SHDN
pin is also typically 50µA. In shutdown mode, the amplifier output is not isolated from the inputs, so the LT1812
shutdown feature cannot be used for multiplexing applications. The 50µA typical shutdown current is exclusive
of any output (load) current. In order to prevent load
current (and maximize the power savings), either the
load needs to be disconnected, or the input signal needs
to be 0V. Even in shutdown mode, the LT1812 can still
drive significant current into a load. For example, in an
AV = 1 configuration, when driven with a 1V DC input, the
LT1812 drives 2mA into a 100Ω load. It takes about
500µs for the load current to reach this value.
Capacitive Loading
Power Dissipation
The LT1812 is stable with a 1000pF capacitive load, which
is outstanding for a 100MHz amplifier. This is accomplished by sensing the load induced output pole and
adding compensation at the amplifier gain node. As the
The LT1812 combines high speed and large output drive
in a small package. It is possible to exceed the maximum
junction temperature under certain conditions. Maximum
Input Considerations
Each of the LT1812 amplifier inputs is the base of an NPN
and PNP transistor whose base currents are of opposite
polarity and provide first-order bias current cancellation.
Because of variation in the matching of NPN and PNP beta,
the polarity of the input bias current can be positive or
negative. The offset current does not depend on beta
matching and is well controlled. The use of balanced
source resistance at each input is recommended for
applications where DC accuracy must be maximized. The
inputs can withstand differential input voltages of up to 3V
without damage and need no clamping or source resistance for protection.
11
LT1812
U
W
U U
APPLICATIO S I FOR ATIO
junction temperature (TJ) is calculated from the ambient
temperature (TA) and power dissipation (PD) as follows:
TJ = TA + (PD • θJA) (Note 9)
Power dissipation is composed of two parts. The first is
due to the quiescent supply current and the second is due
to on-chip dissipation caused by the load current. The
worst-case load induced power occurs when the output
voltage is at 1/2 of either supply voltage (or the maximum
swing if less than 1/2 supply voltage). Therefore PDMAX is:
PDMAX = (V + – V – )(ISMAX) + (V +/2)2/RL or
PDMAX = (V + – V – )(ISMAX) + (V + – VOMAX)(VOMAX/RL)
Example: LT1812CS5 at 70°C, VS = ±5V, RL = 100Ω
PDMAX = (10V)(4.5mA) + (2.5V)2/100Ω = 108mW
TJMAX = 70°C + (108mW)(250°C/W) = 97°C
Circuit Operation
The LT1812 circuit topology is a true voltage feedback
amplifier that has the slewing behavior of a current feedback amplifier. The operation of the circuit can be understood by referring to the Simplified Schematic. The inputs
are buffered by complementary NPN and PNP emitter
followers that drive a 300Ω resistor. The input voltage
appears across the resistor generating currents that are
mirrored into the high impedance node. Complementary
followers form an output stage that buffers the gain node
from the load. The bandwidth is set by the input resistor
and the capacitance on the high impedance node. The slew
rate is determined by the current available to charge the
gain node capacitance. This current is the differential input
voltage divided by R1, so the slew rate is proportional to
the input. Highest slew rates are therefore seen in the
lowest gain configurations. The RC network across the
output stage is bootstrapped when the amplifier is driving
a light or moderate load and has no effect under normal
operation. When driving capacitive loads (or a low value
resistive load) the network is incompletely bootstrapped
and adds to the compensation at the high impedance
node. The added capacitance slows down the amplifier
which improves the phase margin by moving the unitygain cross away from the pole formed by the output
impedance and the capacitive load. The zero created by the
RC combination adds phase to ensure that the total phase
lag does not exceed 180 degrees (zero phase margin) and
the amplifier remains stable. In this way, the LT1812 is
stable with up to 1000pF capacitive loads in unity gain, and
even higher capacitive loads in higher closed-loop gain
configurations.
W
W
SI PLIFIED SCHEMATIC
V+
RB
R1
300Ω
+IN
RC
CC
OUT
–IN
C
BIAS
CONTROL
SHDN
V–
1812 SS
12
LT1812
U
PACKAGE DESCRIPTION
Dimensions in inches (millimeters) unless otherwise noted.
S5 Package
5-Lead Plastic SOT-23
(LTC DWG # 05-08-1633)
2.80 – 3.00
(0.110 – 0.118)
(NOTE 3)
2.60 – 3.00
(0.102 – 0.118)
1.50 – 1.75
(0.059 – 0.069)
0.35 – 0.55
(0.014 – 0.022)
1.90
(0.074)
REF
0.00 – 0.15
(0.00 – 0.006)
0.09 – 0.20
(0.004 – 0.008)
(NOTE 2)
0.95
(0.037)
REF
0.90 – 1.45
(0.035 – 0.057)
0.35 – 0.50
0.90 – 1.30
(0.014 – 0.020)
(0.035 – 0.051)
FIVE PLACES (NOTE 2)
S5 SOT-23 0599
NOTE:
1. DIMENSIONS ARE IN MILLIMETERS
2. DIMENSIONS ARE INCLUSIVE OF PLATING
3. DIMENSIONS ARE EXCLUSIVE OF MOLD FLASH AND METAL BURR
4. MOLD FLASH SHALL NOT EXCEED 0.254mm
5. PACKAGE EIAJ REFERENCE IS SC-74A (EIAJ)
13
LT1812
U
PACKAGE DESCRIPTION
Dimensions in inches (millimeters) unless otherwise noted.
S6 Package
6-Lead Plastic SOT-23
(LTC DWG # 05-08-1634)
2.80 – 3.00
(0.110 – 0.118)
(NOTE 3)
1.90
(0.074)
REF
2.6 – 3.0
(0.110 – 0.118)
1.50 – 1.75
(0.059 – 0.069)
0.35 – 0.55
(0.014 – 0.022)
0.00 – 0.15
(0.00 – 0.006)
0.09 – 0.20
(0.004 – 0.008)
(NOTE 2)
0.90 – 1.45
(0.035 – 0.057)
0.35 – 0.50
0.90 – 1.30
(0.014 – 0.020)
(0.035 – 0.051)
SIX PLACES (NOTE 2)
S6 SOT-23 0898
NOTE:
1. DIMENSIONS ARE IN MILLIMETERS
2. DIMENSIONS ARE INCLUSIVE OF PLATING
3. DIMENSIONS ARE EXCLUSIVE OF MOLD FLASH AND METAL BURR
4. MOLD FLASH SHALL NOT EXCEED 0.254mm
5. PACKAGE EIAJ REFERENCE IS SC-74A (EIAJ)
14
0.95
(0.037)
REF
LT1812
U
PACKAGE DESCRIPTION
Dimensions in inches (millimeters) unless otherwise noted.
S8 Package
8-Lead Plastic Small Outline (Narrow 0.150)
(LTC DWG # 05-08-1610)
0.189 – 0.197*
(4.801 – 5.004)
8
7
6
5
0.150 – 0.157**
(3.810 – 3.988)
0.228 – 0.244
(5.791 – 6.197)
SO8 1298
1
0.010 – 0.020
× 45°
(0.254 – 0.508)
0.008 – 0.010
(0.203 – 0.254)
0.053 – 0.069
(1.346 – 1.752)
0°– 8° TYP
0.016 – 0.050
(0.406 – 1.270)
0.014 – 0.019
(0.355 – 0.483)
TYP
*DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
**DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD
FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
2
3
4
0.004 – 0.010
(0.101 – 0.254)
0.050
(1.270)
BSC
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
15
LT1812
U
TYPICAL APPLICATIO
Single 5V Supply 10MS/s 12-Bit ADC Buffer
VIN
2VP-P
2.5VDC
+
12 BITS
68Ω
LT1812
–
LTC1420
10MS/s
470pF
1812 TA03
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENTS
LT1360/LT1361/LT1362
Single/Dual/Quad 50MHz, 800V/µs, C-LoadTM Amplifiers
4mA Supply Current, 1mV Max VOS, 1µA Max IB
LT1363/LT1364/LT1365
Single/Dual/Quad 70MHz, 1000V/µs C-Load Amplifiers
50mA Output Current, 1.5mV Max VOS, 2µA Max IB
LT1395/LT1396/LT1397
Single/Dual/Quad 400MHz Current Feedback Amplifiers
4.6mA Supply Current, 800V/µs, 80mA Output Current
LT1806
325MHz, 140V/µs Rail-to-Rail I/O Op Amp
Low Noise 3.5nV/√Hz
LT1809
180MHz, 350V/µs Rail-to-Rail I/O Op Amp
Low Distortion –90dBc at 5MHz
LT1813
Dual 3mA, 100MHz, 750V/µs Operational Amplifier
Dual Version of the LT1812
C-Load is a trademark of Linear Technology Corporation.
16
Linear Technology Corporation
1812fa LT/TP 1000 REV A 2K • PRINTED IN USA
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408)432-1900 ● FAX: (408) 434-0507 ● www.linear-tech.com
 LINEAR TECHNOLOGY CORPORATION 1999