ETC PI74FCT322501ET

PI74FCT322501T
PI74FCT322Q501T
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Fast CMOS 36-Bit
Registered Transceiver
with 3-State Outputs
Product Description
Product Features
Common Features
• VCC = 5V ±10%
• Hysteresis on all inputs
• Bus Hold retains last active bus state during 3-state
• Internal resistors eliminates the need for external pullup
resistors
• Packages available:
– 100-pin TQFP (F100)
PI74FCT322501T Features
• Balanced output drivers: ±24mA
PI74FCT322Q501T Features
• Balanced output drivers:
±12mA
• Output impedance
35Ω (typical)
Pericom Semiconductor’s PI74FCT series of logic circuits are
produced in the Company’s advanced 0.6 micron CMOS technology,
achieving industry leading speed grades.
The PI74FCT322501T and PI74FCT322Q501T are 36-bit registered
bus transceivers designed with D-type latches and flip-flops to
allow data flow in transparent, latched, and clocked modes. The
Output Enable (xOEAB and xOEBA), Latch Enable (xLEAB and
xLEBA) and Clock (xCLKAB and xCLKBA) inputs control the data
flow in each direction.
When xLEAB is HIGH, the device operates in transparent mode for
A-to-B data flow. When xLEAB is LOW, the A data is latched if
xCLKAB is held at a HIGH or LOW logic level. When xLEAB is
LOW, the A bus data is stored in the latch/flip-flop on the transition
of xCLKAB. Data flow from B port to A port is similar to that of A
port to B port but uses xOEBA, xLEBA and xCLKBA.
Internal 50KΩ pullup and pulldown resistors are provided for the
two Output Enable inputs. xOEAB should be tied to GND through
a pulldown resistor. Its minimum value is determined by the currentsourcing capability of the driver. The Output Enables are
complementary (xOEAB is active HIGH and xOEBA is active LOW).
Truth Table(1,4)
xOEAB
L
H
H
Inputs
xLEAB xCLKAB
X
X
H
X
H
X
Ax
X
L
H
Outputs
Bx
Z
L
H
H
L
↑
L
L
H
H
H
L
L
L
↑
H
L
H
X
X
H
B(2)
B(3)
The PI74FCT322501T and PI74FCT322Q501T have “Bus Hold”
which retains the input's last state whenever the input goes to highimpedance preventing “floating” inputs and eliminating the need
for pullup/down resistors.
The PI74FCT322501T and PI74FCT322Q501T are designed with
current limiting resistors at its outputs to control the output edge
rate resulting in lower ground bounce and undershoot.
The PI74FCT322Q501T also features an additional internal series
resistor which further minimizes noise. This virtually eliminates the
need for any external terminating resistors for most low noise bus
interface applications. This noise suppression benefit is designated
by the letter “Q” (for quiet) in the part number.
Notes:
1. A-to-B data flow is shown. B-to-A data flow is similar but
uses xOEBA, xLEBA, and xCLKBA.
2. Output level before the indicated steady-state input
conditions were established.
3. Output level before the indicated steady-state input
conditions were established, provided that xCLKAB
was LOW before xLEAB went LOW.
4. H = High Voltage Level
L = Low Voltage Level
Z = High Impedance
↑ = LOW-to-HIGH Transition
1
PS7085B 06/12/97
PI74FCT322501/322Q501T
36-Bit
Registered Transceiver
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Logic Block Diagram
1OEAB
50K
1CLKBA
1LEBA
VCC
50K
1OEBA
1CLKAB
CLK
1LEAB
LE
1A1
1B1
D
CLK
LE
D
TO 17 OTHER CHANNELS
2OEAB
50K
2CLKBA
2LEBA
VCC
50K
2OEBA
2CLKAB
2LEAB
2A1
CLK
LE
2B1
D
CLK
LE
D
TO 17 OTHER CHANNELS
2
PS7085B 06/12/97
2A11
2A12
2A13
GND
2A14
2A15
2A16
2A17
2A18
2OEBA
2LEBA
2CLKBA
VCC
2CLKAB
2LEAB
2OEAB
2B18
2B17
2B16
2B15
2B14
GND
2B13
2B12
2B11
PI74FCT322501/322Q501T
36-Bit
Registered Transceiver
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Product Pin Configuration
100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76
75
1
74
2
73
3
72
4
71
5
70
6
69
7
68
8
67
9
66
10
65
11
64
12
63
13
62
14
61
15
60
16
59
17
58
18
57
19
56
20
55
21
54
22
53
23
52
24
51
25
26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50
2B10
2B9
GND
2B8
2B7
2B6
2B5
GND
2B4
2B3
2B2
2B1
VCC
1B1
1B2
1B3
1B4
GND
1B5
1B6
1B7
1B8
GND
1B9
1B10
1A11
1A12
1A13
GND
1A14
1A15
1A16
1A17
1A18
1OEBA
1LEBA
1CLKBA
VCC
1CLKAB
1LEAB
1OEAB
1B18
1B17
1B16
1B15
1B14
GND
1B13
1B12
1B11
2A10
2A9
GND
2A8
2A7
2A6
2A5
GND
2A4
2A3
2A2
2A1
VCC
1A1
1A2
1A3
1A4
GND
1A5
1A6
1A7
1A8
GND
1A9
1A10
Product Pin Description
Pin Name
xOEAB
xOEBA
xLEAB
xLEBA
xCLKAB
xCLKBA
Description
A-to-B Output Enable Inputs (Active HIGH)
B-to-A Output Enable Inputs (Active LOW)
A-to-B Latch Enable Inputs
B-to-A Latch Enable Inputs
A-to-B Clock Inputs
B-to-A Clock Inputs
xAx
xBx
GND
VCC
A-to-B Data Inputs or B-to-A 3-State Outputs
B-to-A Data Inputs or A-to-B 3-State Outputs
Ground
Power
3
PS7085B 06/12/97
PI74FCT322501/322Q501T
36-Bit
Registered Transceiver
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Maximum Ratings
(Above which the useful life may be impaired. For user guidelines, not tested.)
Storage Temperature ................................................................. –55°C to +125°C
Ambient Temperature with Power Applied ................................ –40°C to +85°C
Supply Voltage to Ground Potential (Inputs & Vcc Only) .......... –0.5V to +7.0V
Supply Voltage to Ground Potential (Outputs & D/O Only) ....... –0.5V to +7.0V
DC Input Voltage ......................................................................... –0.5V to +7.0V
DC Output Current ................................................................................... 120 mA
Power Dissipation ......................................................................................... 1.2W
Note:
Stresses greater than those listed under MAXIMUM RATINGS may cause permanent damage
to the device. This is a stress rating only and
functional operation of the device at these or any
other conditions above those indicated in the
operational sections of this specification is not
implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability.
DC Electrical Characteristics (Over the Operating Range, TA = –40°C to +85°C, VCC = 5.0V ± 10%)
Parameters Description
VIH
VIL
IIH
IIH
IIH
IIH
IIL
IIL
IIL
IIL
IBHH
IBHL
IBHHO
IBHLO
IOZH
IOZL
VIK
IOS
IO
VH
Input HIGH Voltage
Input LOW Voltage
Input HIGH Current
Input HIGH Current
Input HIGH Current
Input HIGH Current
Input LOW Current
Input LOW Current
Input LOW Current
Input LOW Current
Bus Hold
Sustain Current
Bus Hold
Overdrive Current
High-Impedance
Output Current
(3-State Outputs)
Clamp Diode Voltage
Short Circuit Current
Output Drive Current
Input Hysteresis
Test Conditions(1)
Guaranteed Logic HIGH Level
Guaranteed Logic LOW Level
Standard Input, VCC = Max.
Standard I/O, VCC = Max.
Bus Hold Input(4), VCC = Max.
Bus Hold I/O(4), VCC = Max.
Standard Input, VCC = Min.
Standard I/O, VCC = Min.
Bus Hold Input(4), VCC = Min.
Bus Hold I/O(4), VCC = Min.
Bus Hold Input(4), VCC = Min.
Min.
2.0
Bus Hold Input(4), VCC = Max.
VIN = VCC
VIN = VCC
VIN = VCC
VIN = VCC
VIN = GND
VIN = GND
VIN = GND
VIN = GND
VIN = 2.0V
VIN = 0.8V
VIN = 1.5V
VCC = Max.
VCC = Max.
VOUT = 2.7V
VOUT = 0.5V
VCC = Min., IIN = –18 mA
VCC = Max.(3), VOUT = GND
VCC = Max.(3), VOUT = 2.5V
Typ(2)
–50
+50
–80
–50
–0.7
–140
Max.
Units
0.8
1
1
±100
±100
–1
–1
±100
±100
V
V
µA
µA
µA
µA
µA
µA
µA
µA
µA
TBD
mA
1
–1
µA
µA
–1.2
–200
–180
V
mA
mA
mV
100
Notes:
1. For Max. or Min. conditions, use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at Vcc = 5.0V, +25°C ambient and maximum loading.
3. Not more than one output should be shorted at one time. Duration of the test should not exceed one second.
4. Pins with Bus Hold are identified in the pin description.
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PS7085B 06/12/97
PI74FCT322501/322Q501T
36-Bit
Registered Transceiver
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PI74FCT322501T Output Drive Characteristics (Over the Operating Range)
Parameters Description
VOH
VOL
IODL
IODH
Output HIGH Voltage
Output LOW Voltage
Output LOW Current
Output HIGH Current
Test Conditions(1)
VCC = Min., VIN = VIH or VIL
IOH = –24.0 mA
VCC = Min., VIN = VIH or VIL
IOL = 24 mA
VCC = 5V, VIN = VIH OR VIL, VOUT = 1.5V(3)
VCC = 5V, VIN = VIH OR VIL, VOUT = 1.5V(3)
Min.
Typ(2)
Max.
Units
2.4
—
60
–60
3.3
0.3
115
–115
—
0.55
150
–150
V
V
mA
mA
PI74FCT322Q501T Output Drive Characteristics (Over the Operating Range)
Parameters Description
Test Conditions(1)
Min. Typ(2) Max. Units
VOH
Output HIGH Voltage
VCC = Min., VIN = VIH or VIL
IOH = –12.0 mA
2.4
3.3
—
V
VOL
Output LOW Voltage
VCC = Min., VIN = VIH or VIL
IOL = 12 mA
—
0.3
0.55
V
IODL
Output LOW Current
VCC = 5V, VIN = VIH OR VIL, VOUT = 1.5V
—
TBD
—
mA
IODH
Output HIGH Current
VCC = 5V, VIN = VIH OR VIL, VOUT = 1.5V
—
TBD
—
mA
(3)
(3)
Capacitance (TA = 25°C, f = 1 MHz)
Parameters(4)
CIN
COUT
Description
Test Conditions
Input Capacitance
Output Capacitance
VIN = 0V
VOUT = 0V
Typ.
Max.
Units
4.5
5.5
6
8
pF
pF
Notes:
1. For Max. or Min. conditions, use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at Vcc = 5.0V, +25°C ambient and maximum loading.
3. Not more than one output should be shorted at one time. Duration of the test should not exceed one second.
4. This parameter is determined by device characterization but is not production tested.
Power Supply Characteristics
Test Conditions(1)
Parameters Description
Min.
Typ(2)
Max.
Units
ICC
Quiescent Power
Supply Current
VCC = Max.
VIN = GND or VCC
0.2
20
µA
∆ICC
Supply Current per
Input @ TTL HIGH
VCC = Max.
VIN = 3.4V(3)
1.0
6.0
mA
ICCD
Supply Current per
Input per MHz(4)
VCC = Max., Outputs Open
OEAB = OEBA = VCC or GND
One Bit Toggling
50% Duty Cycle
VIN = VCC
VIN = GND
150
240
µA/
MHz
Notes:
1. For Max. or Min. conditions, use appropriate value specified under Electrical Characteristics for the applicable device.
2. Typical values are at Vcc = 5.0V, +25°C ambient.
3. Per TTL driven input (VIN = 3.4V); all other inputs at Vcc or GND.
4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations.
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PS7085B 06/12/97
PI74FCT322501/322Q501T
36-Bit
Registered Transceiver
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PI74FCT322501/322Q501T Switching Characteristics over Operating Range
322501/Q501AT 322501/Q501CT 322501/Q501DT 322501/Q501ET
Com.
Parameters
Description
Conditions
(1)
Com.
Com.
Min
Max
Min
Max
Min
Max
Min
Max
Unit
1.5
5.1
1.5
4.6
1.5
4.1
1.5
3.8
ns
1.5
5.6
1.5
5.3
1.5
4.6
1.5
4.2
ns
1.5
5.6
1.5
5.3
1.5
4.6
1.5
4.2
ns
1.5
6.0
1.5
5.6
1.5
5.2
1.5
4.8
ns
tPLH
tPHL
Propagation Delay
AX to BX or AX to BX
tPLH
tPHL
XLEBA to AX, XLEAB to BX
tPLH
tPHL
XCLKBA to AX, CLKAB to BX
tPZH
tPZL
XOEBA to AX, XOEAB to BX
tPHZ
tPLZ
Output Disable Time(3)
XOEBA to AX, XOEAB to BX
1.5
5.6
1.5
5.2
1.5
5.2
1.5
5.2
ns
tSU
Setup Time HIGH or LOW
Ax to xCLKAB, Bx to xCLKBA
3.0
—
3.0
—
3.0
—
2.4
—
ns
tH
Hold Time HIGH or LOW
Ax to xCLKAB, Bx to xCLKBA
0
—
0
—
0
—
0
—
ns
tSU
Setup Time
HIGH or LOW
Ax to xLEAB,
Bx to xLEBA
Clock HIGH
3.0
—
3.0
—
3.0
—
2.0
—
ns
Clock LOW
1.5
—
1.5
—
1.5
—
1.5
—
ns
Propagation Delay
Propagation Delay
Output Enable Time
CL = 50 pF
RL = 500Ω
Com.
tH
Hold Time HIGH or LOW
Ax to xLEAB, Bx to xLEBA
1.5
—
1.5
—
1.5
—
0.5
—
ns
tW
xLEAB or xLEBA Pulse Width
HIGH(3)
3.0
—
3.0
—
3.0
—
3.0
—
ns
tW
xCLKAB or xCLKBA Pulse
Width HIGH or LOW(3)
3.0
—
3.0
—
3.0
—
3.0
—
ns
tSK(O)
Output Skew(4)
—
0.5
—
0.5
—
0.5
—
0.5
ns
Notes:
1. See test circuit and wave forms.
2. Minimum limits are guaranteed but not tested on Propagation Delays.
3. This parameter is guaranteed but not production tested.
4. Skew between any two outputs, of the same package, switching in the same direction. This parameter is guaranteed by design.
Pericom Semiconductor Corporation
2380 Bering Drive • San Jose, CA 95131 • 1-800-435-2336 • Fax (408) 435-1100 • http://www.pericom.com
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PS7085B 06/12/97