Revised June 2001 74FR2244 Octal Buffer/Line Driver with 25Ω Series Resistors in the Outputs General Description Features The 74FR2244 is a non-inverting octal buffer and line driver designed to drive capacitive inputs of MOS memory devices, address and clock lines or act as a low undershoot general purpose bus driver. ■ 3-STATE outputs drive bus lines or buffer memory address registers ■ Outputs sink 12 mA and source 15 mA ■ 25Ω series resistors in outputs eliminate the need for external resistors ■ Designed to drive the capacitive inputs of MOS devices Ordering Code: Order Number Package Number Package Description 74FR2244SC M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide 74FR2244SJ M20D 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 74FR2244PC N20A 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Connection Diagram Pin Descriptions Pin Names Description OE1, OE2 Output Enable Input (Active-LOW) I0–I7 Inputs O0–O7 Outputs Truth Tables Inputs OE1 Outputs In (Pins 12, 14, 16, 18) L L L L H H H X Z In (Pins 3, 5, 7, 9) Inputs OE2 Outputs L L L L H H H X Z H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial Z = High Impedance © 2001 Fairchild Semiconductor Corporation DS010931 www.fairchildsemi.com 74FR2244 Octal Buffer/Line Driver June 1991 74FR2244 Absolute Maximum Ratings(Note 1) Recommended Operating Conditions Storage Temperature −65°C to +150°C Ambient Temperature under Bias −55°C to +125°C Free Air Ambient Temperature Junction Temperature under Bias −55°C to +150°C Supply Voltage 0°C to +70°C +4.5V to +5.5V −0.5V to +7.0V VCC Pin Potential to Ground Pin Input Voltage (Note 2) −0.5V to +7.0V Input Current (Note 2) −30 mA to +5.0 mA Voltage Applied to Output in HIGH State (with VCC = 0V) Standard Output −0.5V to VCC 3-STATE Output −0.5V to +5.5V Note 1: Absolute maximum ratings are values beyond which the device may be damaged or have its useful life impaired. Current Applied to Output in LOW State (Max) Note 2: Either voltage limit or current limit is sufficient to protect inputs. Twice the Rated IOL (mA) ESD Last Passing Voltage (Min) 4000V DC Electrical Characteristics Symbol Parameter Min Typ Max Input HIGH Voltage VIL Input LOW Voltage 0.8 V VCD Input Clamp Diode Voltage −1.2 V VOH Output HIGH Voltage VOL 2.0 Units VIH VCC V Conditions Recognized HIGH Signal Recognized LOW Signal Min IIN = −18 mA 2.4 V Min IOH = −3 mA 2.0 V Min IOH = −15 mA IOL = 1 mA Output LOW Voltage 0.5 V Min 0.75 V Min IOL = 12 mA IIH Input HIGH Current 5 µA Max VIN = 2.7V IBVI Input HIGH Current 7 µA Max VIN = 7.0V −150 µA Max VIN = 0.5V V 0.0 IID = 1.9 µA 3.75 µA 0.0 VIOD = 150 mV 20 µA Max VOUT = 2.7V VOUT = 0.5V Breakdown Test IIL Input LOW Current VID Input Leakage Test IOD Output Circuit Leakage Current IOZH Output Leakage Current IOZL Output Leakage Current IOS Output Short-Circuit Current ICEX 4.75 All Other Pins Grounded All Other Pins Grounded −20 µA Max −225 mA Max VOUT = 0.0V Output HIGH Leakage Current 50 µA Max VOUT = VCC −100 IZZ Bus Drainage Test 100 µA 0.0 VOUT = 5.25V ICCH Power Supply Current 40 mA Max All Outputs HIGH ICCL Power Supply Current 70 mA Max All Outputs LOW ICCZ Power Supply Current 46 mA Max Outputs 3-STATE www.fairchildsemi.com 2 Symbol tPLH Parameter Propagation Delay tPHL tPZH Output Enable Time tPZL tPHZ Output Disable Time tPLZ TA = +25°C TA = 0°C to +70°C VCC = +5.0V VCC = +5.0V CL = 50 pF CL = 50 pF Min Typ Max Min Max 1.0 2.6 4.4 1.0 4.4 1.0 1.8 4.4 1.0 4.4 2.5 4.8 7.1 2.5 7.1 2.5 3.9 7.1 2.5 7.1 1.6 3.7 6.4 1.6 6.4 1.6 3.6 6.4 1.6 6.4 Units ns ns ns Extended AC Electrical Characteristics Symbol Parameter TA = 0°C to +70°C TA = 0°C to +70°C VCC = +5.0V VCC = +5.0V CL = 50 pF CL = 250 pF Eight Outputs Switching (Note 4) Units (Note 3) tPLH Propagation Delay tPHL tPZH Output Enable Time tPZL tPHZ Output Disable Time tPLZ tOSHL Pin-to-Pin Skew for HL Transitions (Note 5) tOSLH Pin-to-Pin Skew for LH Transitions (Note 5) tOST Pin-to-Pin Skew for HL/LH Transitions (Note 5) Min Max Min 1.0 5.9 2.7 9.7 1.0 5.9 2.7 9.7 2.5 8.0 2.5 8.0 1.6 7.0 1.6 7.0 Max ns ns ns 1.5 ns 1.5 ns 3.0 ns Note 3: This specification is guaranteed but not tested. The limits apply to propagation delays for all paths described switching in phase, i.e., all LOW-to-HIGH, HIGH-to-LOW, 3-STATE-to-HIGH, etc. Note 4: These specifications guaranteed but not tested. The limits represent propagation delays with 250 pF load capacitors in place of the 50 pF load capacitors in the standard AC load. This specification pertains to single output switching only. Note 5: Skew is defined as the absolute value of the difference between the actual propagation delays for any two outputs of the same device. The specification applies to any outputs switching HIGH-to-LOW, (tOSHL), LOW-to-HIGH, (tOSLH), or HIGH-to-LOW and/or LOW-to-HIGH, (t OST). Specifications guaranteed with all outputs switching in phase. 3 www.fairchildsemi.com 74FR2244 AC Electrical Characteristics 74FR2244 Physical Dimensions inches (millimeters) unless otherwise noted 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide Package Number M20B www.fairchildsemi.com 4 74FR2244 Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide Package Number M20D 5 www.fairchildsemi.com 74FR2244 Octal Buffer/Line Driver Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide Package Number N20A Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. www.fairchildsemi.com www.fairchildsemi.com 6