IS93C46A IS93C56A IS93C66A ISSI 1,024/2,048/4,096-BIT SERIAL ELECTRICALLY ERASABLE PROM NOVEMBER ® 2002 FEATURES DESCRIPTION • Industry-standard Microwire Interface — Non-volatile data storage — Low voltage operation: Vcc = 2.5V to 5.5V — Full TTL compatible inputs and outputs — Auto increment for efficient data dump • User Configured Memory Organization — By 16-bit or by 8-bit • Hardware and software write protection — Defaults to write-disabled state at power-up — Software instructions for write-enable/disable • Enhanced low voltage CMOS E2PROM technology • Versatile, easy-to-use Interface — Self-timed programming cycle — Automatic erase-before-write — Programming status indicator — Word and chip erasable — Stop SK anytime for power savings • Durable and reliable — 40-year data retention after 1M write cycles — 1 million write cycles — Unlimited read cycles — Schmitt-trigger inputs • Industrial and Automotive Temperature Grade The IS93C46A/56A/66A is a low-cost 1kb/2kb/ 4kb non-volatile, ISSI ® serial EEPROM. It is fabricated using an enhanced CMOS design and process. The IS93C46A/56A/66A contain powerefficient read/write memory, and organziation of either 128/256/512 bytes of 8 bits or 64/128/256 words of 16 bits. When the ORG pin is connected to Vcc or left unconnected, x16 is selected; when it is connected to ground, x8 is selected. The IS93C46A/56A/66A is fully backwards compatible with IS93C46/56/66. An instruction set controls the operation of the devices, including read, write, and mode-enable functions. The data out pin (Dout) indicates the status of the device during the self-timed nonvolatile programming cycle. The self-timed write cycle includes an automatic erase-before-write capability. To protect against inadvertent writes, the WRITE instruction is accepted only while the chip is in the write-enabled state. Data is written once per WRITE instruction to the x8 byte or x16 word selected. If Chip Select (CS) is brought HIGH just after initiation of the write cycle, the Dout pin would indicate the Ready/Busy status of the write activity. FUNCTIONAL BLOCK DIAGRAM DATA REGISTER INSTRUCTION REGISTER DIN CS SK DUMMY BIT DOUT R/W AMPS INSTRUCTION DECODE, CONTROL, AND CLOCK GENERATION ADDRESS REGISTER ADDRESS DECODER EEPROM ARRAY 128/256/512x16 64/128/256/x8 WRITE ENABLE HIGH VOLTAGE GENERATOR Copyright © 2002 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest version of this device specification before relying on any published information and before placing orders for products. Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 Rev. A 11/12/02 1 IS93C46A IS93C56A ISSI IS93C66A ® PIN CONFIGURATIONS 8-Pin JEDEC SOIC “GR” 8-Pin JEDEC SOIC “G” 8-Pin DIP, 8-Pin TSSOP CS 1 8 VDD NC 1 8 ORG CS 1 8 VCC SK 2 7 NC VCC 2 7 GND SK 2 7 NC DIN 3 6 ORG CS 3 6 DOUT DIN 3 6 ORG DOUT 4 5 GND SK 4 5 DIN DOUT 4 5 GND (Rotated) PIN DESCRIPTIONS instruction begins with a start bit of the logical “1” or HIGH. Following this are the opcode (2 bits), address field (6, 7, 8, or 9 bits), and data, if appropriate. The clock signal may be held stable at any moment to suspend the device at its last state. This allows clock-speed flexibility as well as CS Chip Select SK Serial Data Clock DIN Serial Data Input DOUT Serial Data Output maximum power conservation. ORG Organization Select Read (READ) NC Not Connected Vcc Power GND Ground The READ instruction is the only instruction that outputs serial data on the DOUT pin. After the read instruction and address have been decoded, data is transferred from the selected memory register into a serial shift register. (Please note that one logical “0” bit precedes the actual 8 or 16-bit output data string.) The output on DOUT changes during the low-to-high transitions of SK (see Figure 3). Applications The IS93C46A/56A/66A is very popular in many highvolume applications which require low-power, lowdensity storage. Applications using this device include industrial controls, networking, and numerous other consumer electronics. Low Voltage Read Endurance and Data Retention Auto Increment Read Operations The IS93C46A/56A/66A is designed for applications requiring up to 1M programming cycles (WRITE, WRALL, ERASE and ERAL). It provides 40 years of secure data retention without power after the execution of 1M programming cycles. In the interest of memory transfer operation applications, the IS93C46A/56A/66A has been designed to output a continuous stream of memory content in response to a single read operation instruction. To utilize this function, the system asserts a read instruction specifying a start location address. Once the 8 or16 bits of the addressed register have been clocked out, the data in consecutively higher address locations is output. The address will wrap around continuously with CS HIGH until the chip select (CS) control pin is brought LOW. This allows for single instruction data dumps to be executed with a minimum of firmware overhead. Device Operations The IS93C46A/56A/66A are controlled by a set of instructions which are clocked-in serially on the Din pin. Before each low-to-high transition of the clock (SK), the CS pin must have already been raised to HIGH, and the Din value must be stable at either LOW or HIGH. Each 2 The IS93C46A/56A/66A have been designed to ensure that data read operations are reliable in low voltage environments. They provide accurate operation with Vcc as low as 2.5V. Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 Rev. A 11/12/02 IS93C46A IS93C56A ISSI IS93C66A ® Write Enable (WEN) Write All (WRALL) The write enable (WEN) instruction must be executed before any device programming (WRITE, WRALL, ERASE, and ERAL) can be done. When Vcc is applied, this device powers up in the write disabled state. The device then remains in a write disabled state until a WEN instruction is executed. Thereafter, the device remains enabled until a WDS instruction is executed or until Vcc is removed. (See Figure 4.) (Note: Chip select must remain LOW until Vcc reaches its operational value.) The write all (WRALL) instruction programs all registers with the data pattern specified in the instruction. As with the WRITE instruction, the falling edge of CS must occur to initiate the self-timed programming cycle. If CS is then brought HIGH after a minimum wait of 250 ns (tCS), the DOUT pin indicates the READY/BUSY status of the chip (see Figure 6). Write (WRITE) The WRITE instruction includes 8 or 16 bits of data to be written into the specified register. After the last data bit has been applied to DIN, and before the next rising edge of SK, CS must be brought LOW. The falling edge of CS initiates the self-timed programming cycle. If CS is brought HIGH, after a minimum wait of 250 ns (5V operation) after the falling edge of CS (tCS) DOUT will indicate the READY/BUSY status of the chip. Logical “0” means programming is still in progress, logical “1” means the selected register has been written, and the part is ready for another instruction (see Figure 5). (NOTE: The combination of CS HIGH, DIN HIGH and the rising edge of the SK clock, resets the READY/ BUSY flag. Therefore, to access the READY/BUSY flag, this combination of control signals should be avoided.) Before a WRITE instruction can be executed, the device must be write enabled (see WEN). Write Disable (WDS) The write disable (WDS) instruction disables all programming capabilities. This protects the entire device against accidental modification of data until a WEN instruction is executed. (When Vcc is applied, this part powers up in the write disabled state.) To protect data, a WDS instruction should be executed upon completion of each programming operation. Erase Register (ERASE) After the erase instruction is entered, CS must be brought LOW. The falling edge of CS initiates the self-timed internal programming cycle. Bringing CS HIGH after a minimum of tCS, will cause DOUT to indicate the READ/BUSY status of the chip: a logical “0” indicates programming is still in progress; a logical “1” indicates the erase cycle is complete and the part is ready for another instruction (see Figure 8). Erase All (ERAL) Full chip erase is provided for ease of programming. Erasing the entire chip involves setting all bits in the entire memory array to a logical “1” (see Figure 9). INSTRUCTION SET - IS93C46A Instruction 8-bit Organization (ORG = GND) Address (1) Input Data 16-bit Organization (ORG = Vcc) Address (1) Input Data Start Bit OP Code READ 1 10 (A6-A0) — (A5-A0) — WEN (Write Enable) 1 00 11xxxxx — 11xxxx — WRITE 1 01 (A6-A0) (D7-D0) (3) (A5-A0) (D15-D0) (2) WRALL (Write All Registers) 1 00 01xxxxx (D7-D0) (3) 01xxxx (D15-D0) (2) WDS (Write Disable) 1 00 00xxxxx — 00xxxx — ERASE 1 11 (A6-A0) — (A5-A0) — ERAL (Erase All Registers) 1 00 10xxxxx — 10xxxx — Notes: 1. x = Don't care bit. 2. If input data is not 16 bits exactly, the last 16 bits will be taken as input data. 3. If input data is not 8 bits exactly, the last 8 bits will be taken as input data. Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 Rev. A 11/12/02 3 IS93C46A IS93C56A ISSI IS93C66A ® INSTRUCTION SET - IS93C56A Instruction 8-bit Organization (ORG = GND) Address (1) Input Data 16-bit Organization (ORG = Vcc) Address (1) Input Data Start Bit OP Code READ 1 10 x(A7-A0) — x(A6-A0) — WEN (Write Enable) 1 00 11xxxxxxx — 11xxxxxx — (D7-D0) (3) x(A6-A0) (D15-D0) (2) (3) 01xxxxxx (D15-D0) (2) WRITE 1 01 x(A7-A0) WRALL (Write All Registers) 1 00 01xxxxxxx WDS (Write Disable) 1 00 00xxxxxxx — 00xxxxxx — ERASE 1 11 x(A7-A0) — x(A6-A0) — ERAL (Erase All Registers) 1 00 10xxxxxxx — 10xxxxxx — (D7-D0) Notes: 1. x = Don't care bit. 2. If input data is not 16 bits exactly, the last 16 bits will be taken as input data. 3. If input data is not 8 bits exactly, the last 8 bits will be taken as input data. INSTRUCTION SET - IS93C66A Instruction Start Bit OP Code 8-bit Organization (ORG = GND) Address (1) Input Data 16-bit Organization (ORG = Vcc) Address (1) Input Data READ 1 10 (A8-A0) — (A7-A0) — WEN (Write Enable) 1 00 11xxxxxxx — 11xxxxxx — WRITE 1 01 (A8-A0) (D7-D0) (3) (A7-A0) (D15-D0) (2) WRALL (Write All Registers) 1 00 01xxxxxxx (D7-D0) (3) 01xxxxxx (D15-D0) (2) WDS (Write Disable) 1 00 00xxxxxxx — 00xxxxxx — ERASE 1 11 (A8-A0) — (A7-A0) — ERAL (Erase All Registers) 1 00 10xxxxxxx — 10xxxxxx — Notes: 1. x = Don't care bit. 2. If input data is not 16 bits exactly, the last 16 bits will be taken as input data. 3. If input data is not 8 bits exactly, the last 8 bits will be taken as input data. 4 Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 Rev. A 11/12/02 IS93C46A IS93C56A ISSI IS93C66A ® ABSOLUTE MAXIMUM RATINGS(1) Symbol VGND TBIAS TBIAS TSTG Parameter Voltage with Respect to GND Temperature Under Bias (Industrial) Temperature Under Bias (Automotive) Storage Temperature Value –0.3 to +6.5 –40 to +85 –40 to +125 –65 to +150 Unit V °C °C °C Notes: 1. Stress greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. OPERATING RANGE Range Industrial Automotive Ambient Temperature –40°C to +85°C VCC 2.5V to 5.5V –40°C to +125°C 2.7V to 5.5V or 4.5V to 5.5V CAPACITANCE Symbol Parameter CIN Input Capacitance COUT Output Capacitance Conditions Max. Unit VIN = 0V 5 pF VOUT = 0V 5 pF Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 Rev. A 11/12/02 5 IS93C46A IS93C56A ISSI IS93C66A ® DC ELECTRICAL CHARACTERISTICS TA = –40°C to +85°C for Industrial and –40°C to +125°C for Automotive. Symbol Parameter Test Conditions VOL Output LOW Voltage IOL = 100 µA VOL1 Output LOW Voltage VOH Vcc Min. Max. Unit 2.5V to 5.5V — 0.2 V IOL = 2.1 mA 4.5V to 5.5V — 0.4 V Output HIGH Voltage IOH = –100 µA 2.5V to 5.5V VCC – 0.2 — V VOH1 Output HIGH Voltage IOH = –400 µA 4.5V to 5.5V 2.4 — V VIH Input HIGH Voltage 2.5V to 5.5V 4.5V to 5.5V 0.7XVCC 0.7XVCC VCC+1 VCC+1 V VIL Input LOW Voltage 2.5V to 5.5V 4.5V to 5.5V –0.3 –0.3 0.2XVCC 0.8 V ILI Input Leakage VIN = 0V to VCC (CS, SK,DIN,ORG) 0 2.5 µA ILO Output Leakage VOUT = 0V to VCC, CS = 0V 0 2.5 µA Notes: Automotive grade devices in this table are tested with Vcc = 2.7V to 5.5V and 4.5V to 5.5V. POWER SUPPLY CHARACTERISTICS TA = –40°C to +85°C for Industrial Symbol Parameter Test Conditions I CC1 Vcc Read Supply Current CS = VIH, SK = 1 MHz CMOS input levels I CC2 Vcc Write Supply Current I SB Standby Current Vcc Min. Typ. Max. Unit 2.7V 5.0V — — 40 100 100 500 µA µA CS = VIH, SK = 1 MHz CMOS input levels 2.7V 5.0V — — 0.4 1.5 1 3 mA mA CS = VIH, SK = 0V 2.7V 5.0V — — 0.4 2 2 4 µA µA Min. Typ. Max. Unit POWER SUPPLY CHARACTERISTICS TA = –40°C to +125°C for Automotive 6 Symbol Parameter Test Conditions Vcc I CC1 Vcc Read Supply Current CS = VIH, SK = 1 MHz CMOS input levels 2.7V 5.0V — — 40 100 100 500 µA µA I CC2 Vcc Write Supply Current CS = VIH, SK = 1 MHz CMOS input levels 2.7V 5.0V — — 0.4 1.5 1 3 mA mA I SB Standby Current CS = VIH, SK = 0V 2.7V 5.0V — — 0.5 4 3 8 µA µA Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 Rev. A 11/12/02 IS93C46A IS93C56A ISSI IS93C66A ® AC ELECTRICAL CHARACTERISTICS TA = –40°C to +125°C for Automotive Symbol Parameter fSK tSKH tSKL tCS tCSS tDIS tCSH tDIH tPD1 tPD0 tSV tDF tWP Test Conditions SK Clock Frequency SK HIGH Time SK LOW Time Minimum CS LOW Time CS Setup Time Din Setup Time CS Hold Time Din Hold Time Output Delay to “1” Output Delay to “0” CS to Status Valid CS to Dout in 3-state Write Cycle Time Relative to SK Relative to SK Relative to SK Relative to SK AC Test AC Test AC Test AC Test, CS=VIL Vcc Min. Max. Unit 2.7V to 5.5V 0 1 Mhz 4.5V to 5.5V 0 2 Mhz 2.7V to 5.5V 500 — ns 4.5V to 5.5V 250 — ns 2.7V to 5.5V 500 — ns 4.5V to 5.5V 250 — ns 2.7V to 5.5V 250 — ns 4.5V to 5.5V 250 — ns 2.7V to 5.5V 100 — ns 4.5V to 5.5V 50 — ns 2.7V to 5.5V 100 — ns 4.5V to 5.5V 100 — ns 2.7V to 5.5V 0 — ns 4.5V to 5.5V 0 — ns 2.7V to 5.5V 100 — ns 4.5V to 5.5V 100 — ns 2.7V to 5.5V — 400 ns 4.5V to 5.5V — 250 ns 2.7V to 5.5V — 400 ns 4.5V to 5.5V — 250 ns 2.7V to 5.5V — 250 ns 4.5V to 5.5V — 250 ns 2.7V to 5.5V — 200 ns 4.5V to 5.5V — 100 ns 2.7V to 5.5V — 10 ms 4.5V to 5.5V — 5 ms Notes: 1. C L = 100pF Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 Rev. A 11/12/02 7 IS93C46A IS93C56A ISSI IS93C66A ® AC ELECTRICAL CHARACTERISTICS TA = –40°C to +85°C for Industrial Symbol Parameter Test Conditions Vcc Min. Max. Unit fSK SK Clock Frequency 2.5V to 5.5V 2.7V to 5.5V 4.5V to 5.5V 0 0 0 1 1 2 Mhz Mhz Mhz tSKH SK HIGH Time 2.5V to 5.5V 2.7V to 5.5V 4.5V to 5.5V 500 350 250 — — — ns ns ns tSKL SK LOW Time 2.5V to 5.5V 2.7V to 5.5V 4.5V to 5.5V 500 350 250 — — — ns ns ns tCS Minimum CS LOW Time 2.5V to 5.5V 2.7V to 5.5V 4.5V to 5.5V 500 250 250 — — — ns ns ns tCSS CS Setup Time Relative to SK 2.5V to 5.5V 2.7V to 5.5V 4.5V to 5.5V 100 50 50 — — — ns ns ns tDIS Din Setup Time Relative to SK 2.5V to 5.5V 2.7V to 5.5V 4.5V to 5.5V 100 100 100 — — — ns ns ns tCSH CS Hold Time Relative to SK 2.5V to 5.5V 2.7V to 5.5V 4.5V to 5.5V 0 0 0 — — — ns ns ns tDIH Din Hold Time Relative to SK 2.5V to 5.5V 2.7V to 5.5V 4.5V to 5.5V 100 100 100 — — — ns ns ns tPD1 Output Delay to “1” AC Test 2.5V to 5.5V 2.7V to 5.5V 4.5V to 5.5V — — — 400 350 250 ns ns ns tPD0 Output Delay to “0” AC Test 2.5V to 5.5V 2.7V to 5.5V 4.5V to 5.5V — — — 400 350 250 ns ns ns tSV CS to Status Valid AC Test 2.5V to 5.5V 2.7V to 5.5V 4.5V to 5.5V — — — 400 250 250 ns ns ns tDF CS to Dout in 3-state AC Test, CS=VIL 2.5V to 5.5V 2.7V to 5.5V 4.5V to 5.5V — — — 200 200 100 ns ns ns tWP Write Cycle Time 2.5V to 5.5V 2.7V to 5.5V 4.5V to 5.5V — — — 10 10 5 ms ms ms Notes: 1. C L = 100pF 8 Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 Rev. A 11/12/02 IS93C46A IS93C56A ISSI IS93C66A ® AC WAVEFORMS FIGURE 2. SYNCHRONOUS DATA TIMING CS T tCSS tSKH tSKL tCSH SK tDIS tDIH DIN tPD0 tPD1 tDF DOUT (READ) tSV tDF DOUT (WRITE) (WRALL) (ERASE) (ERAL) STATUS VALID FIGURE 3. READ CYCLE TIMING tCS CS SK DIN DOUT 1 1 0 An A0 0 Dm D0 * *Address Pointer Cycles to the Next Register Notes: To determine address bits An-A0 and data bits Dm-Do, see Instruction Set for the specific device. Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 Rev. A 11/12/02 9 IS93C46A IS93C56A ISSI IS93C66A ® AC WAVEFORMS FIGURE 4. SYNCHRONOUS DATA TIMING tCS CS SK DIN 1 0 0 1 1 DOUT = 3-state FIGURE 5. WRITE (WRITE) CYCLE TIMING tCS CS SK DIN 1 0 1 An A0 Dm D0 tSV DOUT BUSY tDF READY tWP Notes: To determine address bits An-A0 and data bits Dm-Do, see Instruction Set for the specific device. 10 Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 Rev. A 11/12/02 IS93C46A IS93C56A ISSI IS93C66A ® AC WAVEFORMS FIGURE 6. WRITE ALL (WRALL) TIMING tCS CS SK DIN 1 0 0 0 1 Dm D0 tSV BUSY DOUT READY tWP Notes: To determine data bits Dm - D0, see Instruction Set for the appropriate device. FIGURE 7. WRITE DISABLE (WDS) CYCLE TIMING tCS CS SK DIN 1 0 0 0 0 DOUT = 3-STATE Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 Rev. A 11/12/02 11 IS93C46A IS93C56A ISSI IS93C66A ® AC WAVEFORMS FIGURE 8. ERASE (REGISTER ERASE) CYCLE TIMING SK tCS CS DIN 1 1 1 An An-1 A0 tSV DOUT tDF BUSY READY tWP Notes: To determine data bits An - A0, see Instruction Set for the appropriate device. FIGURE 9. ERASE ALL (ERAL) CYCLE TIMING SK tCS CS DIN 1 0 0 1 0 tSV DOUT BUSY tDF READY tWP Note for Figures 8 and 9: After the completion of the instruction (DOUT is in READY status) then it may perform another instruction. If device is in BUSY status (DOUT indicates BUSY status) then performs another instruction that would cause device malfunction. 12 Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 Rev. A 11/12/02 IS93C46A IS93C56A ISSI IS93C66A ® ORDERING INFORMATION Industrial Range: -40ºC to +85ºC Speed 1Mhz Voltage Range 2.5V to 5.5V 1Mhz 2.5V to 5.5V 1Mhz 2.5V to 5.5V Order Part No. IS93C46A-3PI IS93C46A-3GI IS93C46A-3GRI IS93C46A-3ZI IS93C56A-3PI IS93C56A-3GI IS93C56A-3GRI IS93C56A-3ZI IS93C66A-3PI IS93C66A-3GI IS93C66A-3GRI IS93C66A-3ZI Package 300-mil Plastic DIP SOIC (rotated) JEDEC SOIC JEDEC 169-mil TSSOP 300-mil Plastic DIP SOIC (rotated) JEDEC SOIC JEDEC 169-mil TSSOP 300-mil Plastic DIP SOIC (rotated) JEDEC SOIC JEDEC 169-mil TSSOP Order Part No. IS93C46A-3PA IS93C46A-3GRA IS93C56A-3PA IS93C56A-3GRA IS93C66A-3PA IS93C66A-3GRA IS93C46A-PA IS93C46A-GRA IS93C56A-PA IS93C56A-GRA IS93C66A-PA IS93C66A-GRA Package 300-mil Plastic DIP SOIC JEDEC 300-mil Plastic DIP SOIC JEDEC 300-mil Plastic DIP SOIC JEDEC 300-mil Plastic DIP SOIC JEDEC 300-mil Plastic DIP SOIC JEDEC 300-mil Plastic DIP SOIC JEDEC ORDERING INFORMATION Automotive Range: -40ºC to +125ºC Speed 1Mhz Voltage Range 2.7V to 5.5V 1Mhz 2.7V to 5.5V 1Mhz 2.7V to 5.5V 2Mhz 4.5V to 5.5V 2Mhz 4.5V to 5.5V 2Mhz 4.5V to 5.5V Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 Rev. A 11/12/02 13