PI74LPT374 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 Fast CMOS 3.3V Octal D Flip-Flop Product Features Product Description Compatible with LCX and LVT families of products Supports 5V Tolerant Mixed Signal Mode Operation Input can be 3V or 5V Output can be 3V or connected to 5V bus Advanced Low Power CMOS Operation Excellent output drive capability: Balanced drives (24mA sink and source) Low ground bounce outputs Hysteresis on all inputs Industrial operating temperature range: 40°C to +85°C Packages available: 20-pin 173 mil wide plastic TSSOP (L) 20-pin 150 mil wide plastic QSOP (Q) 20-pin 300 mil wide plastic SOIC (S) Pericom Semiconductors PI74LPT series of logic circuits are produced using the Companys advanced submicron CMOS technology, achieving industry leading speed grades. The PI74LPT374 8-bit wide octal resisters designed with eight D-type flip-flops, a buffered common clock, and buffered 3-state outputs. When output enable (OE) is LOW, the outputs are enabled. When OE is HIGH, the outputs are in the high impedance state. Input data meeting the setup and hold time requirements of the D inputs is transferred to the O outputs on the LOW-to-HIGH transition of the clock input. The PI74LPT374 can be driven from either 3.3V or 5.0V devices allowing for the device to be used as a translator in a mixed 3.3V/5.0V system. Product Pin Configuration OE O0 D0 D1 O1 O2 D2 D3 O3 GND Logic Block Diagram OE CP D0 D V O0 CP 1 2 3 4 5 6 7 8 9 10 20-Pin L, Q, S 20 19 18 17 16 15 14 13 12 11 Vcc O7 D7 D6 O6 O5 D5 D4 O4 CP TO 7 OTHER CHANNELS Truth Table(1) DN H L X Product Pin Description Inputs CP ↑ ↑ X OE L L H Outputs ON H L Z Note: 1. H = High Voltage Level, X = Dont Care, L = Low Voltage Level, Z = High Impedance,↑ LOW-to-HIGH Transition 1 Pin Name OE CP Description Output Enable Input (Active LOW) Clock Pulse, LOW-to-HIGH Transition D7-D0 O7-O0 GND VCC Data Inputs 3-State Outputs Ground Power PS8503 10/12/00 PI74LPT374 Fast CMOS 3.3V Octal D Flip-Flop 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 Maximum Ratings (Above which the useful life may be impaired. For user guidelines, not tested.) Storage Temperature ........................................................... 65°C to +150°C Ambient Temperature with Power Applied ........................... 40°C to +85°C Supply Voltage to Ground Potential (Inputs & Vcc Only) ..... 0.5V to +7.0V Supply Voltage to Ground Potential (Outputs & D/O Only) .. 0.5V to +7.0V DC Input Voltage ................................................................... 0.5V to +7.0V DC Output Current ............................................................................ 120 mA Power Dissipation ................................................................................. 1.0W Note: Stresses greater than those listed under MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. DC Electrical Characteristics (Over the Operating Range, TA = 40°C to +85°C, VCC = 2.7V to 3.6V) Parameters IOZH IOZL VIK IODH IODL VOH Input HIGH Voltage (Input pins) Input HIGH Voltage (I/O pins) Input LOW Voltage (Input and I/O pins) Input HIGH Current (Input pins) Input HIGH Current (I/O pins) Input LOW Current (Input pins) Input LOW Current (I/O pins) High Impedance Output Current (3-State Output pins) Clamp Diode Voltage Output HIGH Current Output LOW Current Output HIGH Voltage VOL Output LOW Voltage IOS IOFF VH Short Circuit Current(4) Power Down Disable Input Hysteresis VIH VIL IIH IIL Test Conditions(1) Description Guaranteed Logic HIGH Level Guaranteed Logic LOW Level VCC = Max. VIN = 5.5V VCC = Max. VIN = VCC VCC = Max. VIN = GND VCC = Max. VIN = GND VCC = Max. VOUT = 5.5V VCC = Max. VOUT = GND VCC = Min., IIN = 18 mA VCC = 3.3V, VIN = VIH or VIL, VO = 1.5V(3) VCC = 3.3V, VIN = VIH or VIL, VO = 1.5V(3) VCC = Min. IOH = 0.1 mA VIN = VIH or VIL IOH = 3 mA VCC = 3.0V, IOH = 8 mA VIN = VIH or VIL IOH = 24 mA VCC = Min. IOL = 0.1 mA VIN = VIH or VIL IOL = 16 mA IOL = 24 mA VCC = Max.(3), VOUT = GND VCC = 0V, VIN or VOUT £ 4.5V Min. Typ(2) Max. Units 2.2 2.0 0.5 5.5 5.5 0.8 V V V 36 50 VCC-0.2 2.4 2.4(5) 2.0 60 0.7 60 90 3.0 3.0 0.2 0.3 85 150 ±1 ±1 ±1 ±1 ±1 ±1 1.2 110 200 0.2 0.4 0.5 240 ±100 µA µA µA µA µA µA V mA mA V V V V V V mA µA mV Notes: 1. For Max. or Min. conditions, use appropriate value specified under Electrical Characteristics for the applicable device type. 2. Typical values are at VCC = 3.3V, +25°C ambient and maximum loading. 3. Not more than one output should be shorted at one time. Duration of the test should not exceed one second. 4. This parameter is guaranteed but not tested. 5. VOH = VCC 0.6V at rated current. Capacitance (TA = 25°C, f = 1 MHz) Parameters(1) CIN C OUT Description Test Conditions Typ Max. Units Input Capacitance Output Capacitance VIN = 0V VOUT = 0V 4.5 5.5 6 8 pF pF Note: 1. This parameter is determined by device characterization but is not production tested. 2 PS8503 10/12/00 PI74LPT374 Fast CMOS 3.3V Octal D Flip-Flop 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 Power Supply Characteristics Parameters Description ICC ∆ICC ICCD IC Quiescent Power Supply Current Quiescent Power Supply Current TTL Inputs HIGH Dynamic Power Supply(4) Total Power Supply Current(6) Test Conditions(1) VCC = Max. Min. VIN = GND or VCC (3) Typ(2) Max. Units 0.1 10 µA VCC = Max. VIN = VCC 0.6V 2.0 30 µA VCC = Max., Outputs Open OE = GND One Bit Toggling 50% Duty Cycle VIN = VCC VIN = GND 50 75 µA/ MHz VCC = Max., Outputs Open fI = 10 MHZ 50% Duty Cycle OE = GND One Bit Toggling VIN = VCC 0.6V VIN = GND 0.6 VCC = Max., Outputs Open fI = 2.5 MHZ 50% Duty Cycle OE = GND 8 Bits Toggling VIN = VCC 0.6V VIN = GND 2.3 mA 1 2 3 4 5 2.1 4.7(5) 6 7 Notes: 1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device. 2. Typical values are at VCC = 3.3V, +25°C ambient. 3. Per TTL driven input; all other inputs at VCC or GND. 4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations. 5. Values for these conditions are examples of the ICC formula. These limits are guaranteed but not tested. 6. IC =IQUIESCENT + IINPUTS + IDYNAMIC IC = ICC + ∆ICC DHNT + ICCD (fCP/2 + fI NI) ICC = Quiescent Current (ICCL, ICCV and ICCZ) ∆ICC = Power Supply Current for a TTL High Input DH = Duty Cycle for TTL Inputs High NT = Number of TTL Inputs at DH ICCD = Dynamic Current Caused by an Input Transition Pair (HLH or LHL) fCP= Clock Frequency for Register Devices (Zero for Non-Register Devices) NCP = Number of Clock Inputs at fCP fI = Input Frequency NI = Number of Inputs at fI All currents are in milliamps and all frequencies are in megahertz. 8 9 10 11 12 13 14 15 3 PS8503 10/12/00 PI74LPT374 Fast CMOS 3.3V Octal D Flip-Flop 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 Switching Characteristics over Operating Range (1) LPT374 LPT374A Com. Parameters Description FMAX Maximum Clock Frequency tPHL tP LH Propagation Delay xCLK to xOx tPZH tPZL Conditions (2) Min. (3) Com. Max. 150 C L = 50 pF R L = 500Ω LPT374C Min. (3) Com. Max. 150 Min. (3) Max. 150 Units MHz 2.0 8.0 2.0 5.5 2.0 4.5 ns Output Enable Time xOE to xOx 1.5 8.5 1.5 6.5 1.5 5.5 ns tPHZ tPLZ Output Disable Time(4) xOE to xOx 1.5 8.5 1.5 5.5 1.5 5.0 ns t SU Setup Time HIGH or LOW, xDx to xCLK 2.0 2.0 2.0 ns tH Hold Time HIGH or LOW, xDx to xCLK 1.5 1.5 1.5 ns tW xCLK Pulse Width(4) HIGH 7.0 5.0 5.0 ns t SK (o) Output Skew (5) 0.5 0.5 0.5 ns Notes: 1. Propagation Delays and Enable/Disable times are with VCC = 3.3V ±0.3V, normal range. For VCC = 2.7V, extended range, all Propagation Delays and Enable/Disable times should be degraded by 20%. 2. See test circuit and waveforms. 3. Minimum limits are guaranteed but not tested on Propagation Delays. 4. This parameter is guaranteed but not production tested. 5. Skew between any two outputs, of the same package, switching in the same direction. This parameter is guaranteed by design. Pericom Semiconductor Corporation 2380 Bering Drive • San Jose, CA 95131 • 1-800-435-2336 • Fax (408) 435-1100 • http://www.pericom.com 4 PS8503 10/12/00