PI74LPT16373 Fast CMOS 3.3V 16-Bit Transparent Latch Features Description • Compatible with LCX™ and LVT™ families of products • Supports 5V Tolerant Mixed Signal Mode Operation – Input can be 3V or 5V – Output can be 3V or connected to 5V bus • Advanced Low Power CMOS Operation • Excellent output drive capability: Balanced drives (24 mA sink and source) • Pin compatible with industry standard double-density pinouts • Low ground bounce outputs • Hysteresis on all inputs • Industrial operating temperature range: –40°C to +85°C • Multiple center pins and distributed Vcc/GND pins minimize switching noise • Packaging: – 48-pin 240-mil wide thin plastic TSSOP (A) – 48-pin 300-mil wide plastic SSOP (V) Pericom Semiconductor’s PI74LPT16373 is a 16-bit transparent latch designed with 3-state outputs and are intended for bus oriented applications. The Output Enable and Latch Enable controls are organized to operate as two 8-bit latches or one 16-bit latch. When Latch Enable (LE) is HIGH, the flip-flops appear transparent to the data. The data that meets the set-up time when LE is LOW is latched. When OE is HIGH, the bus output is in the high impedance state. The PI74LPT16373 can be driven from either 3.3V or 5.0V devices allowing this device to be used as a translator in a mixed 3.3/5.0V system. Block Diagram 1OE 2OE 1LE 2LE 1D0 2D0 D D 1O0 C 2O0 C TO 7 OTHER CHANNELS TO 7 OTHER CHANNELS 1 PS2069C 10/05/04 PI74LPT16373 3.3V 16-Bit Transparent Latch Maximum Ratings (Above which the useful life may be impaired. For user guidelines, not tested.) Storage Temperature ............................................................. –55°C to +125°C Ambient Temperature with Power Applied ............................ –40°C to +85°C Supply Voltage to Ground Potential (Inputs & VCC Only)...... –0.5V to +7.0V Supply Voltage to Ground Potential (Outputs & D/O Only) ... –0.5V to +7.0V DC Input Voltage ..................................................................... –0.5V to +7.0V DC Output Current............................................................................... 120 mA Power Dissipation .................................................................................... 1.0W Pin Configuration 1OE Note: Stresses greater than those listed under MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. Truth Table Inputs(1) Outputs(1) 1 2 48 47 1LE xDx xLE xOE xOx 1D 0 46 45 44 43 1D 1 H H L H GND 1O 2 1O 3 3 4 5 6 GND 1D 2 1D 3 L H L L X X H Z VCC 1O 4 1O 5 7 8 9 42 41 40 VCC 1D 4 1D 5 GND 1O 6 10 11 39 38 GND 1D 6 1O 7 12 37 1D 7 2O 0 13 14 15 36 35 34 2D 0 2O 3 VCC 2O 4 16 17 18 19 33 32 31 30 1O 0 1O 1 2O 1 GND 2O 2 Note: 1. H = High Voltage Level, X = Don't Care, L = Low Voltage Level, Z = High Impedance Pin Description Pin Name xOE xLE xDx xOx GND VCC 2D 1 GND 2D 2 2D 3 VCC 2D 4 2O 5 20 29 2D 5 GND 2O 6 2O 7 21 22 23 28 27 26 GND 2D 6 2D 7 2OE 24 25 2LE 2 Description 3-State Output Enable Inputs (Active LOW) Latch Enable Inputs (Active HIGH) Data Inputs 3-State Outputs Ground Power PS2069C 10/05/04 PI74LPT16373 3.3V 16-Bit Transparent Latch Capacitance (TA = 25°C, f = 1 MHz) Parameters(1) Description Test Conditions Typ Max. CIN Input Capacitance VIN = 0V 4.5 6 COUT Output Capacitance VOUT = 0V 5.5 8 Units pF Note: 1. This parameter is determined by device characterization but is not production tested. DC Electrical Characteristics (Over the Operating Range, TA = –40°C to +85°C, VCC = 2.7V to 3.6V) Parameters VIH Test Conditions(1) Description Input HIGH Voltage (Input pins) Input HIGH Voltage (I/O pins) Guaranteed Logic HIGH Level Min. Typ(2) Max. 2.2 — 5.5 2.0 — 5.5 –0.5 — 0.8 Input LOW Voltage (Input and I/O pins) Guaranteed Logic LOW Level Input HIGH Current (Input pins) VCC = Max. VIN = 5.5V — — ±1 Input HIGH Current (I/O pins) VCC = Max. VIN = VCC — — ±1 Input LOW Current (Input pins) VCC = Max. VIN = GND — — ±1 Input LOW Current (I/O pins) VCC = Max. VIN = GND — — ±1 IOZH High Impedance Output Current VCC = Max. VOUT = 5.5V — — ±1 IOZL (3-State Output pins) VCC = Max. VOUT = GND — — ±1 VIK Clamp Diode Voltage VCC = Min., IIN = –18mA — –0.7 –1.2 IODH Output HIGH Current VCC = 3.3V, VIN = VIH or VIL, VO = 1.5V(3) –36 –60 –110 IODL Output LOW Current VCC = 3.3V, VIN = VIH or VIL, VO = 1.5V(3) 50 90 200 VIL IIH IIL VOH VOL Output HIGH Voltage Output LOW Voltage Current(4) IOS Short Circuit IOFF Power Down Disable VH Input Hysteresis Units V µA V mA IOL = –0.1 mA VCC-0.2 IOL = –3 mA 2.4 — — 3.0 — VCC = 3.0V, VIN = VIH or VIL IOL = –8 mA 2.4(5) 3.0 — IOL = –24 mA 2.0 — — VCC = Min. IOL = 0.1 mA — — 0.2 VIN = VIH or VIL IOL = 16 mA — 0.2 0.4 IOL = 24 mA — 0.3 0.5 VCC = Max.(3), VOUT = GND –60 –85 –240 mA VCC = 0V, VIN or VOUT ≤ 4.5V — — ±100 µA — 150 — mV VCC = Min. VIN = VIH or VIL V Notes: 1. For Max. or Min. conditions, use appropriate value specified under Electrical Characteristics for the applicable device type. 2. Typical values are at VCC = 3.3V, +25°C ambient and maximum loading. 3. Not more than one output should be shorted at one time. Duration of the test should not exceed one second. 4. This parameter is guaranteed but not tested. 5. VOH = VCC – 0.6V at rated current. 3 PS2069C 10/05/04 PI74LPT16373 3.3V 16-Bit Transparent Latch Power Supply Characteristics Parameters ICC ∆ICC ICCD IC Description Quiescent Power Supply Current Test Conditions(1) VCC = Max. VIN = GND or VCC Quiescent Power Supply Current TTL Inputs HIGH VCC = Max. VIN = VCC – 0.6V(3) Dynamic Power Supply(4) VCC = Max., Outputs Open XOE = GND xLE = Vcc One Bit Toggling 50% Duty Cycle VIN = VCC VIN = GND Total Power Supply Current(6) VCC = Max., Outputs Open fI = 10 MHZ 50% Duty Cycle XOE = GND One Bit Toggling VIN = VCC – 0.6V VIN = GND Min. Typ(2) Max. 0.1 10 Units µA 500 50 75 µA/ MHz 0.6 XLE = VCC 2.3 mA VCC = Max., Outputs Open fI = 2.5 MHZ 50% Duty Cycle XOE = GND 16 Bits Toggling VIN = VCC – 0.6V VIN = GND 2.1 XLE = 4.7(5) VCC Notes: 1. For Max. or Min. conditions, use appropriate value specified under Electrical Characteristics for the applicable device. 2. Typical values are at VCC = 3.3V, +25°C ambient. 3. Per TTL driven input; all other inputs at Vcc or GND. 4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations. 5. Values for these conditions are examples of the Icc formula. These limits are guaranteed but not tested. 6. IC =IQUIESCENT + IINPUTS + IDYNAMIC IC = ICC + ΔICC DHNT + ICCD (fCP/2 + fINI) ICC = Quiescent Current (ICCL, ICCH and ICCZ) ΔICC = Power Supply Current for a TTL High Input DH = Duty Cycle for TTL Inputs High NT = Number of TTL Inputs at DH ICCD = Dynamic Current Caused by an Input Transition Pair (HLH or LHL) fCP = Clock Frequency for Register Devices (Zero for Non-Register Devices) NCP = Number of Clock Inputs at fCP fI = Input Frequency NI = Number of Inputs at fI All currents are in milliamps and all frequencies are in megahertz. 4 PS2069C 10/05/04 PI74LPT16373 3.3V 16-Bit Transparent Latch Switching Characteristics over Operating Range(1) LPT16373 Parameters Description Conditions(2) LPT16373A Com. Min(3) LPT16373C Com. Max Min(3) Com. Units Max Min(3) Max tPLH tPHL Propagation Delay xDx to xOx 1.5 7.0 1.5 5.2 1.5 4.2 tPLH Propagation Delay xLE to xOx 2.0 7.0 2.0 6.5 2.0 5.5 Output Enable Time xOE to xOx 1.5 7.2 1.5 6.5 1.5 5.5 1.5 7.2 1.5 5.5 1.5 5.0 tPHL tPZH tPZL CL = 50pF RL = 500Ω tPHZ tPLZ Output Disable Time(4) xOE to xOx tSU Setup Time HIGH or LOW, xDx to xLE 2.0 2.0 2.0 tH Hold Time HIGH or LOW, xDx to xLE 1.5 1.5 1.5 tW xLE Pulse Width(4) HIGH 6.0 5.0 5.0 tSK(O) Output Skew(5) 0.5 0.5 ns 0.5 Notes: 1. Propagation Delays and Enable/Disable times are with VCC = 3.3V ±0.3V, normal range. For VCC = 2.7V, extended range, all Propagation Delays and Enable/Disable times should be degraded by 20%. 2. See test circuit and waveforms. 3. Minimum limits are guaranteed but not tested on Propagation Delays. 4. This parameter is guaranteed but not production tested. 5. Skew between any two outputs, of the same package, switching in the same direction. This parameter is guaranteed by design. 5 PS2069C 10/05/04 PI74LPT16373 3.3V 16-Bit Transparent Latch Packaging Mechanical: 48-pin TSSOP (L) 48 .236 .244 1 6.0 6.2 .488 12.4 .496 12.6 .047 1.20 Max SEATING PLANE .004 0.09 .008 0.20 X.XX X.XX DENOTES DIMENSIONS IN MILLIMETERS .0197 BSC 0.50 0.45 .018 0.75 .030 .002 .006 0.05 0.15 .007 .010 0.17 0.27 .319 BSC 8.1 Packaging Mechanical: 48-pin SSOP (V) 48 .291 .299 7.39 7.59 .395 .420 10.03 10.67 Gauge Plane .010 0.25 .02 0.51 .04 1.01 1 .620 .630 15.75 16.00 .015 0.381 x 45˚ .025 0.635 .008 0.20 Nom. .110 2.79 Max .025 BSC 0.635 .008 0.20 .0135 0.34 0-8˚ .008 0.20 .016 0.40 X.XX DENOTES DIMENSIONS X.XX IN MILLIMETERS 6 PS2069C 10/05/04 PI74LPT16373 3.3V 16-Bit Transparent Latch Ordering Information Ordering Code PI74LPT16373A Package Code A Speed Grade Blank Description 48-pin 173 mil wide plastic TSSOP PI74LPT16373AA A A 48-pin 173 mil wide plastic TSSOP PI74LPT16373AV V A 48-pin 300 mil wide plastic SSOP PI74LPT16373CA A C 48-pin 173 mil wide plastic TSSOP PI74LPT16373CV V C 48-pin 300 mil wide plastic SSOP Notes: 1. Thermal characteristics can be found on the company web site at www.pericom.com/packaging/ Pericom Semiconductor Corporation • 1-800-435-2336 • www.pericom.com 7 PS2069C 10/05/04