PI90LV019 PI90LVB019 PI90LVT019 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 Single Bus LVDS Transceiver Features Description The PI90LVx019 family, differential line drivers and receivers (transceivers), is similar to IEEE1596.3 SCI and ANSI/TIA/ EIA-644LVDS standards (the difference is the driver output current is higher). This modification enables true half-duplex operation with more than one LVDS driver or with two line transmission resistors over a 50 ohm differential transmission line. The logic interface provides maximum flexibility resulting from four separate lines that are provided: DIN, DE, RE, and ROUT. These devices also feature flow through which allows easy PCB routing for short stubs between the bus pins and the connector. The driver has 10mA drive capability, allowing it to drive heavily loaded backplanes, with impedance as low as 27 ohms. Bus LVDS Signaling (BLVDS): PI90LVB019 Designed for double Termination Applications Balanced Output Impedance Light Bus Loading: 5pF typical Glitch-free power up/Down (Driver Disabled) High Signaling Rate Capability: >500 Mbps Driver: ±350mV Differential Swing into: 100 ohm load (PI90LV019) 50 ohm load (PI90LVB19) Receiver: Integrated 110 ohm termination (PI90LVT019 only) Accepts ±50mV (min.) Differential Swing with up to 2.0V ground potential difference Propagation Delay of 3.3ns typ. Low Voltage TTL (LVTTL) Outputs Open, Short, and Terminated Fail Safe Bus terminal ESD exceeds 9kV Industrial Temperature Operation (40°C to +85°C) Packaging: 14-lead SOIC (W) and 14-lead TSSOP (L) The driver translates between TTL levels (single-ended) to Low Voltage Differential Signaling levels. This allows for high-speed operation, while consuming minimal power with reduced EMI. In addition the differential signaling provides common mode noise rejection of ±1V. Pin Configuration Block Diagram D0+ DIN D0 DE DE 1 14 VCC DIN 2 13 NC NC 3 14-Pin 12 4 L, W 11 ROUT RE RI+ ROUT RI PI90LVT019 Only 1 DO+ DO– NC 5 10 RI+ NC 6 9 RI– GND 7 8 RE PS8614 04/19/02 PI90LV019/PI90LVB019/PI90LVT019 Single Bus LVDS Transceiver 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 Absolute Maximum Ratings(1,2) Supply Voltage (VCC) ............................................................ 3.6V Enable Input Voltage (DE, RE) .................... 0.3V to (VCC +0.3V) Driver Input Voltage (DIN) .......................... 0.3V to (VCC +0.3V) Receiver Output Voltage (ROUT) ................ 0.3V to (VCC +0.3V) Bus Pin Voltage (DO/RI±) ...................................... 0.3V to +3.9V Driver Short Circuit .................................................... Continuous ESD (HBM 1.5kohms, 100pF) ............................................... >9kV Maximum Package Power Dissipation at 20°C SOIC ............................................................................. 1025mW Derate SOIC Package ................................................. 8.2mW/°C Storage Temperature Range ............................... 65°C to +150°C Lead Temperature Range (Soldering, 4s) ........................... +260°C Recommended Operating Conditions Supply Voltage (VCC) Receiver Input Voltage Operating Free-Air Temperature Min. 3.0 0.0 40 Max. 3.6 2.9 +85 Units V V °C Note: Stresses greater than those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. Table 2. Transmitter Mode Table 1. Functional Mode M ode Se le cte d Inputs Outputs DE RE Driver Mode H H DE DI DO+ DO Receiver Mode L L H L L H 3- State Mode L H H H H L Full Duplex Mode H L H 2 > & > 0.8 X X L X Z Z Table 4. Device Pin Description Table 3. Receiver Mode Inputs Pin Name Outputs RE (RI+) - (RI) L L (< 100mV) L L H (> +100mV) H L 100mV > & > 100mV X H X Z DIN Pin Inputs / # Outputs 2 DO ±RI± 6,7 2 I D e s cription TTL Driver Input I/O LVDS Driver O utputs/ LVDS Receiver Inputs ROUT 3 O TTL Receiver O utput RE 5 I Receiver Enable TTL Input (Active Low) DE 1 I Driver Enable TTL Input (Active High) GND 4 NA Ground VCC 8 NA Power Supply PS8614 04/19/02 PI90LV019/PI90LVB019/PI90LVT019 Single Bus LVDS Transceiver 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 DC Electrical Characteristics(2,3) TA = 40°C to +85°C, unless otherwise noted. VCC = 3.3V ±0.3V(2,3) Symbol Parame te r Conditions Pin M in. Typ. M ax. Units 250 350 450 6 60 1.25 1.7 V 5 60 mV D IFFER N TIAL D R IVER CHAR ACTER ISTICS VO D ∆VO D VO S O utput Differential Voltage VO D Magnitude Change O ffset Voltage RL = 100 ohms, (LV) Figure 1 RL = 50 ohms, (LVB) DO + DO 1 ∆VO S O ffset Magnitude Change IO ZD High Impedance Leakage VO UT = VC C or GN D, DE = 0V 10 ±1 +10 IO XD Power- O ff Leakage VO UT = 3.6V or GN D, VC C = 0V 10 ±1 +10 IO S D O utput Short Circuit Current VO UT = 0V, DE = VC C LV 10 6 4 LVB 20 IO H = 400µA 2.9 3.3 2.9 3.3 0.1 0.4 75 34 20 9 mV µA mA D IFFER N TIAL R ECEIVER CHAR ACTER ISTICS VO H Voltage O utput High VID = +100mV Inputs O pen VO L Voltage O utput Low IO L = 2.0mA, VID = 100mV IO S O utput Short Circuit Current VO UT = 0V VTH Input Threshold High VTL Input Threshold Low IIN Input Current RO UT VIN = +2.4V, or 0V VC C = 3.6V or 0V RI+ RI V +100 100 10 ±1 ±10 mA mV µA D EVICE CHAR ACTER ISTICS VIH Minimum Input High Voltage 2.0 VC C VIL Minimum Input Low Voltage GN D 0.8 IIH Input High Current VIN = VC C or 2.4V IIL Input Low Current VIN = GN D or 0.4V VC L Input Diode Clamp Voltage IC LAM P = 18mA IC C N o Load Driver Enabled DIN = VC C or GN D DE = VC C = RE IC C L IC C Z Loaded driver enabled N o Load driver disabled DIN , DE, RE 1.5 CRinput Capacitance RTERM Termination Input Resistance (PI90LVT019) +10 0.7 LVB 6.0 19.0 20 30 35 45 2.2 8.0 3.0 8.0 VC C DO +, DO 5 RI+, RI 5 RI+, RI 90 110 µA V 8.0 LVB DIN = VC C or GN D ±1 4.0 LV CDoutput Capacitance +10 LV RL = 100 ohms (all channels) LV DIN = VC C or GN D (all inputs) LVB DE = VC C , RE = GN D DIN = VC C or GN D, DE = GN D, RE = VC C ±1 V mA pF 132 Ω Notes: 1. Absolute Maximum Ratings are those values beyond which the safety of the device cannot be guaranteed. They are not meant to imply that the devices should be operated at these limits. The table of Electrical Characteristics specifies conditions of device operation. 2. All currents into device pins are positive, all currents out of device pins are negative. All voltages are referenced to ground except: VOD, VID, VTH, and VTL, unless otherwise specified. 3. All typicals are given for VCC = +3.3V and TA = +25°C unless otherwise stated. Notes continued on next page... 3 PS8614 04/19/02 PI90LV019/PI90LVB019/PI90LVT019 Single Bus LVDS Transceiver 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 Notes (continued): 4. ESD Rating: HBM (15kohms, 100pF) > 2.0kV EAT (0 ohm, 200pF) >300V. 5. CL includes probe and fixture capacitance. 6. Generator waveforms for all tests unless otherwise specified: f = 1MHz, ZO = 50 ohms, tr, tf ≤ 6.0ns (0% - 100%) on control pins and ≤ 1.0ns for RI inputs. 7. The PI90LVT019 is a current mode device and only functions with datasheet specification when a resistive load is appplied between the driver outputs. 8. For receiver disable delays, the switch is set to VCC for tPZL, and tPLZ and to GND for tPZH and tPHZ. AC Electrical Characteristics TA = 40°C to +85°C, VCC = 3.3V ±0.3V(6) Symbol Parame te r Conditions M in. Typ. M ax. 2.0 4.0 6.5 1.0 5.6 7.0 0.4 1.0 Units Drive r Timing Re quire me nts tPHLD Differential Propagation Delay High to Low tPLHD Differential Propagation Delay Low to High tSK D Differential Skew ItPHLD - tPLHDI tTLH Transition Time Low to High 0.2 0.7 3.0 tTHL Transition Time High to Low 0.2 0.8 3.0 tPHZ Disable Time High to Z 1.5 4.0 8.0 tPLZ Disable Time Low to Z 2.5 5.3 9.0 tPZH Enable Time Z to High 4.0 6.0 8.0 tPZL Enable Time Z to Low 3.5 6.0 8.0 1.3 2.1 3.0 1.3 2.1 3.0 0.5 2.0 RL = 100 ohms (LV) RL = 50 ohms (LVB) CL = 10pF (Figures 2 & 3) RL = 100 ohms (LV) RL = 50 ohms (LVB) CL = 10pF (Figures 2 & 3) ns Re ce ive r Timing Re quire me nts tPHLD Differential Propagation Delay High to Low tPLHD Differential Propagation Delay Low to High tSK D Differential Skew ItPHLD - tPLHDI CL = 10pF VID = 200mV Figures 6 & 7 tr Rise Time 0.8 1.4 tf Fall Time 0.8 1.4 3.0 4.0 6.0 3.0 4.5 6.0 3.0 6.0 8.0 3.0 6.0 8.0 tPHZ Disable Time High to Z tPLZ Disable Time Low to Z tPZH Enable Time Z to High tPZL Enable Time Z to Low RL = 500 ohms CL = 10pF Figures 8 & 9 4 PS8614 ns 04/19/02 PI90LV019/PI90LVB019/PI90LVT019 Single Bus LVDS Transceiver 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 Test Circuits and Timing Waveforms DO+ RL/2 2V DIN VOS VOD 0.8V S1 RL/2 Driver Enabled DO– Figure 1. Differential Driver DC Test Circuit CL DO+ DIN Pulse Generator RL DO– 50ohm Driver Enabled CL Figure 2. Differential Driver Propagation Delay and Transition Time Test Circuit 3V DIN 0V 1.5V 1.5V tPHLD DOUT+,DOUT- tPLHD 0V 0V (Differential) DO+ 0V DO– 80% (DO+) - (DO–) 80% 0V 0V 20% 20% tTLH tTHL tDIFF = (DO+) - (DO–) Figure 3. Driver Propagation Delay and Transition Time Waveforms 5 PS8614 04/19/02 PI90LV019/PI90LVB019/PI90LVT019 Single Bus LVDS Transceiver 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 Test Circuits and Timing Waveforms (continued) DO+ CL 2.0 RL/2 DIN 0.8 +1.2V RL/2 DE Pulse Generator DO– 50ohm CL Figure 4. Driver Three-State Delay Test Circuit 3V 1.5V DE 1.5V 0V tPHZ tPZH DO – (DI=L) VOH DO + (DI=H) 50% 50% 1.2V tPLZ DO – (DI=H) DO + (DI=L) 1.2V VOH 50% 50% VOL tPZL Figure 5. Driver Three-State Delay Waveforms RI+ Pulse Generator W W + – RO RI– CL 50 50 Figure 6. Receiver Propagation Delay and Transistion Time Test Circuit RI– +1.3V VID = 200mV 0V (Differential) (1.2V CM) +1.1V RI+ tPLH tPHL 80% 80% 1.5V 1.5V VO 20% 20% tTLH tTHL Figure 7. Receiver Propagation Delay and Transistion Time Waveforms 6 PS8614 04/19/02 PI90LV019/PI90LVB019/PI90LVT019 Single Bus LVDS Transceiver 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 Test Circuits and Timing Waveforms (continued) RI+ + RI– – R CL 500ohm RE Pulse Generator VCC 50ohm Figure 8. Receiver 3-State Delay Test Circuit 3V RE 1.5V 1.5V 0V tPHZ tPZH VOH VOH 50% VOH –0.5 GND ROUT tPZL tPLZ VOH VCC 50% VOL +0.5 VOL VOL Figure 9. Receiver 3-State Delay Waveforms Typical Bus Application Configurations DO+ DO+ DIN DIN DO– DO– DE DE RE RE RI+ + ROUT RI+ + ROUT 100 ohms – RI– RI– PI90LV019 – PI90LVT019 Figure 10. Bidirectional Half-Duplex Point-to-Point Applications DO+ RI+ DO– RI– ROUT DIN RE DE RE DE + RI+ DO+ RI– DO– ROUT – DIN PI90LVT019 PI90LVT019 Figure 11. Full-Duplex Point-to-Point Application 7 PS8614 04/19/02 PI90LV019/PI90LVB019/PI90LVT019 Single Bus LVDS Transceiver 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 14-Pin SOIC Package 14 .149 .157 0.25 x 45˚ 0.50 .0099 .0196 3.78 3.99 .0075 .0098 0-8˚ 1 0.41 1.27 .336 .344 8.55 8.75 .0155 .026 0.393 0.660 .053 .068 X.XX DENOTES DIMENSIONS X.XX IN MILLIMETERS SEATING PLANE .050 BSC 1.27 .013 .020 0.330 0.508 .016 .050 .2284 .2440 5.80 6.20 1.35 1.75 REF 0.19 0.25 .0040 0.10 .0098 0.25 14-Pin TSSOP Package 14 0.004 0.09 0.008 0.20 0.169 0.177 4.3 4.5 0.45 0.75 0.018 0.030 0.240 0.264 1 0.193 0.201 4.90 5.10 6.1 6.7 0.047 1.20 max. SEATING PLANE 0.0256 typical 0.65 0.007 0.012 0.19 0.30 X.XX DENOTES DIMENSIONS X.XX IN MILLIMETERS 0.002 0.05 0.006 0.15 Ordering Information Part Pin - Package Te mpe rature PI90LV019W 14 - SOIC 40°C to 85°C PI90LVT019W 14 - SOIC 40°C to 85°C PI90LVB019W 14 - SOIC 40°C to 85°C PI90LV019L 14 - TSSO P 40°C to 85°C PI90LVT019L 14 - TSSO P 40°C to 85°C PI90LVB019L 14 - TSSO P 40°C to 85°C Pericom Semiconductor Corporation 2380 Bering Drive San Jose, CA 95131 1-800-435-2336 Fax (408) 435-1100 http://www.pericom.com 8 PS8614 04/19/02