PI90LVB010 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 Single Bus LVDS Transceiver Features Description • • • • • • • • The PI90LVB010 is a differential line driver and receiver (transceiver) that is similar to the IEEE1596.3 SCI and ANSI/TIA/EIA644LVDS standards (the difference is that the driver output current is higher). This modification enables true half-duplex operation with more than one LVDS driver or with two line transmission resistors over a 50-Ohm differential transmission line. To minimize bus loading, the driver outputs and receiver inputs are internally connected. The logic interface provides maximum flexibility resulting from four separate lines that are provided: DIN, DE, RE, and ROUT. • • • • Bus LVDS Signaling (BLVDS) Designed for Double Termination Applications Balanced Output Impedance Light Bus Loading: 5pF typical Glitch-free power up/down (Driver Disabled) Operates from a 3.3V supply High Signaling Rate Capability: >100Mbps Driver: – ±250mV Differential Swing into a 27 Ohm load – Propagation Delay of 1.5ns typ. – Low Voltage TTL (LVTTL) Inputs are 5V Tolerant – Driver is High Impedance when disabled or VCC <1.5V Receiver: – Accepts ±50mV (min.) Differential Swing with up to 2.0V ground potential difference – Propagation Delay of 3.3ns typ. – Low Voltage TTL (LVTTL) Outputs – Open, Short, and Terminated Fail Safe Bus terminal ESD exceeds 10kV Industrial Temperature Operation (–40°C to +85°C) Packaging: 8-lead SOIC (W), and 8-lead MSOP (U) This device also feature flow-through which allows easy PCB routing for short stubs between the bus pins and the connector. The driver has 10mA drive capability, allowing it to drive heavily loaded backplanes, with impedance as low as 27-Ohms. The driver translates between TTL levels (single-ended) to Low Voltage Differential Signaling levels. This allows for high-speed operation, while consuming minimal power with reduced EMI. In addition the differential signaling provides common mode noise rejection of ±1V. Pin Configuration Block Diagram D0+/RI+ DIN D0–/RI– DE RE DE 1 DIN 2 ROUT 3 GND 4 8-Pin U,W 8 VCC 7 DO+/RI+ 6 DO–/RI– 5 RE ROUT 1 PS8662 01/20/03 PI90LVB010 Single Bus LVDS Transceiver 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 Table 2. Transmitter Mode Table 1. Functional Mode M ode Se le cte d Inputs Outputs DE RE Driver Mode H H DE DI DO+ DO– Receiver Mode L L H L L H 3- State Mode L H H H H L Loop Back Mode H L H 2 > & > 0.8 X X L X Z Z H Open L H Table 3. Receiver Mode Inputs Table 4. Device Pin Description Outputs RE (RI+) - (RI–) ROUT Pin Name L L (< –100mV) L DIN L H (> +100mV) H L 100mV > & > –100mV ? H X Z Pin Inputs / # Outputs 2 DO±RI± 6,7 Notes: H = High L = Low Z = High Impedance X = High or Low 2 I I/O De s cription TTL Driver Input LVDS Driver Outputs/ LVDS Receiver Inputs ROUT 3 O TTL Receiver Output RE 5 I Receiver Enable TTL Input (Active Low) DE 1 I Driver Enable TTL Input (Active High) GND 4 NA Ground VCC 8 NA Power Supply PS8662 01/20/03 PI90LVB010 Single Bus LVDS Transceiver 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 Absolute Maximum Ratings(1,2) Supply Voltage (VCC) ............................................................ 6.0V Enable Input Voltage (DE, RE) .................... –0.3V to (VCC +0.3V) Driver Input Voltage (DIN) .......................... –0.3V to (VCC +0.3V) Receiver Output Voltage (ROUT) ................ –0.3V to (VCC +0.3V) Bus Pin Voltage (DO/RI±) ...................................... –0.3V to +3.9V Driver Short Circuit .................................................... Continuous ESD (HBM 1.5kohms, 100pF) ............................................. >10kV Maximum Package Power Dissipation at 20°C SOIC ............................................................................. 1025mW Derate SOIC Package ................................................. 8.2mW/°C Storage Temperature Range ............................... –65°C to +150°C Lead Temperature Range (Soldering, 4s) ........................... +260°C Recommended Operating Conditions Min. 3.0 0.0 –40 Supply Voltage (VCC) Receiver Input Voltage Operating Free-Air Temperature Max. 3.6 2.9 +85 Units V V °C Note: Stresses greater than those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. DC Electrical Characteristics(2,3) (TA = –40°C to +85°C, unless otherwise noted. VCC = 3.3V ±0.3V) Symbol Parame te r VOD Output Differential Voltage ∆VOD VOD Magnitude Change VOS Offset Voltage ∆VOS Offset Magnitude Change IOSD Output Short Circuit Current VOH Voltage Output High Conditions RL = 27 ohms, Figure 1 Pin M in. Typ. M a x. Units DO+/RI+ DO–/RI– 14 0 250 360 mV 3 30 1. 2 5 1.65 V 5 50 mV –12 –20 mA 1 VO = 0V, DE = VCC VID = +100mV IOH = –400µA 2.8 3 2.8 3 Inputs Shorted 2.8 3 Inputs Terminated, RL = 27 ohms 2.8 3 Inputs Open VOL Voltage Output Low IOL = 2.0mA, VID = –100mV IOS Output Short Circuit Current VOUT = 0V, VID = +100V VTH Input Threhold High DE = 0V VTL Input Threhold Low IIN Input Current ROUT –5 DO+/RI+ DO–/RI– V 0.1 0.4 –35 –85 mA +100 mV µA –100 DE = 0V, VIN = +2.4V, or 0V –20 ±1 +20 VCC = 0V, VIN = +2.4V, or 0V –20 ±1 +20 VIH Minimum Input High Voltage VIL Minimum Input Low Voltage IIH Input High Current VIN = VCC or 2.4V ±1 +10 IIL Input Low Current VIN = GND or 0.4V ±1 +10 VCL Input Diode Clamp Voltage ICLAMP = –18mA ICCD Power Supply Current DE = RE = VCC, RL = 27 ohms DIN, DE, RE 2.0 VCC GND 0.8 –1.5 VCC –0.8 13 20 DE = RE = 0V 5 8 ICCZ DE = 0V, RE = VCC 3 7.5 ICC DE = VCC, RE = 0V, RL 27 ohms 16 22 DO+/RI+ DO–/RI– µA V ICCR COUTPUT Bus Pin Capacitance V 5 mA pF Notes continued on next page... 3 PS8662 01/20/03 PI90LVB010 Single Bus LVDS Transceiver 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 Notes: 1. “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. They are not meant to imply that the devices should be operated at these limits. The table of “Electrical Characteristics” specifies conditions of device operation. 2. All currents into device pins are positive, all currents out of device pins are negative. All voltages are referenced to ground except: VOD, VID, VTH, and VTL, unless otherwise specified. 3. All typicals are given for VCC = +3.3V or 5.0V and TA = +25°C unless otherwise stated. 4. ESD Rating: HBM (15kohms, 100pF) > 2.0kV EAT (0 ohm, 200pF) >300V. 5. CL includes probe and jig capacitance. 6. Generator waveforms for all tests unless otherwise specified: f = 1MHz, ZO = 50 ohms, tr, tf ≤ 6.0ns (0% - 100%) on control pins and ≤ 1.0ns for RI inputs. 7. The PI90LVB010 is a current mode device and only functions with datasheet specification when a resistive load is appplied between the driver outputs. 8. For receiver disable delays, the switch is set to VCC for tPZL, and tPLZ and to GND for tPZH and tPHZ. AC Electrical Characteristics (TA = –40°C to +85°C, VCC = 3.3V ±0.3V) Symbol Parame te r Conditions M in. Typ. M a x. 0.7 1.5 2.7 Units Diffe re ntial Drive r Timing Re quire me nts tP HLD Differential Propagation Delay High to Low tP LHD Differential Propagation Delay Low to High tS K D Differential Skew ItPHLD - tPLHDI tTLH RL = 27 ohms Figures 2 & 3 CL = 10pF 1.5 2.7 0.2 1.0 Transition Time Low to High 0.3 0.9 tTHL Transition Time High to Low 0.3 0.9 tP HZ Disable Time High to Z 0.5 2.6 3.3 tP LZ Disable Time Low to Z 0.5 2.6 3.3 tP ZH Enable Time Z to High 0.5 2.6 3.3 tP ZL Enable Time Z to Low 0.5 2.6 3.3 1.3 2.1 3.2 1.3 2.1 3.2 RL = 27 ohms Figures 4 & 5 CL = 10pF 0.7 ns Diffe re ntial Re ce ive r Timing Re quire me nts tP HLD Differential Propagation Delay High to Low tP LHD Differential Propagation Delay Low to High tS K D Figures 6 & 7 CL = 10pF Differential Skew ItPHLD - tPLHDI 0.5 2.0 tr Rise Time 0.8 1.4 tf Fall Time 0.8 1.4 0.5 4.0 6.0 0.5 4.0 7.0 0.5 2.5 7.0 0.5 2.5 6.0 tP HZ Disable Time High to Z tP LZ Disable Time Low to Z tP ZH Enable Time Z to High tP ZL Enable Time Z to Low RL = 500 ohms Figures 8 & 9 CL = 10pF(8) 4 PS8662 ns 01/20/03 PI90LVB010 Single Bus LVDS Transceiver 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 Test Circuits and Timing Waveforms DO+ RL/2 = 13.5Ω or 50Ω 2V DIN VOS VOD 0.8V S1 RL/2 = 13.5Ω or 50Ω Driver Enabled DO– Figure 1. Differential Driver DC Test Circuit CL DO+ DIN Pulse Generator RL DO– 50Ω CL Driver Enabled Figure 2. Differential Driver Propagation Delay and Transition Time Test Circuit 3V DIN 1.5V 0V 1.5V tPHLD DOUT+,DOUT- tPLHD 0V 0V (Differential) DO+ 0V DO– 80% (DO+) - (DO–) 80% 0V 0V 20% 20% tTLH tTHL tDIFF = (DO+) - (DO–) Figure 3. Driver Propagation Delay and Transition Time Waveforms 5 PS8662 01/20/03 PI90LVB010 Single Bus LVDS Transceiver 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 Test Circuits and Timing Waveforms (continued) DO+ RL/2 CL 2.0 DIN 0.8 +1.2V RL/2 DE Pulse Generator DO– 50Ω CL Figure 4. Driver Three-State Delay Test Circuit 3V 1.5V DE 1.5V 0V tPHZ DO – (DI=L) VOH DO + (DI=H) tPZH 50% 50% 1.2V tPLZ DO – (DI=H) DO + (DI=L) 1.2V VOH 50% 50% VOL tPZL Figure 5. Driver Three-State Delay Waveforms RI+ Pulse Generator RI 50Ω + – RO CL 50Ω Figure 6. Receiver Propagation Delay and Transistion Time Test Circuit RI+ +1.3V VID = 200mV 0V (Differential) (1.2V CM) +1.1V RI– tPLH tPHL 80% 80% 1.5V 1.5V VO 20% 20% tTLH tTHL Figure 7. Receiver Propagation Delay and Transistion Time Waveforms 6 PS8662 01/20/03 PI90LVB010 Single Bus LVDS Transceiver 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 Test Circuits and Timing Waveforms (continued) RI+ + R RI RL CL RE Pulse Generator VCC 50Ω Figure 8. Receiver Three-State Delay Test Circuit 3V RE 1.5V 1.5V 0V tPHZ tPZH VOH VOH 50% VOH –0.5 GND ROUT tPZL tPLZ VOH VCC 50% VOL +0.5 VOL VOL Figure 9. Receiver Three-State Delay Waveforms Typical Bus Application Configurations DO+ DO+ 54Ω DIN 54Ω DIN DO– DO– DE DE RE RE + RI+ RI+ RI– RI– + ROUT ROUT – – Figure 10. Bidirectional Half-Duplex Point-to-Point Applications DIN/ROUT DIN/ROUT DIN/ROUT DIN/ROUT 54Ω 54Ω DIN/ROUT DIN/ROUT DIN/ROUT Figure 11. Multipoint Bus Applications 7 PS8662 01/20/03 PI90LVB010 Single Bus LVDS Transceiver 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 Packaging Mechanical: 8-Pin SOIC (W) 150-mil 8 .149 .157 3.78 3.99 1 .189 .196 .0099 .0196 0.25 x 45˚ 0.50 .0075 .0098 0-8˚ 4.80 5.00 .016 .026 0.406 0.660 0.19 0.25 0.40 .016 1.27 .050 .053 .068 .2284 .2440 5.80 6.20 1.35 1.75 SEATING PLANE REF .050 BSC 1.27 .0040 0.10 .0098 0.25 .013 0.330 .020 0.508 X.XX DENOTES DIMENSIONS X.XX IN MILLIMETERS Packaging Mechanical: 8-Pin MSOP (U) Ordering Information Part Pin-Package Te mpe rature PI90LVB010W 8 - SOIC –40°C to 85°C PI90LVB010U 8 - MSOP –40°C to 85°C Pericom Semiconductor Corporation 2380 Bering Drive • San Jose, CA 95131 • 1-800-435-2336 • Fax (408) 435-1100 • http://www.pericom.com 8 PS8662 01/20/03