ETC HI-8045PQT

HI-8045
March 2000
GENERAL DESCRIPTION
APPLICATIONS
The HI-8045 high voltage display driver is a low cost plastic,
80-segment version of the Holt HI-8040 display driver
series. The 20 mil package lead pitch allows the maximum
number of display driver segments in the smallest space. All
the features of the HI-8040 are available with the HI-8045.
An optional negative converter can generate the negative
display drive voltage. Test inputs facilitate opens and shorts
testing. The backplane frequency is checked and, as long
as power is available, the segments are shut "Off" if the
frequency becomes too low.
The HI-8045 and the HI-80XX series of display drivers all
control segment information in the same way. Data is
serially clocked into the device and the data for all segment
outputs are latched in parallel when the Load input
transitions from high to low. With the Data Out from the shift
register available, devices may be cascaded to obtain more
segment outputs. The shift register is 85 bits long.
The die is metal mask programmable to provide for various
package and/or cascade tap options. Consult your Holt
Sales representative to explore the possibilities.
FEATURES
! Dichroic Liquid Crystal Displays
! Standard Liquid Crystal Displays
PIN CONFIGURATION (Top View)
N/C
VSS
CS
CL
LD
DIN
BPOSC
N/C
N/C
BPIN
N/C
CONVOUT
VDD
DOUT 85
CONVOSC
VEE
T1
T2
BP
S1
S2
S3
S4
S5
S6
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
HI-8045PQ
80 - SEGMENT
100 - PIN
PLASTIC
QUAD FLAT PACK
S55
S54
S53
S52
S51
S50
S49
548
S47
S46
S45
S44
S43
S42
S41
S40
S39
S38
S37
S36
S35
S34
S33
S32
S31
FUNCTIONAL BLOCK DIAGRAM
! 4 MHz serial input data rate
! 80 segment outputs
DIN
CL
Þ
Þ
CS
Þ
! Cascadable
DATA IN
85 Stage
Shift Register
DOUT
85
CLK
! 5 Volt inputs translated to 35 Volts
LE
! Test pins allow hardware all "ON", all "OFF" or
alternating
! Monitors backplane oscillation and forces all
segments to "OFF" condition if below 10Hz
LD
BPOSC
BPIN
Þ
Þ
Þ
Oscillator
Divider
Voltage
Translator
! Negative voltage converter available on-chip
! CMOS low power
! Industrial and JEDEC processing available
80 Bit Latch
Voltage
Translators
H i g h Voltage
Drivers
H i g h Voltage
Buffer
Þ BP
(DS8045 Rev. A)
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
HOLT INTEGRATED CIRCUITS
3-21
80 SEGMENTS
3/00
HI-8045
FUNCTIONAL DESCRIPTION
INPUT LOGIC
DOUT
CS must be held low to enter data into the shift register.
The data is clocked on the negative edge of CL. LD is normally held low and only pulsed high when new data is ready
for display. When LD is high the latch is transparent. All four
logic inputs are TTL compatible. A logic "1" at DIN that is
eventually latched to the segment drivers will cause the segment to be at the opposite voltage level of the BP pin (out of
phase).
The DOUT pin is available from segment 85 for cascading
devices to drive more segments and for verifying the data
integrity. However only the first 80 output segments are
available to the user. This output can drive 2 TTL loads. It
changes on the positive edge of CL.
BPOSC and BPIN
The user can either make an oscillator to create the
backplane frequency or drive a signal into BPIN leaving
BPOSC open. To make an oscillator, pins BPOSC and
BPIN must be connected together and the appropriate R
and C combination applied (See Figure 1). If the oscillator is
used, the backplane frequency is approximately
1
fBP =
(for R = 180KΩ & C = 220pF, fBP » 100Hz).
256 RC
VEE & NEGATIVE VOLTAGE CONVERTER
VEE may be externally driven to a maximum -30V. Alternatively, there is a voltage converter that will provide -21.4 volts
(See Figure 2). If the converter pins are left open circuit, an
on-chip sense resistor will cause shut down of all current
consumption associated with the converter. The converter
will survive a shorted segment condition and continue to
maintain VEE at -20 volts.
AUTOMATIC SEGMENTS OFF
The internal backplane signal is tested continuously to be at
least 10Hz. If the detector senses f<10Hz, then the segments
are forced to the same voltage as the backplane (all segments
in "OFF" state). However, the detector is only functional while
VDD is above the minimum operating voltage specification.
TEST INPUTS
The test functions available are:
T2
T1
Display
0
0
Normal
0
1
All Off
1
0
All On
1
1
Alternating On/Off Segments
The test inputs must be tied to the appropriate logic level for
correct circuit operation.
VDD
R 330KΩ
OSC
RSENSE
Control
IN5818, IN5819
VDD
330µH
VSS
10µF
VSS
HOLT INTEGRATED CIRCUITS
3-22
HI-8045
LD
CL
CS
DIN
BP
CS CL LD
CS CL LD
CS CL LD
DIN
DO
DIN
DO
DIN
DO
BPIN
BP
BPIN
BP
BPIN
BP
1MW
1MΩ
1 µF
1µF
1500pF
R
C
BPOSC
BPOSC
V
os
BPOSC
1MΩ
1MΩ
SEGMENTS
SEGMENTS BACK
PLANE
SEGMENTS
SEG
n
1µF
360pF
VALID
HOLT INTEGRATED CIRCUITS
3-23
1 µF
Voltages referenced to VSS = 0V
Supply Voltage
VDD........................ 0V to 7V
VEE................VDD-35V to 0V
Voltage at any input, except BPIN....-0.3 to VDD+0.3V
Voltage at BPIN input.................VDD-35 to VDD+0.3V
DC Current any input pin...................................10 mA
Power Dissipation......................................................300 mW
Operating Temperature Range - Industrial.......-40° to +85°C
Operating Temperature Range - Hi-Temp........-55° to +125°C
Storage Temperature Range............................-65° to +150°C
NOTE: Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only.
Functional operation of the device at these or any other conditions above those indicated in the operational sections of the specifications is not implied.
Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
VDD = 5V ±5%, VEE = -21.5V, VSS = 0V, TA = Operating temperature range (unless otherwise specified).
PARAMETER
Operating Voltage
Supply Current:
SYMBOL
(Converter Off, fBP = 100Hz)
Input Low Voltage
(excluding BPIN)
Input High Voltage
(excluding BPIN)
Input Low Voltage
(BPIN)
Input High Voltage
(BPIN)
Input Current
Input Capacitance
(Guaranteed, not tested)
Segment Output Impedance
Backplane Output Impedance
Data Out Current:
Source Current
Sink Current
Voltage Converter:
@ No Load
(VDD - VSS = 5V, TA = 25°C)
@ 0.1mA Load
@ 10KW Load
Offset Voltage
(Guaranteed, not tested)
VDD
IDD
IEE
VIL
VIH
VILX
VIHX
IIN
CI
RSEG
RBP
IDOH
IDOL
VEEC
IDD
VEEC
VOS
CONDITION
MIN
TYP
3.0
Static, No Load
Static, No Load
0
2
VEE
0.8 VDD
VIN = 0 to 5V
IL = 10µA
IL = 10µA
VOH = 4.5
VOL = 0.4
See Fig. 2
See Fig. 2
See Fig. 2
See Fig. 4
3.2
-22
-21.5
MAX
UNITS
7.0
300
120
0.8
VDD
0.6 VDD
VDD
100
5
15,000
600
-3.0
25
V
µA
µA
V
V
V
V
nA
pF
W
W
mA
mA
V
mA
V
mV
MAX
UNITS
170
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
-21
1.8
-20
VDD = 5V , VEE = -21.5V, VSS = 0V, TA = Operating temperature range (unless otherwise specified).
PARAMETER
Clock Period
Clock Pulse Width
Data In - Setup
Data In - Hold
Chip Select - Setup to Clock
Chip Select - Hold to Clock
Load - Setup to Clock
Chip Select - Setup to Load
Load Pulse Width
Chip Select - Hold to Load
Data Out Valid, from Clock
non-cascaded
cascaded
non-cascaded
cascaded
SYMBOL
VDD
MIN
tCL
tCL
tCW
tCW
tDS
tDH
tCSS
tCSH
tLS
tCSL
tLW
tLCS
tCDO
5V
5V
5V
5V
5V
5V
5V
5V
5V
5V
5V
5V
5V
250
500
125
250
80
80
100
120
120
0
130
120
HOLT INTEGRATED CIRCUITS
3-24
TYP
HI-8045
ORDERING INFORMATION
PART
NUMBER
PACKAGE
DESCRIPTION
TEMPERATURE
RANGE
FLOW
LEAD
FINISH
HI-8045PQ
100-PIN PLASTIC QUAD FLAT PACK (PQFP)
-40°C to +85°C
I
SOLDER
HI-8045PQT
100-PIN PLASTIC QUAD FLAT PACK (PQFP)
-55°C to +125°C
T
SOLDER
MAGNIFIED VIEW OF PIN ASSIGNMENTS
Pin 1
N/C
VSS
CS
CL
LD
DIN
BPOSC
N/C
N/C
BPIN
N/C
CONVOUT
VDD
DOUT 85
CONVOSC
VEE
T1
T2
BP
S1
S2
S3
S4
S5
S6
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
HI-8045PQ
80 - SEGMENT
100 - PIN
PLASTIC
QUAD FLAT PACK
HOLT INTEGRATED CIRCUITS
3-25
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
S55
S54
S53
S52
S51
S50
S49
548
S47
S46
S45
S44
S43
S42
S41
S40
S39
S38
S37
S36
S35
S34
S33
S32
S31
HI-8045 PACKAGE DIMENSIONS
inches (millimeters)
100-PIN PLASTIC QUAD FLAT PACK (PQFP)
Package Type: 100PQS
.0197 BSC
( 0.50 BSC)
.630 ±.008
(16.0 ± .20)
SQ.
.551 ± .004
(14.0 ± .10)
SQ.
.024 ± .006
(.60 ± .15)
.039 ± .006
(1.0 ± .15)
Typ.
.008
(0.20)
Min.
See Detail A
.059 ± .004
(1.50 ± .10)
.009 ± .002
(.22 ± .05)
.006 ± .002 R
(.15 ± .05 R)
.055 ± .002
(1.40 ± .05)
.006 R typ
(0.15 R typ)
HOLT INTEGRATED CIRCUITS
1
0° ≤ Θ ≤ 7°
Detail A