±0.25°C Accurate, 16-Bit Digital SPI Temperature Sensor ADT7320 Preliminary Technical Data FEATURES GENERAL DESCRIPTION Temperature accuracy ±0.25°C from −20°C to +105°C 13- or 16-bit user-selectable temperature-to-digital converter Low drift silicon temperature sensor No temperature calibration/correction required by user Power saving 1 sample per second (SPS) mode Fast first conversion on power-up of 6 ms SPI-compatible interface Operating temperature from −40°C to +150°C Operating voltage: 2.7 V to 5.5 V Critical overtemperature indicator Programmable overtemperature/undertemperature interrupt Low power consumption: 700 μW typical at 3.3 V Shutdown mode for lower power: 7 μW typical at 3.3 V 16-lead RoHS-compliant LFCSP package The ADT7320 is a high accuracy digital temperature sensor offering breakthrough performance over a wide industrial range, housed in an LFCSP package. It contains a band gap temperature reference and a 13-bit analog-to-digital converter (ADC) to monitor and digitize the temperature to a 0.0625°C resolution. The ADC resolution, by default, is set to 13 bits (0.0625°C). This can be changed to 16 bits (0.0078°C) by setting Bit 7 in the configuration register (Register Address 0x01). APPLICATIONS The CT pin is an open-drain output that becomes active when the temperature exceeds a programmable critical temperature limit. The default critical temperature limit is 147°C. The INT pin is also an open-drain output that becomes active when the temperature exceeds a programmable limit. The INT and CT pins can operate in either comparator or interrupt mode. The ADT7320 is guaranteed to operate over supply voltages from 2.7 V to 5.5 V. Operating at 3.3 V, the average supply current is typically 210 μA. The ADT7320 has a shutdown mode that powers down the device and offers a shutdown current of typically 2 μA. The ADT7320 is rated for operation over the −40°C to +150°C temperature range. RTD and thermistor replacement Medical equipment Cold junction compensation Industrial controls and test Food transportation and storage Environmental monitoring and HVAC FUNCTIONAL BLOCK DIAGRAM ADT7320 SPI INTERFACE DOUT 2 DIN 3 CS 4 INTERNAL REFERENCE INTERNAL OSCILLATOR 6 CT TCRIT TEMPERATURE VALUE REGISTER CONFIGURATION AND STATUS REGISTERS THYST REGISTER TCRIT REGISTER THIGH REGISTER TLOW REGISTER TEMPERATURE SENSOR Σ-Δ MODULATOR 5 INT THIGH FILTER LOGIC TLOW 7 GND 8 VDD 09012-001 SCLK 1 Figure 1. Rev. PrA Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 ©2010 Analog Devices, Inc. All rights reserved. ADT7320 Preliminary Technical Data TABLE OF CONTENTS Features .............................................................................................. 1 Status Register ............................................................................. 14 Applications ....................................................................................... 1 Configuration Register .............................................................. 15 General Description ......................................................................... 1 Temperature Value Register ...................................................... 16 Functional Block Diagram .............................................................. 1 ID Register................................................................................... 16 Revision History ............................................................................... 2 TCRIT Setpoint Register ............................................................... 16 Specifications..................................................................................... 3 THYST Setpoint Register............................................................... 17 SPI Timing Specifications ........................................................... 4 THIGH Setpoint Register .............................................................. 17 Absolute Maximum Ratings............................................................ 5 TLOW Setpoint Register ............................................................... 17 ESD Caution .................................................................................. 5 Serial Interface ................................................................................ 18 Pin Configuration and Function Descriptions ............................. 6 SPI Command Byte .................................................................... 18 Typical Performance Characteristics ............................................. 7 Writing Data ............................................................................... 19 Theory of Operation ........................................................................ 9 Reading Data............................................................................... 20 Circuit Information ...................................................................... 9 Interfacing to DSPs or Microcontrollers ................................. 20 Converter Details.......................................................................... 9 Serial Interface Reset.................................................................. 20 Temperature Measurement ......................................................... 9 INT and CT Outputs...................................................................... 21 One-Shot Mode .......................................................................... 10 Undertemperature and Overtemperature Detection ............ 21 1 SPS Mode .................................................................................. 10 Applications Information .............................................................. 23 Continuous Read Mode ............................................................. 12 Thermal Response Time ........................................................... 23 Shutdown ..................................................................................... 12 Supply Decoupling ..................................................................... 23 Fault Queue ................................................................................. 12 Temperature Monitoring ........................................................... 23 Temperature Data Format ......................................................... 13 Outline Dimensions ....................................................................... 24 Temperature Conversion Formulas ......................................... 13 Ordering Guide .......................................................................... 24 Registers ........................................................................................... 14 REVISION HISTORY 6/10—Revision PrA: Preliminary Version Rev. PrA | Page 2 of 24 Preliminary Technical Data ADT7320 SPECIFICATIONS TA = −40°C to +125°C, VDD = 2.7 V to 5.5 V, unless otherwise noted. Table 1. Parameter TEMPERATURE SENSOR AND ADC Accuracy1 Min ADC Resolution Temperature Resolution 13 Bit 16 Bit Temperature Conversion Time Fast Temperature Conversion Time 1 SPS Conversion Time Temperature Hysteresis Repeatability4 Drift5 DC PSRR DIGITAL OUTPUTS (OPEN DRAIN) High Output Leakage Current, IOH Output High Current Output Low Voltage, VOL Output High Voltage, VOH Output Capacitance, COUT DIGITAL INPUTS Input Current Input Low Voltage, VIL Input High Voltage, VIH Pin Capacitance DIGITAL OUTPUT (DOUT) Output High Voltage, VOH Output Low Voltage, VOL Output Capacitance, COUT POWER REQUIREMENTS Supply Voltage Supply Current At 3.3 V At 5.5 V 1 SPS Current At 3.3 V At 5.5 V Typ Max Unit Test Conditions/Comments ±0.202 ±0.25 ±0.50 ±0.503 ±0.75 −0.85 −1.0 13 °C °C °C °C °C °C °C Bits 16 Bits TA = −10°C to +85°C, VDD = 3.0 V TA = −20°C to +105°C, VDD = 2.7 V to 3.3 V TA = −40°C to +125°C, VDD = 2.7 V to 3.3 V TA = −10°C to +105°C, VDD = 4.5 V to 5.5 V TA = −40°C to +125°C, VDD = 4.5 V to 5.5 V TA = 125°C to 150°C, VDD = 4.5 V to 5.5 V TA = 125°C to 150°C, VDD = 2.7 V to 3.3 V Twos complement temperature value of sign bit plus 12 ADC bits (power-up default resolution) Twos complement temperature value of sign bit plus 15 ADC bits (Bit 7 = 1 in the configuration register) 0.0625 0.0078 240 6 60 0.02 ±0.015 0.0073 0.1 °C °C ms ms ms °C °C °C °C/V 13-bit resolution (sign + 12 bit) 16-bit resolution (sign + 15 bit) Continuous conversion and one-shot conversion mode First conversion on power-up only Conversion time for 1 SPS mode Temperature cycle = 25°C to 125°C and back to 25°C TA = 25°C 500 hour stress test at 150°C with VDD = 5.0 V TA = 25°C 5 1 0.4 μA mA V V pF CT and INT pins pulled up to 5.5 V VOH = 5.5 V IOL = 2 mA @ 5.5 V, IOL = 1 mA @ 3.3 V ±1 0.4 VIN = 0 V to VDD 10 μA V V pF 0.4 50 V V pF ISOURCE = ISINK = 200 μA IOL = 200 μA 5.5 V 250 300 μA μA Peak current while converting, SPI interface inactive Peak current while converting, SPI interface inactive μA μA VDD = 3.3 V, 1 SPS mode, TA = 25°C VDD = 5.5 V, 1 SPS mode, TA = 25°C 0.1 0.7 × VDD 3 0.7 × VDD 5 VOH − 0.3 2.7 210 230 46 65 Rev. PrA | Page 3 of 24 ADT7320 Preliminary Technical Data Shutdown Current At 3.3 V At 5.5 V Power Dissipation Normal Mode Power Dissipation 1 SPS 2.0 4.4 700 150 15 25 μA μA μW μW Supply current in shutdown mode Supply current in shutdown mode VDD = 3.3 V, normal mode at 25°C Power dissipated for VDD = 3.3 V, TA = 25°C 1 Accuracy includes repeatability. The equivalent three-sigma limits are ±0.15°C. This three-sigma specification is provided to enable comparison with other vendors who use these limits. 3 For higher accuracy at 5 V operation, contact an Analog Devices, Inc., sales representative. 4 Based on a floating average of 10 readings. 5 Drift includes solder heat resistance (SHR) and lifetime tests performed as per JEDEC Standard JESD22-A108. 2 SPI TIMING SPECIFICATIONS TA = −40°C to +150°C, VDD = 2.7 V to 5.5 V, unless otherwise noted. All input signals are specified with rise time (tR) = fall time (tF) = 5 ns (10% to 90% of VDD) and timed from a voltage level of 1.6 V. Table 2. Parameter1, 2 t1 t2 t3 t4 t5 t6 Limit at TMIN, TMAX (B Version) 0 100 100 30 25 0 60 80 10 80 0 0 60 80 10 t74 t8 t9 t10 Unit ns min ns min ns min ns min ns min ns min ns max ns max ns min ns max ns min ns min ns max ns max ns min Conditions/Comments CS falling edge to SCLK active edge setup time3 SCLK high pulse width SCLK low pulse width Data valid to SCLK edge setup time Data valid to SCLK edge hold time SCLK active edge to data valid delay3 VDD = 4.5 V to 5.5 V VDD = 2.7 V to 3.6 V Bus relinquish time after CS inactive edge CS rising edge to SCLK edge hold time CS falling edge to DOUT active time VDD = 4.5 V to 5.5 V VDD = 2.7 V to 3.6 V SCLK inactive edge to DOUT high 1 Sample tested during initial release to ensure compliance. All input signals are specified with tR = tF = 5 ns (10% to 90% of VDD) and timed from a voltage level of 1.6 V. See Figure 2. 3 SCLK active edge is falling edge of SCLK. 4 This means that the times quoted in the timing characteristics are the true bus relinquish times of the part and, as such, are independent of external bus loading capacitances. 2 CS t2 1 SCLK t4 t8 t3 2 3 7 1 2 7 8 t5 MSB DIN 8 LSB t6 t9 DOUT MSB Figure 2. Detailed SPI Timing Diagram Rev. PrA | Page 4 of 24 t10 t7 LSB 09012-002 t1 Preliminary Technical Data ADT7320 ABSOLUTE MAXIMUM RATINGS Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Table 3. Parameter VDD to GND DIN Input Voltage to GND DOUT Voltage to GND SCLK Input Voltage to GND CS Input Voltage to GND CT and INT Output Voltage to GND ESD Rating (Human Body Model) Operating Temperature Range Storage Temperature Range Maximum Junction Temperature, TJMAX 16-Lead LFCSP Power Dissipation1 Thermal Impedance3 θJA, Junction-to-Ambient (Still Air) θJC, Junction-to-Case IR Reflow Soldering Peak Temperature (RoHSCompliant Package) Time at Peak Temperature Ramp-Up Rate Ramp-Down Rate Time from 25°C to Peak Temperature Rating −0.3 V to +7 V −0.3 V to VDD + 0.3 V −0.3 V to VDD + 0.3 V −0.3 V to VDD + 0.3 V −0.3 V to VDD + 0.3 V −0.3 V to VDD + 0.3 V 2.0 kV −40°C to +150°C −65°C to +160°C 150°C ESD CAUTION WMAX = (TJMAX − TA2)/θJA 121°C/W 56°C/W 220°C 260°C (0°C) 20 sec to 40 sec 3°C/sec maximum −6°C/sec maximum 8 minutes maximum 1 Values relate to package being used on a standard 2-layer PCB. This gives a worst-case θJA and θJC. 2 TA = ambient temperature. 3 Junction-to-case resistance is applicable to components featuring a preferential flow direction, for example, components mounted on a heat sink. Junction-to-ambient is more useful for air-cooled, PCB-mounted components. Rev. PrA | Page 5 of 24 ADT7320 Preliminary Technical Data 13 NC 14 NC 15 NC 16 NC PIN CONFIGURATION AND FUNCTION DESCRIPTIONS SCLK 1 12 VDD ADT7320 DOUT 2 10 CT 9 INT NC 8 NC 6 NC 7 NC 5 CS 4 NOTES 1. NC = NO CONNECT. 2. THE EXPOSED PADDLE IS CONNECTED INTERNALLY. FOR INCREASED RELIABILITY OF THE SOLDER JOINTS AND MAXIMUM THERMAL CAPABILITY, IT IS RECOMMENDED THAT THE PAD BE SOLDERED TO THE GROUND PLANE. 09012-003 DIN 3 11 GND TOP VIEW (Not to Scale) Figure 3. Pin Configuration Table 4. Pin Function Descriptions Pin No. 1 Mnemonic SCLK 2 3 DOUT DIN 4 5 6 7 8 9 CS NC NC NC NC INT 10 CT 11 12 GND VDD 13 14 15 16 NC NC NC NC EPAD Description Serial Clock Input. The serial clock is used to clock in and clock out data to and from any register of the ADT7320. Serial Data Output. Data is clocked out on the SCLK falling edge and is valid on the SCLK rising edge. Serial Data Input. Serial data to be loaded to the control registers of the part is provided on this input. Data is clocked into the registers on the rising edge of SCLK. Chip Select Input. The device is selected when this input is low. The device is disabled when this pin is high. No Connect. No Connect. No Connect. No Connect. Overtemperature and Undertemperature Indicator. Logic output. Power-up default setting is as an active low comparator interrupt. Open-drain configuration. A pull-up resistor is required, typically 10 kΩ. Critical Overtemperature Indicator. Logic output. Power-up default polarity is active low. Open-drain configuration. A pull-up resistor is required, typically 10 kΩ. Analog and Digital Ground. Positive Supply Voltage (2.7 V to 5.5 V). The supply should be decoupled with a 0.1 μF ceramic capacitor to ground. No Connect. No Connect. No Connect. No Connect. The exposed paddle is connected internally. For increased reliability of the solder joints and maximum thermal capability, it is recommended that the pad be soldered to the ground plane. Rev. PrA | Page 6 of 24 Preliminary Technical Data ADT7320 TYPICAL PERFORMANCE CHARACTERISTICS 0.30 1.0 5.5V CONTINUOUS CONVERSION 0.5 3.0V CONTINUOUS CONVERSION 0.20 IDD (mA) TEMPERATURE ERROR (°C) 0.25 0 0.15 0.10 5.5V 1SPS –0.5 0.05 –10 10 30 50 70 90 110 130 TEMPERATURE (°C) 0 –100 –50 0 50 100 150 200 09012-007 –30 09012-004 –1.0 –50 200 09012-025 3.0V 1SPS TEMPERATURE (°C) Figure 4. Temperature Accuracy at 3 V Figure 6. Operating Supply Current vs. Temperature 1.0 6 SHUTDOWN IDD (µA) 0 5.5V 4 5.0V 3 4.5V 2 3.6V –0.5 1 –1.0 –50 –30 –10 10 30 50 70 90 TEMPERATURE (°C) 110 130 09012-005 TEMPERATURE ERROR (°C) 5 0.5 Figure 5. Temperature Accuracy at 5 V 0 –100 3.0V 2.7V –50 0 50 100 150 TEMPERATURE (°C) Figure 7. Shutdown Current vs. Temperature Rev. PrA | Page 7 of 24 ADT7320 Preliminary Technical Data 0.30 160 140 IDD CONTINUOUS CONVERSION 0.25 TEMPERATURE (°C) 120 0.15 0.10 60 3.0 3.5 4.0 4.5 5.0 5.5 6.0 SUPPLY VOLTAGE (V) 09012-008 20 0 2.5 Figure 8. Average Operating Supply Current vs. Supply Voltage at 25°C 8 7 6 5 4 3 2 1 0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 SUPPLY VOLTAGE (V) 6.0 09012-009 SHUTDOWN IDD (µA) 80 40 IDD 1SPS 0.05 100 Figure 9. Shutdown Current vs. Supply Voltage at 25°C Rev. PrA | Page 8 of 24 0 0 5 10 15 20 25 30 TIME (Seconds) Figure 10. Response to Thermal Shock 35 40 09012-011 IDD (mA) 0.20 Preliminary Technical Data ADT7320 THEORY OF OPERATION CIRCUIT INFORMATION Σ-Δ MODULATOR The on-board temperature sensor has excellent accuracy and linearity over the entire rated temperature range without needing correction or calibration by the user. The sensor output is digitized by a Σ-Δ modulator, also known as the charge balance type ADC. This type of converter uses time-domain oversampling and a high accuracy comparator to deliver 16 bits of resolution in an extremely compact circuit. Configuration register functions consist of the following: • • • • • • Switching between 13-bit and 16-bit resolution Switching between normal operation and full power-down Switching between comparator and interrupt event modes on the INT and CT pins Setting the active polarity of the CT and INT pins Setting the number of faults that activate CT and INT Enabling the standard one-shot mode and 1 SPS mode CONVERTER DETAILS The Σ-Δ modulator consists of an input sampler, a summing network, an integrator, a comparator, and a 1-bit DAC. This architecture creates a negative feedback loop and minimizes the integrator output by changing the duty cycle of the comparator output in response to the input voltage changes. The comparator samples the output of the integrator at a much higher rate than the input sampling frequency. This oversampling spreads the quantization noise over a much wider band than that of the input signal, improving overall noise performance and increasing accuracy. The modulated output of the comparator is encoded using a circuit technique that results in SPI temperature data. INTEGRATOR COMPARATOR VOLTAGE REF AND VPTAT 1-BIT DAC 1-BIT CLOCK GENERATOR LPF DIGITAL FILTER 13-BIT TEMPERATURE VALUE REGISTER 09012-012 The ADT7320 is a 13-bit digital temperature sensor that is extendable to 16 bits for greater resolution. An on-board temperature sensor generates a voltage proportional to absolute temperature, which is compared to an internal voltage reference and input to a precision digital modulator. Figure 11. Σ-∆ Modulator TEMPERATURE MEASUREMENT In normal mode, the ADT7320 runs an automatic conversion sequence. During this automatic conversion sequence, a conversion takes 240 ms to complete and the ADT7320 is continuously converting. This means that as soon as one temperature conversion is completed, another temperature conversion begins. Each temperature conversion result is stored in the temperature value register and is available through the SPI interface. In continuous conversion mode, the read operation provides the most recent converted result. At power-up, the first conversion is a fast conversion, taking typically 6 ms. If the temperature exceeds 147°C, the CT pin asserts low. If the temperature exceeds 64°C, the INT pin asserts low. Fast conversion temperature accuracy is typically within ±5°C. The conversion clock for the part is generated internally. No external clock is required except when reading from and writing to the serial port. The measured temperature value is compared with a critical temperature limit (stored in the 16-bit TCRIT setpoint read/write register), a high temperature limit (stored in the 16-bit THIGH setpoint read/write register), and a low temperature limit (stored in the 16-bit TLOW setpoint read/write register). If the measured value exceeds these limits, the INT pin is activated; and if it exceeds the TCRIT limit, the CT pin is activated. The INT and CT pins are programmable for polarity via the configuration register, and the INT and CT pins are also programmable for interrupt mode via the configuration register. Rev. PrA | Page 9 of 24 ADT7320 Preliminary Technical Data CS 0x08 DIN 0x20 WAIT 240ms MINIMUM FOR CONVERSION TO FINISH DATA 09012-026 DOUT SCLK Figure 12. Typical SPI One-Shot Write to Configuration Register Followed by a Read from the Temperature Value Register ONE-SHOT MODE 1 SPS MODE Setting Bit 5 to 0 and Bit 6 to 1 of the configuration register (Register Address 0x01) enables the one-shot mode. When this mode is enabled, the ADT7320 immediately completes a conversion and then goes into shutdown mode. In this mode, the part performs one measurement per second. A conversion takes only 60 ms, and it remains in the idle state for the remaining 940 ms period. This mode is enabled by writing 1 to Bit 5 and 0 to Bit 6 of the configuration register (Register Address 0x01). Wait for a minimum of 240 ms after writing to the one-shot bits before reading back the temperature from the temperature value register. This time ensures that the ADT7320 has time to power up and complete a conversion. The one-shot mode is useful when one of the circuit design priorities is to reduce power consumption. Rev. PrA | Page 10 of 24 Preliminary Technical Data ADT7320 CT and INT Operation in One-Shot Mode See Figure 13 for more information on one-shot CT pin operation for TCRIT overtemperature events when one of the limits is exceeded. Note that in interrupt mode, a read from any register resets the INT and CT pins. For the INT pin in comparator mode, if the temperature drops below the THIGH − THYST value or goes above the TLOW + THYST value, a write to the one-shot bits (Bit 5 and Bit 6 of the configuration register, Register Address 0x01) resets the INT pin. For the CT pin in the comparator mode, if the temperature drops below the TCRIT − THYST value, a write to the one-shot bits (Bit 5 and Bit 6 of the configuration register, Register Address 0x01) resets the CT pin, see Figure 13. Note that when using one-shot mode, ensure that the refresh rate is appropriate to the application being used. TEMPERATURE 149°C 148°C TCRIT 147°C 146°C 145°C 144°C 143°C TCRIT – THYST 142°C 141°C 140°C CT PIN POLARITY = ACTIVE LOW CT PIN POLARITY = ACTIVE HIGH TIME WRITE TO BIT 5 AND BIT 6 OF CONFIGURATION REGISTER.* WRITE TO BIT 5 AND BIT 6 OF CONFIGURATION REGISTER.* *THERE IS A 240ms DELAY BETWEEN WRITING TO THE CONFIGURATION REGISTER TO START A STANDARD ONE-SHOT CONVERSION AND THE CT PIN GOING ACTIVE. THIS IS DUE TO THE CONVERSION TIME. THE DELAY IS 60ms IN THE CASE OF A ONE-SHOT CONVERSION. Figure 13. One-Shot CT Pin Rev. PrA | Page 11 of 24 09012-013 WRITE TO BIT 5 AND BIT 6 OF CONFIGURATION REGISTER.* ADT7320 Preliminary Technical Data CONTINUOUS READ MODE SHUTDOWN When the command byte = 01010100 (0x54), the contents of the temperature value register can be read out without requiring repeated writes to the communications register. By sending 16 SCLK clocks to the ADT7320, the contents of the temperature value register are output onto the DOUT pin. The ADT7320 can be placed in shutdown mode by writing 1 to Bit 5 and 1 to Bit 6 of the configuration register (Register Address 0x01). The ADT7320 can be taken out of shutdown mode by writing 0 to Bit 5 and 0 to Bit 6 of the configuration register (Register Address 0x01). The ADT7320 typically takes 1 ms (with a 0.1 μF decoupling capacitor) to come out of shutdown mode. The conversion result from the last conversion prior to shutdown can still be read from the ADT7320 even when it is in shutdown mode. When the part is taken out of shutdown mode, the internal clock starts and a conversion initiates. To exit the continuous read mode, the command byte 01010000 (0x50) must be written to the ADT7320. While in continuous read mode, the part monitors activity on the DIN line so that it can receive the instruction to exit the continuous read mode. Additionally, a reset occurs if 32 consecutive 1s are seen on the DIN pin. Therefore, hold DIN low in continuous read mode until an instruction is to be written to the device. In continuous read mode, the temperature value register cannot be read when a conversion is taking place. If an attempt is made to read the temperature value register while a conversion is taking place, then all 0s are read. This is because the continuous read mode blocks read access to the temperature value register during a conversion. FAULT QUEUE Bit 0 and Bit 1 of the configuration register (Register Address 0x01) are used to set up a fault queue. Up to four faults are provided to prevent false tripping of the INT and CT pins when the ADT7320 is used in a noisy temperature environment. The number of faults set in the queue must occur consecutively to set the INT and CT outputs. For example, if the number of faults set in the queue is four, then four consecutive temperature conversions must occur, with each result exceeding a temperature limit in any of the limit registers, before the INT and CT pins are activated. If two consecutive temperature conversions exceed a temperature limit and the third conversion does not, the fault count is reset to 0. CS DIN DOUT 0x54 TEMPERATURE VALUE TEMPERATURE VALUE 09012-027 SCLK TEMPERATURE VALUE Figure 14. Continuous Read Mode Rev. PrA | Page 12 of 24 Preliminary Technical Data ADT7320 TEMPERATURE DATA FORMAT TEMPERATURE CONVERSION FORMULAS One LSB of the ADC corresponds to 0.0625°C in 13-bit mode. The ADC can theoretically measure a temperature range of 255°C, but the ADT7320 is guaranteed to measure a low value temperature limit of −40°C to a high value temperature limit of +150°C. The temperature measurement result is stored in the 16-bit temperature value register and is compared with the high temperature limits stored in the TCRIT setpoint register and the THIGH setpoint register. It is also compared with the low temperature limit stored in the TLOW setpoint register. 16-Bit Temperature Data Format Temperature data in the temperature value register, the TCRIT setpoint register, the THIGH setpoint register, and the TLOW setpoint register are represented by a 13-bit, twos complement word. The MSB is the temperature sign bit. The three LSBs, Bit 0 to Bit 2, on power-up, are not part of the temperature conversion result and are flag bits for TCRIT, THIGH, and TLOW. Table 5 shows the 13-bit temperature data format without Bit 0 to Bit 2. The number of bits in the temperature data-word can be extended to 16 bits, twos complement by setting Bit 7 to 1 in the configuration register (Register Address 0x01). When using a 16-bit temperature data value, Bit 0 to Bit 2 are not used as flag bits and are instead the LSB bits of the temperature value. The power-on default setting has a 13-bit temperature data value. Reading back the temperature from the temperature value register requires a 2-byte read. Designers that use a 9-bit temperature data format can still use the ADT7320 by ignoring the last four LSBs of the 13-bit temperature value. These four LSBs are Bit 3 to Bit 6 in Table 5. Digital Output (Binary) Bits[15:3] 1 1101 1000 0000 1 1110 0111 0000 1 1111 1111 1111 0 0000 0000 0000 0 0000 0000 0001 0 0001 1001 0000 0 0110 1001 0000 0 0111 1101 0000 0 1001 0110 0000 Negative Temperature = (ADC Code(dec) − 65,536)/128 where ADC Code uses all 16 bits of the data byte, including the sign bit. Negative Temperature = (ADC Code(dec) − 32,768)/128 where the MSB is removed from the ADC code. 13-Bit Temperature Data Format Positive Temperature = ADC Code(dec)/16 Negative Temperature = (ADC Code(dec) − 8192)/16 where ADC Code uses all 13 bits of the data byte, including the sign bit. Negative Temperature = (ADC Code(dec) − 4096)/16 where the MSB is removed from the ADC code. 10-Bit Temperature Data Format Positive Temperature = ADC Code(dec)/2 Negative Temperature = (ADC Code(dec) − 1024)/2 where ADC Code uses all 10 bits of the data byte, including the sign bit. Negative Temperature = (ADC Code(dec) − 512)/2 where the MSB is removed from the ADC Code. 9-Bit Temperature Data Format Positive Temperature = ADC Code(dec) Table 5. 13-Bit Temperature Data Format Temperature −40°C −25°C −0.0625°C 0°C +0.0625°C +25°C +105°C +125°C +150°C Positive Temperature = ADC Code(dec)/128 Digital Output (Hex) 0x1D80 0x1E70 0x1FFF 0x000 0x001 0x190 0x690 0x7D0 0x960 Negative Temperature = ADC Code(dec) − 512 where ADC Code uses all nine bits of the data byte, including the sign bit. Negative Temperature = ADC Code(dec) − 256 where the MSB is removed from the ADC Code. Rev. PrA | Page 13 of 24 ADT7320 Preliminary Technical Data REGISTERS The ADT7320 contains eight registers: STATUS REGISTER • • • • This 8-bit read-only register (Register Address 0x00) reflects the status of the overtemperature and undertemperature interrupts that can cause the CT and INT pins to go active. It also reflects the status of a temperature conversion operation. The interrupt flags in this register are reset by a read operation to the status register and/or when the temperature value returns within the temperature limits including hysteresis. The RDY bit is reset after a read from the temperature value register. In one-shot and 1 SPS modes, the RDY bit is reset after a write to the one-shot bits. A status register A configuration register Five temperature registers An ID register The status register, temperature value register, and the ID register are read-only. Table 6. ADT7320 Registers Register Address 0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 Description Status Configuration Temperature value ID TCRIT setpoint THYST setpoint THIGH setpoint TLOW setpoint Power-On Default 0x80 0x00 0x0000 0xCX 0x4980 (147°C) 0x05 (5°C) 0x2000 (64°C) 0x0500 (10°C) Table 7. Status Register (Register Address 0x00) Bit(s) [0:3] [4] Default Value 0000 0 Type R R Name Unused TLOW [5] 0 R THIGH [6] 0 R TCRIT [7] 1 R RDY Description Reads back 0. This bit is set to 1 when the temperature goes below the TLOW temperature limit. This bit clears to 0 when the status register is read and/or when the temperature measured goes back above the limit set in the TLOW + THYST setpoint registers. This bit is set to 1 when the temperature goes above the THIGH temperature limit. This bit clears to 0 when the status register is read and/or when the temperature measured goes back below the limit set in the THIGH − THYST setpoint registers. This bit is set to 1 when the temperature goes above the TCRIT temperature limit. This bit clears to 0 when the status register is read and/or when the temperature measured goes back below the limit set in the TCRIT − THYST setpoint registers. This bit goes low when the temperature conversion result is written into the temperature value register. It is reset to 1 when the temperature value register is read. In one-shot and 1 SPS modes, this bit is reset after a write to the one-shot bits. Rev. PrA | Page 14 of 24 Preliminary Technical Data ADT7320 CONFIGURATION REGISTER This 8-bit read/write register stores various configuration modes for the ADT7320, including shutdown, overtemperature and undertemperature interrupts, one-shot, continuous conversion, interrupt pins polarity, and overtemperature fault queues. Table 8. Configuration Register (Register Address 0x01) Bit [0:1] Default Value 00 Type R/W Name Fault queue [2] 0 R/W CT pin polarity [3] 0 R/W INT pin polarity [4] 0 R/W INT/CT mode [5:6] 00 R/W Operation mode [7] 0 R/W Resolution Description These two bits set the number of undertemperature/overtemperature faults that can occur before setting the INT and CT pins. This helps to avoid false triggering due to temperature noise. 00 = 1 fault (default). 01 = 2 faults. 10 = 3 faults. 11 = 4 faults. This bit selects the output polarity of the CT pin. 0 = active low. 1 = active high. This bit selects the output polarity of the INT pin. 0 = active low. 1 = active high. This bit selects between comparator mode and interrupt mode. 0 = interrupt mode. 1 = comparator mode. These two bits set the operational mode for the ADT7320. 00 = continuous conversion (default). When one conversion is finished, the ADT7320 starts another. 01 = one shot. Conversion time is typically 240 ms. 10 = 1 SPS mode. Conversion time is typically 60 ms. This operational mode reduces the average current consumption. 11 = shutdown. All circuitry except interface circuitry is powered down. This bit sets up the resolution of the ADC when converting. 0 = 13-bit resolution. Sign bit + 12 bits gives a temperature resolution of 0.0625°C. 1 = 16-bit resolution. Sign bit + 15 bits gives a temperature resolution of 0.0078125°C. Rev. PrA | Page 15 of 24 ADT7320 Preliminary Technical Data TEMPERATURE VALUE REGISTER ID REGISTER The temperature value register stores the temperature measured by the internal temperature sensor. The temperature is stored as a 16-bit twos complement format. The temperature is read back from the temperature value register (Register Address 0x02) as a 16-bit value. This 8-bit read-only register (Register Address 0x03) stores the manufacturer ID in Bit 7 to Bit 3 and the silicon revision in Bit 2 to Bit 0. Bit 2, Bit 1, and Bit 0 are event alarm flags for TCRIT, THIGH, and TLOW. When the ADC is configured to convert the temperature to a 16-bit digital value, Bit 2, Bit 1, and Bit 0 are no longer used as flag bits and are, instead, used as the LSB bits for the extended digital value. TCRIT SETPOINT REGISTER The 16-bit TCRIT setpoint register (Register Address 0x04) stores the critical overtemperature limit value. A critical overtemperature event occurs when the temperature value stored in the temperature value register exceeds the value stored in this register. The CT pin is activated if a critical overtemperature event occurs. The temperature is stored in twos complement format with the MSB being the temperature sign bit. The default setting for the TCRIT setpoint is 147°C. Table 9. Temperature Value Register (Register Address 0x02) Bit [0] Default Value 0 Type R Name TLOW flag/LSB0 [1] 0 R THIGH flag/LSB1 [2] 0 R TCRIT flag/LSB2 [3:7] [8:14] [15] 00000 0000000 0 R R R Temp Temp Sign Description Flags a TLOW event if the configuration register, Register Address 0x01[7] = 0 (13-bit resolution). When the temperature value is below TLOW,, this bit it set to 1. Contains the Least Significant Bit 0 of the 15-bit temperature value if the configuration register, Register Address 0x01[7] = 1 (16-bit resolution). Flags a THIGH event if the configuration register, Register Address 0x01[7] = 0 (13-bit resolution). When the temperature value is above THIGH, this bit it set to 1. Contains the Least Significant Bit 1 of the 15-bit temperature value if the configuration register, Register Address 0x01[7] = 1 (16-bit resolution). Flags a TCRIT event if the configuration register, Register Address 0x01[7] = 0 (13-bit resolution). When the temperature value exceeds TCRIT, this bit it set to 1. Contains the Least Significant Bit 2 of the 15-bit temperature value if the configuration register, Register Address 0x01[7] = 1 (16-bit resolution). Temperature value in twos complement format. Temperature value in twos complement format. Sign bit, indicates if the temperature value is negative or positive. Table 10. ID Register (Register Address 0x03) Bit [2:0] [7:3] Default Value XXX 11000 Type R R Name Revision ID Manufacture ID Description Contains the silicon revision identification number. Contains the manufacturer identification number. Table 11. TCRIT Setpoint Register (Register Address 0x04) Bit [15:0] Default Value 0x4980 Type R/W Name TCRIT Description 16-bit critical overtemperature limit, stored in twos complement format. Rev. PrA | Page 16 of 24 Preliminary Technical Data ADT7320 THYST SETPOINT REGISTER TLOW SETPOINT REGISTER The THYST setpoint 8-bit register (Register Address 0x05) stores the temperature hysteresis value for the THIGH, TLOW, and TCRIT temperature limits. The temperature hysteresis value is stored in straight binary format using four LSBs. Increments are possible in steps of 1°C from 0°C to 15°C. The value in this register is subtracted from the THIGH and TCRIT values and added to the TLOW value to implement hysteresis. The 16-bit TLOW setpoint register (Register Address 0x07) stores the undertemperature limit value. An undertemperature event occurs when the temperature value stored in the temperature value register is less than the value stored in this register. The INT pin is activated if an undertemperature event occurs. The temperature is stored in twos complement format with the MSB being the temperature sign bit. The default setting for the THYST setpoint is 5°C. The default setting for the TLOW setpoint is 10°C. THIGH SETPOINT REGISTER The 16-bit THIGH setpoint register (Register Address 0x06) stores the overtemperature limit value. An overtemperature event occurs when the temperature value stored in the temperature value register exceeds the value stored in this register. The INT pin is activated if an overtemperature event occurs. The temperature is stored in twos complement format with the most significant bit being the temperature sign bit. The default setting for the THIGH setpoint is 64°C. Table 12. THYST Setpoint Register (Register Address 0x05) Bit [0:3] Default Value 0101 Type R/W Name THYST Description Hysteresis value, from 0°C to 15°C. Stored in straight binary format. The default setting is 5°C. [4:7] 0000 R/W N/A Not used. Table 13. THIGH Setpoint Register (Register Address 0x06) Bit [0:15] Default Value 0x2000 Type R/W Name THIGH Description 16-bit overtemperature limit, stored in twos complement format. Table 14. TLOW Setpoint Register (Register Address 0x07) Bit [0:15] Default Value 0x0500 Type R/W Name TLOW Description 16-bit undertemperature limit, stored in twos complement format. Rev. PrA | Page 17 of 24 ADT7320 Preliminary Technical Data SERIAL INTERFACE PULL-UP VDD VDD VDD ADT7320 SCLK DOUT DIN CS 10kΩ GND CT INT 09012-014 MICROCONTROLLER 10kΩ 0.1µF Figure 15. Typical SPI Interface Connection The ADT7320 has a 4-wire serial peripheral interface (SPI). The interface has a data input pin (DIN) for inputting data to the device, a data output pin (DOUT) for reading data back from the device, and a data clock pin (SCLK) for clocking data into and out of the device. A chip select pin (CS) enables or disables the serial interface. CS is required for correct operation of the interface. Data is clocked out of the ADT7320 on the negative edge of SCLK, and data is clocked into the device on the positive edge of SCLK. SPI COMMAND BYTE All data transactions on the bus begin with the master taking CS from high to low and sending out the command byte. This indicates to the ADT7320 whether the transaction is a read or a write and provides the address of the register for the data transfer. Table 15 shows the command byte. Bit C7 of the command byte must be set to 0 to successfully begin a bus transaction. The SPI interface does not work correctly if a 1 is written into this bit. Bit C6 is the read/write bit; 1 indicates a read, and 0 indicates a write. Bits[C5:C3] contain the target register address. One register can be read from or written to per bus transaction. Bit C2 activates a continuous read mode on the temperature value register only. When this bit is set, the serial interface is configured so that the temperature value register can be continuously read. When the command word is 01010100 (0x54), the contents of the temperature value register can be read out without requiring repeated writes to set the address bits. Simply sending 16 SCLK clocks to the ADT7320 clocks the contents of the temperature value register onto the DOUT pin. Table 15. Command Byte C7 0 C6 R/W C5 C4 C3 Register address C2 Continuous read C1 0 C0 0 Rev. PrA | Page 18 of 24 Preliminary Technical Data ADT7320 Figure 16 shows a write to an 8-bit register, and Figure 17 shows a write to a 16-bit register. WRITING DATA Data is written to the ADT7320 in eight bits or 16 bits, depending on the addressed register. The first byte written to the device is the command byte, with the read/write bit set to 0. The master then supplies the 8-bit or 16-bit input data on the DIN line. The ADT7320 clocks the data into the register addressed in the command byte on the positive edge of SCLK. The master finishes the write by pulling CS high. The master must begin a new write transaction on the bus for every register write. Only one register is written to per bus transaction. CS 1 2 3 4 5 6 7 8 9 10 11 DIN 0 R/W C6 REGISTER ADDR CONT READ 0 0 C4 C2 C1 C0 C5 C3 13 14 15 16 8-BIT DATA 8-BIT COMMAND BYTE C7 12 D7 D6 D5 D4 D3 D2 D1 09012-028 SCLK D0 Figure 16. Writing to an 8-Bit Register CS 1 2 3 4 5 6 7 8 9 10 11 12 13 14 DIN 0 R/W REGISTER ADDR C6 C5 C4 C3 16 17 22 23 24 16-BIT DATA 8-BIT COMMAND BYTE C7 15 CONT READ 0 0 C2 C1 C0 D15 D14 D13 D12 D11 D10 Figure 17. Writing to a 16-Bit Register Rev. PrA | Page 19 of 24 D9 D8 D7 D2 D1 D0 09012-029 SCLK ADT7320 Preliminary Technical Data CS SCLK 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 8-BIT COMMAND WORD 0 DIN C7 R/W REGISTER ADDR C6 C4 C5 C3 CONT READ 0 0 C2 C1 C0 D7 DOUT D6 D5 D4 D3 D2 D1 09012-030 8-BIT DATA D0 Figure 18. Read from an 8-Bit Register CS SCLK 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 22 23 24 8-BIT COMMAND BYTE DIN 0 R/W C7 C6 CONT REGISTER ADDR READ C5 C4 C3 C2 0 0 C1 C0 DOUT D15 D14 D13 D12 D11 D10 D9 D8 D7 D2 D1 D0 09012-031 16-BIT DATA Figure 19. Read from a 16-Bit Register READING DATA INTERFACING TO DSPs OR MICROCONTROLLERS A read transaction begins when the master writes the command byte to the ADT7320 with the read/write bit set to 1. The master then supplies 8 or 16 clock pulses, depending on the addressed register, and the ADT7320 clocks out data from the addressed register on the DOUT line. Data is clocked out on the first falling edge of SCLK following the command byte. The ADT7320 can be operated with CS used as a frame synchronization signal. This scheme is useful for DSP interfaces. In this case, the first bit (MSB) is effectively clocked out by CS because CS normally occurs after the falling edge of SCLK in DSPs. SCLK can continue to run between data transfers, provided that the timing numbers are obeyed. The read transaction finishes when the master takes CS high. CS can be tied to ground and the serial interface can operate in a 3-wire mode. DIN, DOUT, and SCLK are used to communicate with the ADT7320 in this mode. The master must begin a new read transaction on the bus for every register read. Only one register is read per bus transaction. However, in continuous read mode, Command Byte C2 = 1 and the temperature value register can be read from continuously. The master sends 16 clock pulses on SCLK, and the temperature value is clocked out on DOUT. See Figure 18 and Figure 19. For microcontroller interfaces, it is recommended that SCLK idle high between data transfers. SERIAL INTERFACE RESET The serial interface can be reset by writing a series of 1s on the DIN input. If a Logic 1 is written to the ADT7320 line for at least 32 serial clock cycles, the serial interface is reset. This ensures that the interface can be reset to a known state if the interface gets lost due to a software error or some glitch in the system. Reset returns the interface to the state in which it is expecting a write to the communications register. This operation resets the contents of all registers to their power-on values. Following a reset, the user should allow a period of 500 μs before addressing the serial interface. Rev. PrA | Page 20 of 24 Preliminary Technical Data ADT7320 INT AND CT OUTPUTS Comparator Mode The INT and CT pins are open drain outputs, and both pins require a 10 kΩ pull-up resistor to VDD. In comparator mode, the INT pin returns to its inactive status when the temperature drops below the THIGH − THYST limit or rises above the TLOW + THYST limit. UNDERTEMPERATURE AND OVERTEMPERATURE DETECTION Putting the ADT7320 into shutdown mode does not reset the INT state in comparator mode. The INT and CT pins have two undertemperature/overtemperature modes: comparator mode and interrupt mode. The interrupt mode is the default power-up overtemperature mode. The INT output pin becomes active when the temperature is greater than the temperature stored in the THIGH setpoint register or less than the temperature stored in the TLOW setpoint register. How this pin reacts after this event depends on the overtemperature mode selected. Interrupt Mode In interrupt mode, the INT pin goes inactive when any ADT7320 register is read. When the INT pin is reset, it goes active again only when the temperature is greater than the temperature stored in the THIGH setpoint register or less than the temperature stored in the TLOW setpoint register. Figure 20 illustrates the comparator and interrupt modes for events exceeding the THIGH limit with both pin polarity settings. Figure 21 illustrates the comparator and interrupt modes for events exceeding the TLOW limit with both pin polarity settings. Placing the ADT7320 into shutdown mode resets the INT pin in interrupt mode. TEMPERATURE 82°C 81°C THIGH 80°C 79°C 78°C 77°C 76°C THIGH – THYST 75°C 74°C 73°C INT PIN (COMPARATOR MODE) POLARITY = ACTIVE LOW INT PIN (INTERRUPT MODE) POLARITY = ACTIVE LOW INT PIN (COMPARATOR MODE) POLARITY = ACTIVE HIGH TIME READ READ READ Figure 20. INT Output Temperature Response Diagram for THIGH Overtemperature Events Rev. PrA | Page 21 of 24 09012-020 INT PIN (INTERRUPT MODE) POLARITY = ACTIVE HIGH ADT7320 Preliminary Technical Data TEMPERATURE –13°C –14°C TLOW + THYST –15°C –16°C –17°C –18°C –19°C TLOW –20°C –21°C –22°C INT PIN (COMPARATOR MODE) POLARITY = ACTIVE LOW INT PIN (INTERRUPT MODE) POLARITY = ACTIVE LOW INT PIN (COMPARATOR MODE) POLARITY = ACTIVE HIGH TIME READ READ READ 09012-021 INT PIN (INTERRUPT MODE) POLARITY = ACTIVE HIGH Figure 21. INT Output Temperature Response Diagram for TLOW Undertemperature Events Rev. PrA | Page 22 of 24 Preliminary Technical Data ADT7320 APPLICATIONS INFORMATION THERMAL RESPONSE TIME TEMPERATURE MONITORING The time required for a temperature sensor to settle to a specified accuracy is a function of the thermal mass of the sensor and the thermal conductivity between the sensor and the object being sensed. Thermal mass is often considered equivalent to capacitance. Thermal conductivity is commonly specified using the symbol, Q, and can be thought of as thermal resistance. It is commonly specified in units of degrees per watt of power transferred across the thermal joint. The time required for the part to settle to the desired accuracy is dependent on the thermal contact established in that particular application and the equivalent power of the heat source. In most applications, the settling time is best determined empirically. The ADT7320 is ideal for monitoring the thermal environment within hazardous automotive applications. The die accurately reflects the exact thermal conditions that affect nearby integrated circuits. SUPPLY DECOUPLING The ADT7320 should be decoupled with a 0.1 μF ceramic capacitor between VDD and GND. This is particularly important when the ADT7320 is mounted remotely from the power supply. Precision analog products, such as the ADT7320, require a well-filtered power source. The ADT7320 measures and converts the temperature at the surface of its own semiconductor chip. When the ADT7320 is used to measure the temperature of a nearby heat source, the thermal impedance between the heat source and the ADT7320 must be considered. When the thermal impedance is determined, the temperature of the heat source can be inferred from the ADT7320 output. As much as 60% of the heat transferred from the heat source to the thermal sensor on the ADT7320 die is discharged via the copper tracks and the bond pads. Of the pads on the ADT7320, the GND pad transfers most of the heat. Therefore, to measure the temperature of a heat source, it is recommended that the thermal resistance between the ADT7320 GND pad and the GND of the heat source be reduced as much as possible. Because the ADT7320 operates from a single supply, it may seem convenient to tap into the digital logic power supply. Unfortunately, the logic supply is often a switch-mode design, which generates noise in the 20 kHz to 1 MHz range. In addition, fast logic gates can generate glitches hundreds of millivolts in amplitude due to wiring resistance and inductance. If possible, the ADT7320 should be powered directly from the system power supply. This arrangement, shown in Figure 22, isolates the analog section from the logic-switching transients. Even if a separate power supply trace is not available, generous supply bypassing reduces supply-line induced errors. Local supply bypassing consisting of a 0.1 μF ceramic capacitor is critical for the temperature accuracy specifications to be achieved. This decoupling capacitor must be placed as close as possible to the VDD pin of the ADT7320. 0.1µF ADT7320 POWER SUPPLY 09012-022 TTL/CMOS LOGIC CIRCUITS Figure 22. Use of Separate Traces to Reduce Power Supply Noise Rev. PrA | Page 23 of 24 ADT7320 Preliminary Technical Data OUTLINE DIMENSIONS PIN 1 INDICATOR 4.10 4.00 SQ 3.90 0.35 0.30 0.25 0.65 BSC 16 13 PIN 1 INDICATOR 12 1 EXPOSED PAD 4 2.70 2.60 SQ 2.50 9 0.80 0.75 0.70 0.45 0.40 0.35 8 BOTTOM VIEW 0.05 MAX 0.02 NOM COPLANARITY 0.08 0.20 REF SEATING PLANE 0.25 MIN FOR PROPER CONNECTION OF THE EXPOSED PAD, REFER TO THE PIN CONFIGURATION AND FUNCTION DESCRIPTIONS SECTION OF THIS DATA SHEET. 012909-B TOP VIEW 5 COMPLIANT TO JEDEC STANDARDS MO-220-WGGC. Figure 23. 16-Lead Lead Frame Chip Scale Package [LFCSP_WQ] 4 mm × 4 mm Body, Very Very Thin Quad (CP-16-17) Dimensions shown in millimeters ORDERING GUIDE Model1 ADT7320UCPZ ADT7320UCPZ-R2 ADT7320UCPZ-RL7 EVAL-ADT7X20EBZ 1 2 Temperature Range −40°C to +150°C −40°C to +150°C −40°C to +150°C Temperature Accuracy2 ±0.25°C ±0.25°C ±0.25°C Z = RoHS Compliant Part. Maximum accuracy over the −20°C to +105°C temperature range. ©2010 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. PR09012-0-6/10(PrA) Rev. PrA | Page 24 of 24 Package Description 16-lead LFCSP_WQ 16-Lead LFCSP_WQ 16-Lead LFCSP_WQ Evaluation Board Package Option CP-16-17 CP-16-17 CP-16-17