18-Channel Gamma Buffer with Regulator ADD8709 FEATURES APPLICATIONS TFT LCD monitor panels TFT LCD TV panels GENERAL DESCRIPTION The ADD8709 is an 18-channel gamma reference for use in high-resolution TFT LCD monitor and TV panels. The output buffers feature low offset voltage and high current drive under transient load conditions to provide a more accurate and stable gamma curve. Two channels swing to VDD and two channels swing to GND, increasing the overall range of the curve. An on-board voltage regulator is available for external applications. Here again, external component costs are reduced and the quality of the gray scale is increased. FUNCTIONAL BLOCK DIAGRAM 48 47 46 45 44 43 42 41 40 39 38 37 1 36 2 35 VREG 3 34 4 33 5 32 6 31 18 18 7 30 8 29 9 28 10 27 11 26 12 25 13 14 15 16 17 18 19 20 21 22 23 24 Figure 1. 48-Lead LQFP The ADD8709 is specified over the temperature range of –40°C to +100°C and comes in a robust, low profile quad flat package. Rev. 0 Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.326.8703 © 2004 Analog Devices, Inc. All rights reserved. 04715-0-001 Integrated voltage regulator Upper/lower buffers swing to VDD/GND Single-supply operation: 7.5 V to 16.5 V Continuous current drive: 15 mA High peak output current: 150 mA Low offset voltage: 15 mV max Output voltage stable under transient load conditions ADD8709 TABLE OF CONTENTS Electrical Characteristics ................................................................. 3 Absolute Maximum Ratings............................................................ 4 Pin Configuration and Function Descriptions............................. 5 Typical Applications Circuit............................................................ 7 Typical Performance Characteristics ............................................. 8 Application Notes ........................................................................... 12 Maximum Power Dissipation ................................................... 12 Operating Temperature Range ................................................. 12 Outline Dimensions ....................................................................... 13 Ordering Guide........................................................................... 14 REVISION HISTORY 7/04—Revision 0: Initial Version Rev. 0 | Page 2 of 16 ADD8709 ELECTRICAL CHARACTERISTICS 7.5 V ≤ VDD ≤ 16 V, TA @ 25°C, unless otherwise noted. Table 1. Parameter ALL DEVICES POWER SUPPLY Supply Voltage Supply Current VS ISYS VOLTAGE REGULATOR Dropout Voltage ∆VDO Line Regulation Load Regulation Load Current Thermal Regulation GAMMA BUFFERS POWER SUPPLY Power Supply Rejection Ratio INPUT CHARACTERISTICS Offset Voltage Offset Voltage Drift Input Bias Current Symbol REGLINE REGLOAD IO REGTHERMAL Conditions Min Typ Max Unit No load –20°C ≤ TA ≤ +105°C 10.5 16 15 17 V mA mA IL = 100 µA IL = 5 mA VIN = 8.5 V to 16.5 V, VOUT = 8 V IO = 100 µA to 10 mA 100 310 0.01 0.02 5 0.005 150 350 0.20 0.10 mV mV %/V %/mA mA %/W 7.5 PSRR VDD = 7 V to 17 V, –20°C ≤ TA ≤ +105°C VOS ∆VOS/∆T IB –20°C ≤ TA ≤ +105°C 68 90 5 20 0.5 400 1 mV µV/°C µA µA V kΩ pF 15 5 mV mV 6 4.5 1.1 55 V/µs MHz µs Degrees –20°C ≤ TA ≤ +105°C Input Voltage Range Input Impedance Input Capacitance OUTPUT CHARACTERISTICS Output Performance (V1, V8, V9, V18) Output Performance (V2 to V7, V10 to V17) DYNAMIC PERFORMANCE Slew Rate Bandwidth Settling Time to 0.1% Phase Margin 1 0 ZIN CIN ∆VOUT1 ∆VOUT1 IL = 20 mA, VDD = 16 V IL = 5 mA, VDD = 16 V SR BW tS φo RL = 10 kΩ, CL = 200 pF –3 dB, RL = 10 kΩ, CL = 200 pF 1 V, RL = 10 kΩ, CL = 200 pF RL = 10 kΩ, CL = 200 pF ∆VOUT is the shift from the desired output voltage under the specified current load. Rev. 0 | Page 3 of 16 4 dB 15 1.1 1.5 VDD ADD8709 ABSOLUTE MAXIMUM RATINGS Table 2. Parameter Supply Voltage (VDD) Input Voltage Storage Temperature Range Operating Temperature Range1 Junction Temperature Range Lead Temperature Range (Soldering, 60 sec) ESD Tolerance (HBM) ESD Tolerance (MM) Rating 18 V –0.5 V to VDD –65°C to +150°C −40°C to +100°C –65°C to +150°C 300°C ±2000 V ±150 V Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Table 3. Package Characteristics Package Type LQFP (ST) 1 θJA 74.57 Unit °C/W See Application Notes section. ESD CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although this product features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. Rev. 0 | Page 4 of 16 ADD8709 GND GND VOUT18 VOUT17 VOUT16 VOUT15 VOUT14 VOUT13 VDD GND VOUT12 VOUT11 48 47 46 45 44 43 42 41 40 39 38 37 1 36 VOUT10 2 35 VOUT9 VOUT8 VOUT7 PIN 1 IDENTIFIER VDD 3 34 REGOUT 4 33 VIN18 5 32 VDD VIN17 6 31 GND VIN16 7 30 VOUT6 VIN15 8 29 VOUT5 VIN14 9 28 VOUT4 VIN13 10 27 VOUT3 VIN12 11 26 VOUT2 VIN11 12 25 VOUT1 ADD8709 13 14 15 16 17 18 19 20 21 22 23 24 VIN10 VIN9 VIN8 VIN7 VIN6 VIN5 VIN4 VIN3 VIN2 VIN1 GND VDD TOP VIEW (Not to Scale) 04715-0-002 REGFB VDD PIN CONFIGURATION AND FUNCTION DESCRIPTIONS Figure 2. 48-Lead Low Profile Quad Flat Package (ST-48) Table 4. Pin Function Descriptions Pin No. 1 Mnemonic REGFB Name Regulator Feedback 2 3 4 GND VDD REGOUT Ground Supply Regulator Output 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 VIN18 VIN17 VIN16 VIN15 VIN14 VIN13 VIN12 VIN11 VIN10 VIN9 VIN8 VIN7 VIN6 VIN5 VIN4 VIN3 VIN2 VIN1 GND VDD VOUT1 VOUT2 Description Compares a percentage of the regulator output to the internal voltage reference. Internal resistors are used to program the desired regulator output voltage. Ground. Nominally 0 V. Supply voltage or source voltage. Nominally 16 V. Provides a regulated output voltage for use as a reference for additional external gamma channels. Input Buffer input. Ground Supply Ground. Nominally 0 V. Supply voltage. Nominally 16 V. Output Buffer output. Designed to have higher sink than source capability. Rev. 0 | Page 5 of 16 ADD8709 Pin No. 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 Mnemonic VOUT3 VOUT4 VOUT5 VOUT6 GND VDD VOUT7 VOUT8 VOUT9 VOUT10 VOUT11 VOUT12 GND VDD VOUT13 VOUT14 VOUT15 VOUT16 VOUT17 VOUT18 GND VDD Name Description Output Buffer output. Ground Supply Ground. Nominally 0 V. Supply voltage. Nominally 16 V. Output Buffer output. Ground Supply Ground. Nominally 0 V. Supply voltage. Nominally 16 V. Output Buffer output. Output Buffer output. Designed to have higher source than sink capability. Ground Supply Ground. Nominally 0 V. Supply voltage. Nominally 16 V. Rev. 0 | Page 6 of 16 ADD8709 TYPICAL APPLICATIONS CIRCUIT VFB GND VDD REGIN VREG REGFB REGOUT VOLTAGE REGULATOR ADD8709 GAMMA BUFFERS COLUMN DRIVER VIN18 VOUT18 18 GAMMA 18 VIN17 VOUT17 17 GAMMA 17 VIN16 VOUT16 16 GAMMA 16 VIN15 VOUT15 15 GAMMA 15 *EXTERNAL RESISTORS TO SET GAMMA VOLTAGES VIN4 VOUT4 4 GAMMA 4 VIN3 VOUT3 3 GAMMA 3 VIN2 VOUT2 2 GAMMA 2 VIN1 GND Figure 3. Rev. 0 | Page 7 of 16 GAMMA 1 04715-0-004 VOUT1 1 ADD8709 TYPICAL PERFORMANCE CHARACTERISTICS 30 12 CH1 SOURCE CH1 SINK 11 9 8 7 6 5 4 3 04715-0-007 2 1 0 0 2 4 6 8 10 12 SUPPLY VOLTAGE (V) 14 16 25 20 15 10 5 0 0.1 18 CH2 SOURCE CH2 SINK 04712-0-035 OUTPUT VOLTAGE ERROR (mV) SUPPLY CURRENT (mA) 10 1.0 10 LOAD CURRENT (mA) 100 Figure 7. Output Voltage Error vs. Load Current Figure 4. Supply Current vs. Supply Voltage 30 11.0 CH3 SOURCE CH3 SINK 10.8 10.7 10.6 04715-0-008 10.5 0 20 40 60 80 100 20 15 10 5 0 0.1 120 TEMPERATURE (°C) OUTPUT VOLTAGE ERROR (mV) 10 5 ILOAD = 0mA –5 –10 –15 –20 –25 ISOURCE = 25mA –30 –35 –20 –10 ISOURCE = 15mA I SOURCE = 5mA 0 10 20 30 40 50 60 70 TEMPERATURE (°C) 80 04715-0-009 OUTPUT VOLTAGE ERROR (mV) CH10 SOURCE CH10 SINK ISINK = 5mA 0 100 30 ISINK = 25mA ISINK = 15mA 15 1.0 10 LOAD CURRENT (mA) Figure 8. Output Voltage Error vs. Load Current Figure 5. Supply Current vs. Temperature 20 CH9 SOURCE CH9 SINK 25 20 15 10 5 0 0.1 90 100 110 120 Figure 6. Output Voltage Error vs. Temperature CH16 SOURCE CH16 SINK 04712-0-037 10.4 –20 25 04712-0-036 OUTPUT VOLTAGE ERROR (mV) SUPPLY CURRENT (mA) 10.9 1.0 10 LOAD CURRENT (mA) Figure 9. Output Voltage Error vs. Load Current Rev. 0 | Page 8 of 16 100 ADD8709 80 70 CH18 SOURCE CH18 SINK 60 20 15 10 5 0 0.1 1.0 10 LOAD CURRENT (mA) 50 40 30 20 04712-0-016 NUMBER OF AMPLIFIERS 25 CH17 SOURCE CH17 SINK 04712-0-038 OUTPUT VOLTAGE ERROR (mV) 30 10 0 –100 –80 100 Figure 10. Output Voltage Error vs. Load Current –60 –40 –20 0 20 40 60 OUTPUT VOLTAGE ERROR (mV) 80 100 Figure 13. Output Voltage Error/Gamma 10 to 16 80 25 70 NUMBER OF AMPLIFIERS NUMBER OF AMPLIFIERS 20 60 50 40 30 20 15 10 0 –25 –21 –17 –13 –9 –5 –1 3 7 11 15 OUTPUT VOLTAGE ERROR (mV) 19 04712-0-015 04712-0-013 5 10 0 –100 23 Figure 11. Output Voltage Error/Gamma 1 and 2 –80 –60 –40 –20 0 20 40 60 OUTPUT VOLTAGE ERROR (mV) 80 100 Figure 14. Output Voltage Error/Gamma 17 and 18 120 15 14 13 OUTPUT VOLTAGE (V) 12 80 60 40 11 10 ILOAD = 0mA ILOAD = 5mA ILOAD = 10mA 9 8 7 6 5 4 0 –50 –42 –34 –26 –18 –10 –2 6 14 22 30 OUTPUT VOLTAGE ERROR (mV) 38 04712-0-017 3 20 04712-0-014 NUMBER OF AMPLIFIERS 100 2 1 0 0 46 Figure 12. Output Voltage Error/Gamma 3 to 9 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 INPUT VOLTAGE (V) Figure 15. Dropout Characteristics Rev. 0 | Page 9 of 16 ADD8709 1000 14.45 0mA 900 14.40 REGULATOR OUTPUT (V) 700 600 500 400 300 200 5mA 14.35 14.30 10mA 100 0 14.20 –20 –10 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 OUTPUT CURRENT (mA) Figure 16. Dropout Voltage vs. Output Current 0 10 20 30 40 50 60 70 TEMPERATURE (°C) 80 90 100 110 Figure 19. Regulator Output vs. Temperature 800 18 700 650 600 400 INPUT VOLTAGE (V) 17 550 500 5mA 450 400 350 300 250 200 200 0 16 –200 –400 15 100 50 04712-0-019 150 0mA 0 –25 –15 –5 5 15 25 35 45 55 65 TEMPERATURE (°C) 75 85 14 95 105 115 TIME (100µs/DIV) Figure 20. Regulator Line Transient Response Figure 17. Dropout Voltage vs. Temperature 14.5 CLOAD = 1µF –20°C 14.3 LOAD CURRENT (mA) 20 0 °C 14.2 +25°C 14.1 +55°C 14.0 +85°C 13.9 +95°C 0 –20 –40 0.1 13.8 04712-0-020 +105°C 13.7 13.6 0 2 4 6 8 10 12 14 LOAD CURRENT (mA) 16 18 20 5 TIME (100µs/DIV) Figure 21. Regulator Load Transient Response Figure 18. Regulator Output vs. ILOAD Over Temperature Rev. 0 | Page 10 of 16 OUTPUT VOLTAGE CHANGE (mV) 40 14.4 REGULATOR OUTPUT (V) OUTPUT VOLTAGE CHANGE (mV) CLOAD = 1µF 10mA 04712-0-022 750 DROPOUT VOLTAGE (mV) 04712-0-021 04712-0-018 14.25 04712-0-023 DROPOUT VOLTAGE (mV) 800 ADD8709 11 10 10V PULSE 120pF 320pF 520pF 1nF 10nF 10 9 7 2kΩ 10kΩ 0 1kΩ GAIN (dB) AMPLITUDE (V) 8 GAMMA 10-18 6 5 4 –10 –20 150Ω 3 04712-0-012 1 0 –200 0 200 400 –40 100k 600 800 1000 1200 1400 1600 1800 TIME (ns) Figure 22. Transient Load Response vs. Capacitive Loading 20 1040pF 1M 10M FREQUENCY (Hz) 100M Figure 25. Frequency Response vs. Resistive Loading 10 VDD = 16V VCOM 540pF 340pF 10 04712-0-032 –30 2 2kΩ 0 100pF 50pF 10kΩ GAIN (dB) GAIN (dB) –10 0 –10 1kΩ –20 –30 150Ω 1M 10M FREQUENCY (Hz) 100M Figure 23. Frequency Response vs. Capacitive Loading 2kΩ 10kΩ 0 –20 150Ω –30 04712-0-033 GAIN (dB) 1kΩ –10 –40 100k 1M 10M FREQUENCY (Hz) –50 100k 1M 10M FREQUENCY (Hz) Figure 26. Frequency Response vs. Resistive Loading 10 GAMMA 1-9 –40 04712-0-034 –30 100k 04712-0-030 –20 100M Figure 24. Frequency Response vs. Resistive Loading Rev. 0 | Page 11 of 16 100M ADD8709 APPLICATION NOTES MAXIMUM POWER DISSIPATION Example 1 The maximum safe power dissipation in the ADD8709 package is limited by the associated rise in junction temperature (TJ) on the die. At approximately 150°C, the glass transition temperature, the properties of the plastic change. Even temporarily exceeding this temperature limit may change the stresses that the package exerts on the die, permanently shifting the parametric performance of the ADD8709. Exceeding a junction temperature of 175°C for an extended period can result in changes in the silicon devices, potentially causing failure. The estimated power consumption of the ADD8709 in extreme cases is as follows: OPERATING TEMPERATURE RANGE VDD × ISYS = 15 V × 15 mA VOUT × IOUT = (8 V × 5 mA/channel) × 18 channels VDO × IO = 0.6 V × 5 mA WMAX = (15 V × 15 mA) + (8 V × 5 mA/channel × 18 channel) + (0.6 V × 5 mA) = 0.948 W θJA = 74.57°C/W, TAMB MAX = 45°C TJ = 45°C + (74.57°C/W) × (0.948 W) = 115.7°C The maximum junction temperature is as follows: TJ = TAMB MAX + θJA × WMAX where: TAMB MAX = maximum ambient temperature specified on the data sheet. θJA = junction-to-ambient thermal resistance, in °C/watt. WMAX = maximum power dissipated in the device, in watts. Here, 150°C is the maximum junction temperature that is guaranteed before the part breaks down, while 125°C is the maximum process limit. Because TJ is < 150°C and < 125°C, this example demonstrates a condition where the part should perform within process limits. For the ADD8709, WMAX can be calculated with the following equation: WMAX = VDD × ISYS + VOUT × IOUT + VDO × IO where: VDD × ISYS = nominal system power requirements VOUT × IOUT = amplifier load power dissipation VDO × IO = regulator load power dissipation Rev. 0 | Page 12 of 16 ADD8709 OUTLINE DIMENSIONS 0.75 0.60 0.45 9.00 BSC SQ 1.60 MAX 37 48 36 1 1.45 1.40 1.35 0.15 0.05 10° 6° 2° SEATING PLANE PIN 1 SEATING PLANE 7.00 BSC SQ TOP VIEW 0.20 0.09 (PINS DOWN) VIEW A 7° 3.5 ° 0° 0.08 MAX COPLANARITY 25 12 13 0.50 BSC VIEW A ROTATED 90° CCW COMPLIANT TO JEDEC STANDARDS MS-026BBC Figure 27. 48-Lead Low Profile Quad Flat Package (ST-48) Dimensions shown in millimeters Rev. 0 | Page 13 of 16 24 0.27 0.22 0.17 ADD8709 ORDERING GUIDE Model1 ADD8709ASTZ-REEL2 ADD8709ASTZ-REEL72 1 2 Temperature Range –40°C to +100°C –40°C to +100°C Package Description 48-Lead Low Profile Quad Flat Package 48-Lead Low Profile Quad Flat Package Available in reels only. Z = Pb-free part. Rev. 0 | Page 14 of 16 Package Option ST-48 ST-48 ADD8709 NOTES Rev. 0 | Page 15 of 16 ADD8709 NOTES © 2004 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D04715–0–7/04(0) Rev. 0 | Page 16 of 16