ETC PAM99700

A Product Line of
Diodes Incorporated
PAM99700
UNIVERSAL HIGH BRIGHTNESS LED DRIVER
Description
Pin Assignments
The PAM99700 is an open loop current mode control LED driver IC.
The PAM99700 can be programmed to operate in either a constant
frequency or constant off-time mode. It includes a 12 - 500V regulator
which allows it to work from a wide range of input voltages without the
need for an external low voltage supply. The PAM99700 includes a
PWM dimming input that can accept an external control signal with a
duty ratio of 0 - 100% and a frequency of up to a few kilohertz. It also
includes a 0 - 250mV linear dimming input which can be used for
linear dimming of the LED current.
The PAM99700 is ideally suited for buck LED drivers. Since the
PAM99700 operates in open loop current mode control, the controller
achieves good output current regulation without the need for any loop
compensation. PWM dimming response is limited only by the rate of
rise and fall of the inductor current, enabling very fast rise and fall
times. The PAM99700 requires only three external components (apart
from the power stage) to produce a controlled LED current making it
an ideal solution for low cost LED drivers.
Features
•
Switch Mode Controller for Single Switch LED Drivers
•
Open Loop Peak Current Controller
•
Constant Frequency or Constant Off-Time Operation
•
Linear and PWM Dimming Capability
•
Requires Few External Components for Operation
•
Application From a Few mA to More than 1A Output
Applications
PAM99700
Document number: DSxxxxx Rev. 1 - 1
•
DC/DC or AC/DC LED Driver Applications
•
RGB Backlighting LED Driver
•
Back Lighting of Flat Panel Displays
•
General Purpose Constant Current Source
•
Signage and Decorative LED Lighting
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PAM99700
Typical Applications Circuit
Pin Descriptions
Pin
Name
VIN
Pin Number
SOP-8
SOP-16
1
1
Function
This pin is the input of a 12V-500V regulator.
CS
2
4
GND
3
5
This pin is the current sense pin used to sense the FET current by means of an external sense
resistor. When this pin exceeds the lower of either the internal 250mV or the voltage at the LD pin,
the gate output goes low.
Ground return for all internal circuitry. This pin must be electrically connected to the ground of the
power train.
GATE
4
8
This pin is the output gate driver for an external N-Channel power MOSFET.
PWMD
5
9
VDD
6
12
LD
7
13
RT
8
14
NC
—
2, 3, 6, 7,
10, 11, 15, 16
PAM99700
Document number: DSxxxxx Rev. 1 - 1
This is the PWM dimming input of the IC. When this pin is pulled to GND, the gate driver is turned
off. When the pin is pulled high, the gate driver operates normally.
This is the power supply pin for all internal circuits. It must be bypassed with a low ESR capacitor
to GND (~ 10μF).
This pin is the linear dimming input an d sets the current sense threshold as long as the voltage at
the pin is less than 250mV (typ).
This pin sets the oscillator frequency. When a resistor is connected between RT and GND, the
PAM99700 operates in constant frequency mode. When the resistor is connected between RT
and GATE, the IC operates in constant off-time mode.
Not connected.
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PAM99700
Functional Block Diagram
Absolute Maximum Ratings (@TA = +25°C, unless otherwise specified.)
These are stress ratings only and functional operation is not implied. Exposure to absolute maximum ratings for prolonged time periods may
affect device reliability. All voltages are with respect to ground.
Parameter
Maximum Junction Temperature
Storage Temperature
Soldering Temperature
Rating
150
-65 to +150
300, 5sec
Unit
°C
Recommended Operating Conditions (@TA = +25°C, unless otherwise specified.)
Parameter
Supply Voltage
Ambient Temperature Range
Junction Temperature Range
Rating
12 to 500
-40 to +85
-40 to +125
Unit
V
°C
°C
Thermal Information
Parameter
Thermal Resistance (Junction to Ambient)
PAM99700
Document number: DSxxxxx Rev. 1 - 1
Package
SOP-8
SOP-16
Symbol
θJA
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Max
115
110
Unit
°C/W
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PAM99700
Electrical Characteristics (@TA = +25°C, unless otherwise specified.)
Input Voltage Range
Parameter
VINDC
Test Conditions
DC Input Voltage
Shutdown Mode Supply Current
IINSD
Pin PWMD to GND
VDD
VIN > 20V
Internally Regulated Voltage
Symbol
Min
Typ
12
Max
500
0.1
6
Units
V
mA
10
V
Current Sense Pul-In Threshold Voltage
VCS,TH
250
mV
Current Sense Blanking Interval
TBLANK
250
Ns
Gate Sourcing Current
ISOURCE
VGATE = 0V
0.2
Gate Sinking Current
ISINK
VGATE = VDD
0.2
Gate Output Rise Time
tRISE
CGATE = 1nF
Gate Output Fall Time
tTALL
CGATE = 1nF
ns
ns
30
50
RT = 510kΩ
49
RT = 226kΩ
74
92
110
2.4
EN Threshold High
VEH
VIN = 12V to 500V
EN Threshold Low
VEL
OTP
OTH
VIN = 12V to 500V
Document number: DSxxxxx Rev. 1 - 1
50
41
fOSC
PAM99700
A
30
37
Oscillator Frequency
Over Temperature Protection
OTP Hysteresis
A
V
1.0
160
50
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kHz
V
°C
°C
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PAM99700
Typical Performance Characteristics
(@TA = +25°C, VIN = 60V, 1WLED, RT = 510KΩ, L = 5.2mH, unless otherwise specified.)
PAM99700
Document number: DSxxxxx Rev. 1 - 1
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PAM99700
Typical Performance Characteristics (cont.)
(@TA = +25°C, VIN = 110VAC, 1WLED, RT = 510KΩ, L = 5.2mH, RCS = 0.68Ω, unless otherwise specified.)
PAM99700
Document number: DSxxxxx Rev. 1 - 1
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PAM99700
Application Information
The PAM99700 is optimized to drive buck LED drivers using open-loop peak current mode control. This method of control enables fairly accurate
LED current control without the need for high side current sensing or the design of any closed loop controllers. The IC uses very few external
components and enables both Linear and PWM dimming of the LED current.
A resistor connected to the RT pin programs the frequency of operation (or the off-time). The oscillator produces pulses at regular intervals.
These pulses set the SR fl ip- flop in the PAM99700 which causes the gate driver to turn on. The same pulses also start the blanking timer which
inhibits the reset input of the SR flip flop and prevent false turn-offs due to the turn-on spike. When the FET turns on, the current through the
inductor starts ramping up. This current flows through the external sense resistor RCS and produces a ramp voltage at the CS pin. The
comparators are constantly comparing the CS pin voltage to both the voltage at the LD pin and the internal 250mV. Once the blanking timer is
complete, the output of these comparators is allowed to reset the flip flop. When the output of either one of the two comparators goes high, the
flip flop is reset and the gate output goes low. The gate goes low until the SR flip flop is set by the oscillator. Assuming a 30% ripple in the
inductor, the current sense resistor RCS can be set using:
Rcs = 0.25V (or VLD)/1.15 * ILED(A)
Constant frequency peak current mode controlhas an inherent disadvantage - at duty cycles greater than 0.5, the control scheme goes into
subharmonic oscillations. To prevent this, an artificial slope is typically added to the current sense waveform. This slope compensation scheme
will affect the accuracy of the LED current in the present form. However, a constant off-time peak current control scheme does not have this
problem and can easily operate at duty cycles greater then 0.5 and also gives inherent input volt-age rejection making the LED current almost
insensitive to input voltage variations. But, it leads to variable frequency operation and the frequency range depends greatly on the input and
output voltage variation. PAM99700 makes it easy to switch between the two modes of operation by changing one connection (see oscillator
section).
Input Voltage Regulator
The PAM99700 can be powered directly from its VIN pin and can work from 12 - 500V DC at its VIN pin. When a voltage is applied at the VIN
pin, the PAM99700 maintains a constant 12V at the VDD pin. This voltage is used to power the IC and any external resistor dividers needed to
control the IC. The VDD pin must be bypassed by a low ESR capacitor to provide a low impedance path for the high frequency current of the
output gate driver.
ThePAM99700 can al so be operated by supplying a voltage at the VDD pin greater than the internally regulated voltage. This will turn off the
internal linear regulator of the IC and the PAM99700 will operate directly off the voltage supplied at the VDD pin. Please note that this external
voltage at the VDD pin should not exceed 15V.
Although the VIN pin of the PAM99700 is rated up to 500V, the actual maximum voltage that can be applied is limited by the power dissipation in
the IC. For example, if an 8-pin (junction to ambient thermal resistance RθJ-A = 115°C/W) PAM99700 draws about IIN = 2mA from the VIN pin,
and has a maximum allowable temperature rise of the junction temperature limited to about ΔT = 100°C, the maximum voltage at the VIN pin
would be:
VIN(MAX ) =
=
ΔT
RθJ− A
•
1
IIN
100°C
1
•
115°C / W 2mA
= 435 V
In these cases, to operate the PAM99700 from higher input voltages, a Zener diode can be added in series with the VIN pin to divert some of the
power loss from the PAM99700 to the Zener diode. In the above example, using a 100V zener diode will allow the circuit to easily work up to
500V.
The input current drawn from the VIN pin is a sum of the 1.0mA current drawn by the internal circuit and the current drawn by the gate driver
(which in turn depends on the switching frequency and the gate charge of the external FET).
IIN ≈ 350μA + QG * f s
In the above equation, fS is the switching frequency and QG is the gate charge of the external FET (which can be obtained from the datasheet of
the FET).
PAM99700
Document number: DSxxxxx Rev. 1 - 1
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PAM99700
Application Information (cont.)
Current Sense
The current sense input of the PAM99700 goes to the non-inverting inputs of two comparators. The inverting terminal of one comparator is tied
to an internal 250mV reference whereas the inverting terminal of the other comparator is connected to the LD pin. The outputs of both these
comparators are fed into an OR gate and the output of the OR gate is fed into the reset pin of the flip-flop. Thus, the comparator which has the
lowest voltage at the inverting terminal determines when the GATE output is turned off.
The outputs of the comparators also include a 150-280ns blanking time which prevents spurious turn-offs of the external FET due to the turn-on
spike normally present in peak current mode control. In rare cases, this internal blanking might not be enough to filter out the turn-on spike. In
these cases, an external RC filter needs to be added between the external sense resistor (RCS) and the CS pin.
Please note that the comparators are fast (with a typical 80ns response time). Hence these comparators are more susceptible to be triggered by
noise than the comparators of the PAM99700. A proper layout minimizing external inductances will prevent false triggering of these comparators.
Oscillator
The oscillator in thePAM99700 is controlled by a single resistor connected at the RT pin. The equation governing the oscillator frequency is given
by:
F=
21380
(kHz )
RT(kΩ ) + 5.5
If the resistor is connected between RT and GND, PAM99700 operates in a constant frequency mode and the above equation determines the
time-period. If the resistor is connected between RT and GATE, the PAM99700 operates in a constant off-time mode and the below equation
determines the off-time.
TOFF =
RT(kΩ ) + 44.1
(µS)
21.1
GATE Output
The gate output of the PAM99700 is used to drive and external FET. It is recommended that the gate charge of the external FET be less than
25nC for switching frequencies 100kHz and less than 15nC for switching frequencies >100kHz.
Linear Dimming
The Linear Dimming pin is used to control the LED current. There are two cases when it may be necessary to use the Linear Dimming pin. In
some cases, it may not be possible to find the exact RCS value required to obtain the LED current when the internal 250mV is used. In these
cases, an external voltage divider from the VDD pin can be connected to the LD pin to obtain a voltage (less than 250mV) corresponding to the
desired voltage across RCS.
Linear dimming may be desired to adjust the current level to reduce the intensity of the LEDs. In these cases, an external 0-250mV voltage can
be connected to the LD pin to adjust the LED current during operation.
To use the internal 250mV, the LD pin can be connected to VDD.
Note: Although the LD pin can be pulled to GND, the output current will not go to zero. This is due to the presence of a minimum on-time (which
is equal to the sum of the blanking time and the delay to output time) which is about 450ns. This will cause the FET to be on for a minimum of
450ns and thus the LED current when LD = GND will not be zero. This current is also dependent on the input voltage, inductance value, forward
voltage of the LEDs and circuit parasitics. To get zero LED current, the PWMD pin has to be used.
PWM Dimming
PWM Dimming can be achieved by driving the PWMD pin with a low frequency square wave signal. When the PWM signal is zero, the gate
driver is turned off and when the PWMD signal if high, the gate driver is enabled. Since the PWMD signal does not turn off the other parts of the
IC, the response of the PAM99700 to the PWMD signal is almost instantaneous. The rate of rise and fall of the LED current is thus determined
solely by the rise and fall times of the inductor current.To disable PWM dimming and enable the PAM99700 permanently, connect the PWMD pin
to VDD.
Thermal Protection
When the die temperature exceeds +160°C, a reset occurs and the reset remains until the temperature decrease to +110°C, at which time the
circuit can be restarted.When the die temperature exceeds +160°C, a reset occurs and the reset remains until the temperature decrease to
+110°C, at which time the circuit can be restarted.
PAM99700
Document number: DSxxxxx Rev. 1 - 1
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PAM99700
Ordering Information
Part Number
PAM99700AC
PAM99100BD
Package Type
SOP-8L
SOP-16L
Standard Package
2500 Units/Tape&Reel
2500 Units/Tape&Reel
Marking Information
PAM99700
Document number: DSxxxxx Rev. 1 - 1
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PAM99700
Package Outline Dimensions (All dimensions in mm.)
SOP-8
PAM99700
Document number: DSxxxxx Rev. 1 - 1
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PAM99700
Package Outline Dimensions (cont.) (All dimensions in mm.)
SOP-16
PAM99700
Document number: DSxxxxx Rev. 1 - 1
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PAM99700
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PAM99700
Document number: DSxxxxx Rev. 1 - 1
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