DIODES ZXLD1371EST16TC

A Product Lin
ne of
Dio
odes Incorporrated
ZXLD1371
60V HIGH ACCURACY
A
BUCK/BOOS
ST/BUCK-BO
OOST LED DRIVER-CONT
D
TROLLER
Descriptio
on
Pin
n Assignme
ents
The ZXLD137
71 is an LED
D driver contrroller IC for driving
d
external MOSFETs to drive high current LEDs. It is a multitopology contrroller enabling it to efficientlyy control the current
c
through seriess connected LE
EDs. The multii-topology enab
bles it
to operate in buck,
b
boost and
d buck-boost co
onfigurations.
The 60V capa
ability coupled
d with its multi-topology cap
pability
enables it to be
b used in a wide range of ap
pplications and
d drive
in excess of 15
5 LEDs in serie
es.
The ZXLD137
71 is a modiffied hystereticc controller ussing a
patent pending
g control sche
eme providing high output current
c
accuracy in all
a three mod
des of operatiion. High acccuracy
dimming is acchieved throug
gh DC control and high frequency
PWM control.
TSSOP
P-16EP
ADJ
1
16
GI
REF
2
15
PWM
TADJ
3
14
FLAG
SHP
4
13
ISM
STATUS
5
12
VIN
SGND
6
11
VAUX
PGND
7
10
GATE
N/C
8
9
N/C
ns for fault diag
gnosis. A flag output
o
The ZXLD1371 uses two pin
highlights a fa
ault, while the multi-level stattus pin gives further
f
information on the exact faultt.
Features
•
•
•
•
•
•
•
•
•
0.5% typiccal output curre
ent accuracy
5 to 60V operating
o
voltag
ge range
LED drive
er supports Buc
ck, Boost and Buck-boost
B
configurattions
Wide dyna
amic range dim
mming
o 10:1 DC
D dimming
o 1000:1 dimming rang
ge at 500Hz
Up to 1MH
Hz switching
High temp
perature contro
ol of LED curren
nt using TADJ
Available in Automotiv
ve Grade wiith AEC-Q100
0 and
TS16949 certification
Available in “Green” Mo
olding Compou
und (No Br, Sb
b) with
lead Free Finish/ RoHS Compliant (No
ote 1)
N
Note
1:
EU Directtive 2002/95/EC (R
RoHS) & 2011/65/E
EU (RoHS 2). All ap
pplicable
RoHS exe
emptions applied.
Typical Ap
pplication Circuit
VIN 8V to 22V
ILED = 1A
R1
0R05
N
VAUX VIN
PWM
C1
10µF
ISM
L1
33µH
H
1 to 6
LEDs
D1
PDS3100
GI
RGI2
75k
ADJ
ZXLD
D1371 GATE
FLAG
REF
R
R4
1.8
8k
RGI1
24k
TH
H1
10
0k
Q1
DMN6068LK3
COUT
10
0µF
STATUS
TADJ
SHP NC SGND PGND
C2
330pF
The
ermally connected
Buck-Boos
st Diagram Utilizing Thermistor and TADJ
ZXLD1371
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Curve Sh
howing LED Current vs. TLED
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uary 2012
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Diodes Incorporated
ZXLD1371
Pin Descriptions
Pin
Name
Pin
Type
(Note 2)
ADJ
1
I
REF
2
O
TADJ
3
I
SHP
4
I/O
STATUS
5
O
SGND
PGND
6
7
P
P
N/C
8
-
N/C
9
GATE
10
O
VAUX
11
P
VIN
12
P
ISM
13
I
FLAG
14
O
PWM
15
I
GI
16
I
EP
PAD
P
Notes:
Description
Adjust input (for dc output current control)
Connect to REF to set 100% output current.
Drive with dc voltage (125mV<VADJ< 1.25V) to adjust output current from 10% to 100%
of set value. The ADJ pin has an internal clamp that limits the internal node to less than
3V. This provides some failsafe should they get overdriven
Internal 1.25V reference voltage output
Temperature Adjust input for LED thermal current control
Connect thermistor/resistor network to this pin to reduce output current above a preset
temperature threshold.
Connect to REF to disable thermal compensation function. (See section on thermal
control.)
Shaping capacitor for feedback control loop
Connect 330pF ±20% capacitor from this pin to ground to provide loop compensation
Operation status output (analog output)
Pin is at 4.5V (nominal) during normal operation.
Pin switches to a lower voltage to indicate specific operation warnings or fault
conditions. (See section on STATUS output.)
Status pin voltage is low during shutdown mode
Signal ground (Connect to 0V)
Power ground - Connect to 0V and pin 8 to maximize copper area
Not Connected internally – recommend connection to pin 7, (PGND), to maximize PCB
copper for thermal dissipation
Not Connected internally – recommend connection pin 10 (GATE) to permit wide copper
trace to gate of MOSFET
Gate drive output to external NMOS transistor – connect to pin 9
Auxiliary positive supply to internal switch gate driver
At VIN < 8V; a bootstrap circuit is recommended to ensure adequate gate drive voltage
(see Applications section)
At VIN > 8V; connect to VIN
At VIN >24V; to reduce power dissipation, VAUX can be connected to an 8V to 15V
auxiliary power supply (see Applications section). Decouple to ground with capacitor
close to device (see Applications section)
Input supply to device 5V to 60V
Decouple to ground with capacitor close to device (refer to Applications section)
Current monitor input. Connect current sense resistor between this pin and VIN
The nominal voltage, VSENSE, across the resistor is 218mV fixed in Buck mode and
initially 225mV in Boost and Buck-Boost modes, varying with duty cycle.
Flag open drain output
Pin is high impedance during normal operation
Pin switches low to indicate a fault, or warning condition
Digital PWM output current control
Pin driven either by open Drain or push-pull 3.3V or 5V logic levels.
Drive with frequency higher than 100Hz to gate output ‘on’ and ‘off’ during dimming
control.
The device enters standby mode when PWM pin is driven with logic low level for more
than 15ms nominal (Refer to application section for more details)
Gain setting input
Used to set the device in Buck mode or Boost, Buck-boost modes and to control the
sense voltage in Boost and Buck-boost modes
Connect to ADJ pin for Buck mode operation
For Boost and Buck-boost modes, connect to resistive divider from ADJ to SGND. The
GI divider is required to compensate for duty cycle gating in the internal feedback loop
(see Application section). The GI pin has an internal clamp that limits the internal node to
less than 3V. This provides some failsafe should it become overdriven.
Exposed paddle. Connect to 0V plane for electrical and thermal management
2. Type refers to whether or not pin is an Input, Output, Input/Output or Power supply pin.
ZXLD1371
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ZXLD1371
Functional Block Diagram
Absolute Maximum Ratings (Voltages to GND Unless Otherwise Stated) (Note 3)
Symbol
Parameter
Rating
Unit
VIN
Input supply voltage
-0.3 to 65
V
VAUX
Auxiliary supply voltage
-0.3 to 65
V
VISM
Current monitor input relative to GND
-0.3 to 65
V
VSENSE
Current monitor sense voltage (VIN-VISM)
-0.3 to 5
V
VGATE
Gate driver output voltage
-0.3 to 20
V
IGATE
Gate driver continuous output current
18
mA
VFLAG
Flag output voltage
-0.3 to 40
V
VPWM, VADJ, VTADJ, VGI,
VPWM
Other input pins
-0.3 to 5.5
V
TJ
Maximum junction temperature
150
°C
TST
Storage temperature
-55 to 150
°C
Stresses greater than the 'Absolute Maximum Ratings' specified above, may cause permanent damage to the device. These are stress ratings only; functional
operation of the device at these or any other conditions exceeding those indicated in this specification is not implied. Device reliability may be affected by
exposure to absolute maximum rating conditions for extended periods of time.
Semiconductor devices are ESD sensitive and may be damaged by exposure to ESD events. Suitable ESD precautions should be taken when handling and
transporting these devices.
ZXLD1371
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ZXLD1371
Package Thermal Data
Thermal Resistance
Junction-to-Ambient, θJA (Note 4)
Package
TSSOP-16 EP
Typical
50
Unit
°C/W
Junction-to-Case, θJC
TSSOP-16 EP
23
°C/W
Recommended Operating Conditions (-40°C ≤ TJ ≤ 125°C)
Symbol
Parameter
Performance/Comment
Normal Operation
(Note 5) Reduced performance
operation
Normal Operation
(Note 5) Reduced performance
operation
Input supply voltage range
VIN
Auxiliary supply voltage range (Note 6)
VAUX
IREF
External dc control voltage applied to ADJ pin to
adjust output current
Reference external load current
VIN-VISM, with 0 ≤ VADJ ≤ 2.5
DC brightness control mode
from 10% to 100%
REF sourcing current
fmax
Recommended switching frequency range
(Note 7)
VSENSE
VADJ
VTADJ
Differential input voltage
Temperature adjustment (TADJ) input voltage range
Recommended PWM dimming frequency range
fPWM
tPWMH/L
PWM pulse width in dimming mode
To achieve 1000:1 resolution
To achieve 500:1 resolution
PWM input high or low
Min
8.0
Max
60
Unit
5.0
8.0
8.0
60
5.0
8.0
0
450
mV
0.125
1.25
V
1
mA
300
1000
kHz
0
100
100
0.002
VREF
500
1000
10
V
Hz
Hz
ms
V
V
VPWMH
PWM pin high level input voltage
2
5.5
V
VPWML
PWM pin low level input voltage
0
0.4
V
-40
125
°C
0.20
0.50
Operating Junction Temperature Range
TJ
GI
Notes:
Gain setting ratio for boost and buck-boost modes
Ratio= VGI/VADJ
3. For correct operation SGND and PGND should always be connected together.
4. Measured on “High Effective Thermal Conductivity Test Board" according to JESD51.
5. Device starts up above 5.4V and as such the minimum applied supply voltage has to be above 5.4V (plus any noise margin). The ZXLD1371 will,
however, continue to function when the input voltage is reduced from ≥ 8V down to 5.0V.
When operating with input voltages below 8V the output current and device parameters may deviate from their normal values; and is dependent
on power MOSFET switch, load and ambient temperature conditions. To ensure best operation in Boost and Buck-boost modes with input
voltages, VIN, between 5.0 and 8V a suitable boot-strap network on VAUX pin is recommended.
Performance in Buck mode will be reduced at input voltages (VIN, VAUX) below 8V. – a boot-strap network cannot be implemented in buck mode.
6. VAUX can be driven from a voltage higher than VIN to provide higher efficiency at low VIN voltages, but to avoid false operation; a voltage should
not be applied to VAUX in the absence of a voltage at VIN. VAUX can also be operated at a lower voltage than VIN to increase efficiencies at high
VIN.
7. The device contains circuitry to control the switching frequency to approximately 400kHz. The maximum and minimum operating frequency is not
tested in production.
ZXLD1371
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ZXLD1371
Electrical Characteristics (Test conditions: VIN = VAUX = 12V, TA = 25°C, unless otherwise specified.)
Symbol
Parameter
Conditions
Min
Typ
Max
Units
Supply and reference parameters
VUV-
Under-Voltage detection threshold
Normal operation to switch disabled
VIN or VAUX falling (Note 8)
4.5
V
VUV+
Under-Voltage detection threshold
Switch disabled to normal operation
VIN or VAUX rising (Note 8)
4.9
V
IQ-IN
Quiescent current into VIN
1.5
IQ-AUX
Quiescent current into VAUX
PWM pin floating.
Output not switching
ISB-IN
Standby current into VIN.
ISB-AUX
Standby current into VAUX.
PWM pin grounded
for more than 15ms
VREF
Internal reference voltage
No load
ΔVREF
Change in reference voltage with output
current
Sourcing 1mA
Sinking 25µA
VREF_LINE
Reference voltage line regulation
VIN = VAUX, 8.0V<VIN = <60V
VREF-TC
Reference temperature coefficient
1.237
3
150
300
µA
90
150
µA
0.7
10
µA
1.25
1.263
V
-5
5
-60
mA
mV
-90
dB
±50
ppm/°C
DC-DC converter parameters
VADJ ≤ 1.25V
100
nA
VADJ = 5.0V
5
µA
VADJ = 1.25V
0.8
V
VGI ≤ 1.25V
100
nA
VGI = 5.0V
5
µA
36
100
µA
15
25
ms
IADJ
ADJ input current (Note 9)
VGI
GI Voltage threshold for boost and buckboost modes selection (Note 9)
IGI
GI input current (Note 9)
IPWM
PWM input current
VPWM = 5.5V
tPWMoff
PWM pulse width
(to enter shutdown state)
PWM input low
TSDH
Thermal shutdown upper threshold
(GATE output forced low)
Temperature rising.
150
ºC
TSDL
Thermal shutdown lower threshold
(GATE output re-enabled)
Temperature falling.
125
ºC
11
20
µA
±0.25
±2
%
350
375
mV
10
High-Side Current Monitor (Pin ISM)
IISM
Input Current
Measured into ISM pin VISM = 12V
VSENSE_acc
Accuracy of nominal VSENSE threshold
voltage
VADJ = 1.25V
VSENSE-OC
Notes:
8.
9.
Over-current sense threshold voltage
300
UVLO levels are such that all ZXLD1371 will function above 5.4V for rising supply voltages and function down to 5V for falling supply voltages.
The ADJ and GI pins have an internal clamp that limits the internal node to less than 3V. This provides some failsafe should those pins get
overdriven.
ZXLD1371
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ZXLD1371
Electrical Characteristics (cont.) (Test conditions: VIN = VAUX = 12V, TA = 25°C, unless otherwise specified.)
Symbol
Parameter
Conditions
Min
Typ
Max
Units
0.5
V
1
µA
Output Parameters
VFLAGL
FLAG pin low level output voltage
IFLAGOFF FLAG pin open-drain leakage current
VSTATUS
RSTATUS
STATUS Flag no-load output voltage
(Note 10)
Output impedance of STATUS output
Output sinking 1mA
VFLAG = 40V
Normal operation
4.2
4.5
4.8
Out of regulation (VSHP out of range)
(Note 11)
3.3
3.6
3.9
VIN under-voltage (VIN < UVLO)
3.3
3.6
3.9
Switch stalled (tON or tOFF > 100µs)
3.3
3.6
3.9
Over-temperature (TJ > 125°C)
1.5
1.8
2.1
Excess sense resistor current
(VSENSE > 0.32V)
0.6
0.9
1.2
Normal operation
V
10
kΩ
11
V
Driver output (PIN GATE)
VGATEH
High level output voltage
No load Sourcing 1mA
(Note 12)
VGATEL
Low level output voltage
Sinking 1mA, (Note 13)
VGATECL
High level GATE CLAMP voltage
10
VIN = VAU X= VISM = 18V
12.8
IGATE = 1mA
0.5
V
15
V
IGATE
Dynamic peak current available during
rise or fall of output voltage
Charging or discharging gate of
external switch with QG = 10nC and
400kHz
±300
tSTALL
Time to assert ‘STALL’ flag and
warning on STATUS output
(Note 14)
GATE low or high
100
170
µs
mA
LED Thermal control circuit (TADJ) parameters
VTADJH
Upper threshold voltage
Onset of output current reduction
(VTADJ falling)
560
625
690
mV
VTADJL
Lower threshold voltage
Output current reduced to <10% of
set value (VTADJ falling)
380
440
500
mV
TADJ pin Input current
VTADJ = 1.25V
1
µA
ITADJ
Notes:
10. In the event of more than one fault/warning condition occurring, the higher priority condition will take precedence.
For example ‘Excessive coil current’ and ‘Out of regulation’ occurring together will produce an output of 0.9V on the STATUS pin.
These STATUS pin voltages apply for an input voltage to VIN of 7.5V < VIN < 60V. Below 7.5V the STATUS pin voltage levels reduce and
therefore may not report the correct status. For 5.4V < VIN < 7.5V the flag pin still reports any error by going low. At low VIN in Boost and
Buck-boost modes an over-current status may be indicated when operating at high boost ratios – this due to the feedback loop increasing
the sense voltage.
For more information see the Application Information section about Flag/Status levels.
11. Flag is asserted if VSHP < 1.5V or VSHP > 2.5V
12. GATE is switched to the supply voltage VAUX for low values of VAUX (5V ≤ VAUX ≤ ~12V). For VAUX > 12V, GATE is clamped internally to prevent
it exceeding 15V.
13. GATE is switched to PGND by an NMOS transistor
14. If tON exceeds tSTALL, the device will force GATE low to turn off the external switch and then initiate a restart cycle. During this phase, ADJ is
grounded internally and the SHP pin is switched to its nominal operating voltage, before operation is allowed to resume. Restart cycles will be
repeated automatically until the operating conditions are such that normal operation can be sustained. If tOFF exceeds tSTALL, the switch will
remain off until normal operation is possible.
ZXLD1371
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ZXLD1371
Typical Characteristics
3
SUPPLY CURRENT (mA)
2.5
2
1.5
1
0.5
0
5
10
15
20
1.248
-40
-25
-10
5
25
30
35
40
SUPPLY VOLTAGE (V)
Supply Voltage vs. Supply Current
45
50
55
60
1.252
1.2515
REFERENCE VOLTAGE (V)
1.251
1.2505
1.25
1.2495
1.249
1.2485
20
35
50
65
80
95
110
125
JUNCTION TEMPERATURE (°C)
Reference Voltage vs. Junction Temperature
100%
T A=25°C
L=33µH
RS=146mΩ
Buck Mode
2 LEDs
90%
80%
70%
DUTY (%)
60%
50%
40%
30%
20%
10%
0%
6
12
18
24
30
36
42
48
54
60
INPUT VOLTAGE (V)
Duty Cycle vs. Input Voltage
ZXLD1371
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ZXLD1371
Typical Characteristics – Linear/DC Dimming
750
750
600
LED CURRENT (mA)
Switching
Frequency
450
450
300
300
T A=25°C
VAUX=VIN=12V
2 LEDs, L=33µH
RS=300mΩ
150
0
0
0.25
0.5
0.75
ADJ VOLTAGE (V)
Led Current and Switching Frequency vs.
ADJ Voltage in Buck Mode
150
0
1.25
1
700
1400
600
1200
500
1000
400
800
300
600
LED
Current
200
400
TA = 25°C
VAUX = VIN = 24V
8 LEDs, L = 33µH
GI = 0.23, RS = 300mΩ
100
0.25
0.5
0.75
200
0
1.25
0
0
SWITCHING FREQUENCY (kHz)
Switching
Frequency
LED CURRENT (mA)
SWITCHING FREQUENCY (kHz)
600
1
ADJ VOLTAGE (V)
LED Current and Switching Frequency vs.
ADJ Voltage in Buck-Boost Mode
350
700
300
600
LED CURRENT (mA)
ILED
250
500
200
400
150
300
TA=25°C
VAUX=VIN=12V
12 LEDs, L=33µH
GI=0.23, RS=300mΩ
100
50
200
SWITCHING FREQUENCY (kHz)
Switching
Frequency
100
0
0
0
ZXLD1371
Document number: DS35436 Rev. 1 - 2
0.25
0.5
0.75
ADJ VOLTAGE (V)
LED Current and Switching Frequency vs.
ADJ Voltage in Boost Mode
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odes Incorporrated
ZXLD1371
Typical Characteris
C
stics – PWM
M/Thermal Dimming
1500
T A = 25°C
VIN = VAUX = 24V
1250
LED CURRENT (mA)
L = 33µH, RS =150mΩ
fPWM = 100Hzz
ILED
1000
750
500
250
0
0
10
20
0
30
4
40
50
60
70
PWM DUTY CYCLE
P
E (%)
LED Current
C
vs. PWM Duty
D
Cycle
80
90
100
ILED vs
s. Time - PW
WM Pin Trans
sient Respon
nse
LED CURRENT DIMMING FACTOR
100%
80%
60%
40%
20%
0%
0
ZXLD1371
Document numberr: DS35436 Rev. 1 - 2
250
0
50
00
750
PIN VOLTAGE (mV)
TADJ
(
A
LED Current Dimming Factor vs
s. TADJ Voltage
9 of 42
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1000
1250
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ZXLD1371
Typical Characteristics – Buck Mode – RS = 75mΩ – L = 33µH – ILED = 2.9A
3.2
LED CURRENT (A)
3.1
3.0
2.9
2.8
2.7
2.6
5
10
15
20
25
30
35
40
INPUT VOLTAGE (V)
700
SWITCHING FREQUENCY (kHz)
TA = 25°C, VAUX = VIN
L = 15µH, RS = 75mΩ
CIN = 100µF, VLED = 3.8V
600
500
4 LEDs
2 LEDs
3 LEDs
1 LED
400
4 LEDs
L = 22µH
300
200
100
0
5
10
15
20
25
30
35
40
INPUT VOLTAGE (V)
700
EFFICIENCY (%)
600
500
400
300
100
0
5
10
15
20
25
30
35
40
INPUT VOLTAGE (V)
ZXLD1371
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odes Incorporrated
ZXLD1371
Typical Characteris
C
stics – Buckk Mode – RS =150mΩ - L = 33µH – ILED = 1.45A
70
00
T A = 25°C, VIN
N = V AUX,
L = 33µH, RS = 150mΩ
CIN = 100µF
LED CURRENT (A)
60
00
40
00
30
00
1 ~ 16
6 LEDs
20
00
1 LED
10
00
0
5
10
1
10
15
20
0
20
25
25
30
30
35
40
INPUT VOLTAG
GE (V)
100
0
EDs
3 LEDs 4 LE
95
5
5 LEDs 6 LEDs
8 LEDs
EDs
10 LE
12 LEDs
14 LEDs
Ds
16 LED
2 LEDs
EFFICIENCY (%)
90
0
85
5
1 LED
80
0
75
5
70
0
TA = 25°C, VIN = VAUX,
L = 33µH, RS = 150mΩ
CIN = 100µF
65
5
60
0
5
ZXLD1371
Document numberr: DS35436 Rev. 1 - 2
10
15
20
25
5
30
35
VIN (V)
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40
45
50
55
60
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odes Incorporrated
ZXLD1371
Typical Characteris
C
stics – Boo
ost Mode – ILED
= 350mA
A – RS = 150m
mΩ – GIRATIO
L
O = 0.23
100
0
4 LEDs
6 LEDs
8 LEDs
L
10 LEDs
12 LEDs
14 LEDs
16 LEDss
EFFICIENCY (%)
90
0
80
0
70
0
60
0
TA = 25°C, VAUX = VIN
L = 33µH, RS = 150mΩ ,
50
0
R9 = 120kΩ , R10 = 36kΩ
CIN = 100µF
40
0
ZXLD1371
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Typical Characteristics – Boost Mode – ILED = 350mA – GIRATIO = 0.23 – Bootstrap comparison
0.45
T A = 25°C, L = 33µH
0.43
RS = 150mΩ, R9 = 120kΩ
R10 = 36kΩ, CIN = 100µF
LED CURRENT (A)
0.41
8 LEDs
0.39
0.37
0.35
0.33
8 LEDs Bootstrap
0.31
0.29
0.27
0.25
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
VIN (V)
500
8 LEDs Bootstrap
SWITCHING FREQUENCY (kHz)
450
400
350
300
250
8 LEDs
200
150
TA = 25°C, L = 33µH
100
RS = 150mΩ, R9 = 120kΩ
R10 = 36kΩ, CIN = 100µF
50
0
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
VIN (V)
100
90
EFFICIENCY %
8 LEDs Bootstrap
80
70
60
8 LEDs
TA = 25°C, L = 33µH
RS = 150mΩ, R9 = 120kΩ
50
40
5
R10 = 36kΩ, CIN = 100µF
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
VIN (V)
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Typical Characteristics – Boost Mode – ILED = 350mA – RS = 150mΩ – GIRATIO = 0.23
0.45
0.43
LED CURRENT (A)
0.41
L = 33µH
0.39
L = 68µH
0.37
0.35
0.33
L = 100µH
0.31
TA = 25° C, VAUX = VIN
8 LEDs, RS = 150mΩ
R9 = 120kΩ, R10 = 36kΩ,
CIN = 100µF
0.29
0.27
0.25
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
VIN (V)
500
L = 33µH
SWITCHING FREQUENCY (kHz)
450
400
350
300
L = 68µH
250
200
150
TA = 25°C, VAUX = VIN
L = 100µH
100
8 LEDs, RS = 150mΩ,
R9 = 120kΩ, R10 = 36kΩ,
CIN = 100µF
50
0
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
VIN (V)
100
L = 100µH
EFFICIENCY %
90
80
L = 68µH
70
60
L = 33µH
T A = 25°C, V AUX = V IN
8 LEDs, RS = 150mΩ,
50
40
5
R9 = 120kΩ, R10 = 36kΩ,
CIN = 100µF
6
7
8
9
10
11
12
13
14
15
16
17
18
19
VIN (V)
ZXLD1371
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Typical Characteristics – Boost Mode – 8 LEDs – GIRATIO = 0.23
0.60
LED CURRENT (A)
0.50
ILED = 500mA
0.40
0.30
T A = 25°C, V AUX = VIN
8 LEDs, L = 33µH
R9 = 120kΩ, R10 = 36kΩ,
CIN = 100µF
ILED = 350mA
0.20
0.10
5
ILED = 150mA
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
VIN (V)
800
SWITCHING FREQUENCY (kHz)
700
ILED = 150mA
600
500
400
300
ILED = 350mA
ILED = 500mA
200
T A = 25°C, V AUX = VIN
8 LEDs, L = 33µH
R9 = 120kΩ, R10 = 36kΩ,
CIN = 100µF
100
0
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
VIN (V)
100
ILED = 500mA
EFFICIENCY (%)
90
ILED = 150mA
80
ILED = 350mA
70
60
TA = 25° C, VAUX = VIN
8 LEDs, L = 33µH
R9 = 120kΩ , R10 = 36kΩ,
CIN = 100µF
50
40
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
VIN (V)
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Typical Characteris
C
stics – Buc
ck-Boost Mo
ode – RS = 150mΩ - ILED = 350mA – GI
G RATIO = 0.23
0.45
50
0.42
25
5 LEDs
6 LEDs
LED CURRENT (A)
0.40
00
2 LEDs
0.37
75
3 LEDs
4 LEDs
0.35
50
1 LED
D
0.32
25
7 LEDs
8 LEDs
0.30
00
9 LEDs
TA = 25°C, L = 33µH,
Rs = 150mΩ, R9 = 120kΩ,
Ω
R10 = 36kΩ, VAUX = VIN
N
0.27
75
0.25
50
5
8
11
14
17
20
90
0
6 LED s
85
5
80
0
9 LEDs
5 LEDs
EFFICIENCY %
75
5
4 LED
Ds 3 LEDs
2 LEDs
70
0
8 LE
EDs
65
5
1 LED
7 LED s
60
0
55
5
TA = 25°C, L = 33µH,
50
0
Rs = 150mΩ, R9
R = 120kΩ,
= VIN
R10 = 36kΩ, VAUX
A
45
5
40
0
5
ZXLD1371
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Typical Characteristics – Buck-Boost Mode – RS = 150mΩ - ILED = 350mA – GIRATIO = 0.23
0.45
TA = 25°C, L = 33µH
0.43
RS = 150mΩ, R9 = 120kΩ
R10 = 36kΩ
LED CURRENT (A)
0.41
5 LEDs
0.39
0.37
0.35
0.33
5 LEDs Bootstrap
0.31
0.29
0.27
0.25
5
6
7
8
9
10
11
12
13
14
15
16
17
18
13
14
15
16
17
18
VIN (V)
SWITCHING FREQUENCY (kHz)
600
500
400
300
200
100
0
5
6
7
8
9
10
11
12
90
5 LEDs Bootstrap
85
80
5 LEDs
EFFICIENCY %
75
70
65
60
55
T A = 25°C, L = 33H
50
RS = 150mΩ, R9 = 120kΩ,
R10 = 36kΩ, CIN = 100µF
45
40
5
6
7
8
9
10
11
12
13
14
15
16
17
18
VIN (V)
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Typical Characteristics – Buck-Boost Mode – RS = 150mΩ - ILED = 350mA – GIRATIO = 0.23
0.450
0.425
LED CURRENT (A)
0.400
0.375
0.350
0.325
0.300
0.275
0.250
5
6
7
8
9
10
11
12
13
14
15
16
17
18
SWITCHING FREQUENCY (kHz)
600
500
L = 33µH
400
300
L = 68µH
L = 100µH
200
T A = 25°C, V IN = VAUX,
100
5 LEDs, RS = 150mΩ
R9 = 120kΩ, R10 = 36kΩ
CIN = 100µF
0
5
6
7
8
9
10
11
12
13
14
15
16
17
18
90
L = 100µH
85
80
EFFICIENCY %
75
L = 68µH
70
65
60
55
L = 33µH
TA = 25°C, VIN = VAUX,
50
5 LEDs, RS = 150mΩ
R9 = 120kΩ, R10 = 36kΩ
CIN = 100µF
45
40
5
ZXLD1371
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Typical Characteristics – Buck-Boost Mode –5 LEDs GIRATIO = 0.23
0.60
0.55
ILED = 500mA
LED CURRENT (A)
0.50
0.45
0.40
ILED = 350mA
0.35
TA = 25°C, VIN = VAUX, 5 LEDs
0.30
L = 33µH, R9 = 120kΩ, R10 = 36kΩ
CIN = 100µF
0.25
0.20
0.15
ILED = 150mA
0.10
5
6
7
8
9
10
11
12
13
14
15
16
17
18
1000
SWITCHING FREQUENCY (kHz)
900
ILED = 150mA
800
700
600
ILED = 350mA
500
400
ILED = 500mA
300
200
TA = 25°C, VIN = VAUX, 5 LEDs,
L = 33µH, R9 = 120kΩ, R10 = 36kΩ
CIN = 100µF
100
0
5
6
7
8
9
10
11
12
13
14
15
90
16
17
18
ILED = 500mA
85
80
EFFICIENCY %
75
ILED = 150mA
70
65
60
55
ILED = 350mA
TA = 25°C, VIN = VAUX, 5 LEDs
50
L = 33µH, R9 = 120kΩ, R10 = 36kΩ
CIN = 100µF
45
40
5
ZXLD1371
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Applications Information
The ZXLD1371 is a high accuracy hysteretic inductive buck/boost/buck-boost controller designed to be used with an
external NMOS switch for current-driving single or multiple series-connected LEDs. The device can be configured to
operate in buck, boost, or buck-boost modes by suitable configuration of the external components as shown in the
schematics shown in the device operation description.
DEVICE DESCRIPTION
a) Buck mode – the most simple buck circuit is shown in Figure 1
Control of the LED current buck mode is achieved by
sensing the coil current in the sense resistor Rs, connected
between the two inputs of a current monitor within the
control loop block. An output from the control loop drives
the input of a comparator which drives the gate of the
external NMOS switch transistor Q1 via the internal Gate
Driver. When the switch is on, the drain voltage of Q1 is
near zero. Current flows from VIN, via Rs, LED, coil and
switch to ground. This current ramps up until an upper
threshold value is reached (see Figure 2). At this point
GATE goes low, the switch is turned off and the drain
voltage increases to VIN plus the forward voltage, VF, of the
schottky diode D1. Current flows via Rs, LED, coil and D1
back to VIN. When the coil current has ramped down to a
lower threshold value, GATE goes high, the switch is
turned on again and the cycle of events repeats, resulting
in continuous oscillation. The feedback loop adjusts the
NMOS switch duty cycle to stabilize the LED current in
response to changes in external conditions, including input
voltage and load voltage.
Figure 1. Buck configuration
The average current in the sense resistor, LED and coil is
equal to the average of the maximum and minimum
threshold currents. The ripple current (hysteresis) is equal
to the difference between the thresholds. The control loop
maintains the average LED current at the set level by
adjusting the switch duty cycle continuously to force the
average sense resistor current to the value demanded by
the voltage on the ADJ pin. This minimizes variation in
output current with changes in operating conditions.
The control loop also regulates the switching frequency by
varying the level of hysteresis. The hysteresis has a defined
minimum (typ 5%) and a maximum (typ 30%).
The
frequency may deviate from nominal in some conditions.
This depends upon the desired LED current, the coil
inductance and the voltages at the input and the load. Loop
compensation is achieved by a single external capacitor C2,
connected between SHP and SGND.
The control loop sets the duty cycle so that the sense
voltage is
VADJ
VSENSE = 0.218
VREF
ILED =
VADJ
RS
VREF
(Buck mode)
tOFF
GATE
voltage
tON
0V
VIN + VF
Q1
Drain
voltage
0V
IPK
Coil &
LED
current
0A
Sense
voltage
VIN - VISM
Therefore,
0.218
+11V to
15V typ.
Mean = 218mV
Equation 1
If the ADJ pin is connected to the REF pin, this simplifies to
ILED =
0.218
RS
Figure 2. Operating waveforms (Buck mode)
(Buck mode).
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Applications Information (cont.)
b) Boost and Buck-Boost modes – the most simple boost/buck-boost circuit is shown in Figure 3
Control in Boost and Buck-boost mode is achieved by
sensing the coil current in the series resistor Rs, connected
between the two inputs of a current monitor within the
control loop block. An output from the control loop drives
the input of a comparator which drives the gate of the
external NMOS switch transistor Q1 via the internal Gate
Driver. When the switch is on, the drain voltage of Q1 is
near zero. Current flows from VIN, via Rs, coil and switch
to ground. This current ramps up until an upper threshold
value is reached (see Figure 4). At this point GATE goes
low, the switch is turned off and the drain voltage increases
to either:
1) the load voltage VLEDS plus the forward
voltage of D1 in Boost configuration,
or
2) the load voltage VLEDS plus the forward voltage
of D1 plus VIN in Buck-boost configuration.
Current flows via Rs, coil, D1 and LED back to VIN (Buckboost mode), or GND (Boost mode). When the coil current
has ramped down to a lower threshold value, GATE goes
high, the switch is turned on again and the cycle of events
repeats, resulting in continuous oscillation.
Figure 3. Boost and Buck-boost configuration
The feeback loop adjusts the NMOS switch duty cycle to
stabilize the LED current in response to changes in external
conditions, including input voltage and load voltage. Loop
compensation is achieved by a single external capacitor
C2, connected between SHP and SGND. Note that in
reality, a load capacitor COUT is used, so that the LED
current waveform shown is smoothed.
The average current in the sense resistor and coil, IRS, is
equal to the average of the maximum and minimum
threshold currents and the ripple current (hysteresis) is
equal to the difference between the thresholds.
The average current in the LED, ILED, is always less than
IRS. The feedback control loop adjusts the switch duty
cycle, D, to achieve a set point at the sense resistor. This
controls IRS. During the interval tOFF, the coil current flows
through D1 and the LED load. During tON, the coil current
flows through Q1, not the LEDs. Therefore the set point is
modified by D using a gating function to control ILED
indirectly. In order to compensate internally for the effect of
the gating function, a control factor, GI_ADJ is used.
GI_ADJ is set by a pair of external resistors, RGI1 and RGI2.
(Figure 3.) This allows the sense voltage to be adjusted to
an optimum level for power efficiency without significant
error in the LED controlled current.
GI_ADJ =
RGI1
Equation 2
RGI1 +RGI2
(Boost and Buck-boost modes)
The control loop sets the duty cycle so that the sense
resistor current is
IRS =
0.225
GI_ADJ
VADJ
RS
1-D
VREF
(Boost and Buck-boost modes)
Equation 3
Figure 4. Operating waveforms (Boost and
Buck-boost modes)
IRS equals the coil current. The coil is connected only to the switch and the schottky diode. The schottky diode passes the
LED current. Therefore the average LED current is the coil current multiplied by the schottky diode duty cycle, 1-D.
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Applications Information (cont.)
ILED = IRS 1-D =
0.225
RS
GI_ADJ
VADJ
VREF
(Boost and Buck-boost)
Equation 4
This shows that the LED current depends on the ADJ pin voltage, the reference voltage and 3 resistor values (RS, RGI1
and RGI2). It is independent of the input and output voltages.
If the ADJ pin is connected to the REF pin, this simplifies to
ILED =
0.225
RS
GI_ADJ
(Boost and Buck-boost)
Now ILED is dependent only on the 3 resistor values.
Considering power dissipation and accuracy, it is useful to know how the mean sense voltage varies with input voltage and
other parameters.
VRS = IRS RS = 0.225
GI_ADJ
VADJ
1-D
VREF
(Boost and Buck-boost)
Equation 5
This shows that the sense voltage varies with duty cycle in Boost and Buck-boost configurations.
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Applications Information (cont.)
APPLICATION CIRCUIT DESIGN
External component selection is driven by the characteristics of the load and the input supply, since this will determine the
kind of topology being used for the system. Component selection begins with the current setting procedure, the
inductor/frequency setting and the MOSFET selection. Finally after selecting the freewheeling diode and the output
capacitor (if needed), the application section will cover the PWM dimming and thermal feedback. The full procedure is
greatly accelerated by the web Calculator spreadsheet, which includes fully automated component selection, and is
available on the Diodes web site. However the full calculation is also given here.
Please note the following particular feature of the web Calculator. The GI ratio can be set for Automatic calculation, or it can
be fixed at a chosen value. When optimizing a design, it is best first to optimize for the chosen voltage range of most
interest, using the Automatic setting. In order to subsequently evaluate performance of the circuit over a wider input voltage
range, fix the GI ratio in the Calculator input field, and then set the desired input voltage range.
Some components depend upon the switching frequency and the duty cycle. The switching frequency is regulated by the
ZXLD1371 to a large extent, depending upon conditions. This is discussed in a later paragraph dealing with coil selection.
Duty Cycle Calculation and Topology Selection
The duty cycle is a function of the input and output voltages. Approximately, the MOSFET switching duty cycle is
DBUCK
≈
VOUT
VIN
VOUT - VIN
DBOOST ≈
VOUT
VOUT
DBB
≈
VOUT + VIN
for Buck
Equation 6
for Boost
for Buck-Boost
Because D must always be a positive number less than 1, these equations show that
VOUT < VIN
VOUT > VIN
VOUT > or = or < VIN
for Buck (voltage step-down)
for Boost (voltage step-up)
for Buck-boost (voltage step-down or step-up)
This allows us to select the topology for the required voltage range.
More exact equations are used in the web Calculator. These are:
DBUCK =
DBOOST =
DBB
where VF
VDSON
RCOIL
=
VOUT + VF + IOUT RS +RCOIL
VIN + VF - VDSON
VOUT - VIN + IIN RS +RCOIL + VF
VOUT + VF - VDSON
VOUT + VF + IIN +IOUT RS +RCOIL
VOUT + VIN + VF - VDSON
for Buck
for Boost
Equation 7
for Buck-boost
= schottky diode forward voltage, estimated for the expected coil current, ICOIL
= MOSFET drain source voltage in the ON condition (dependent on RDSON and drain current = ICOIL)
= DC winding resistance of L1
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Applications Information (cont.)
The additional terms are relatively small, so the exact equations will only make a significant difference at lower operating
voltages at the input and output, i.e. low input voltage or a small number of LEDs connected in series. The estimates of VF
and VDSON depend on the coil current. The mean coil current, ICOIL depends upon the topology and upon the mean terminal
currents as follows:
ICOIL = ILED
for Buck
Equation 8
for Boost
ICOIL = IIN
for Buck-boost
ICOIL = IIN + ILED
ILED is the target LED current and is already known. IIN will be calculated with some accuracy later, but can be estimated
now from the electrical power efficiency. If the expected efficiency is roughly 90%, the output power POUT is 90% of the
input power, PIN, and the coil current is estimated as follows.
≈ 0.9 PIN
POUT
or
ILED N VLED ≈ 0.9 IIN VIN
where N is the number of LEDs connected in series, and VLED is the forward voltage drop of a single LED at ILED.
So
IIN ≈
ILED N VLED
0.9 VIN
Equation 9
Equation 9 can now be used to find ICOIL in Equation 8, which can then be used to estimate the small terms in Equation 7.
This completes the calculation of Duty Cycle and the selection of Buck, Boost or Buck-boost topology.
An initial estimate of duty cycle is required before we can choose a coil. In Equation 7, the following approximations are
recommended:
VF
IIN × (RS+RCOIL)
IOUT × (RS+RCOIL)
VDSON
(IIN+IOUT)(RS+RCOIL)
= 0.5V
= 0.5V
= 0.5V
= 0.1V
= 1.1V
Then Equation 7 becomes
DBUCK
≈
DBOOST ≈
DBB
≈
VOUT + 1
VIN + 0.4
VOUT - VIN + 1
VOUT + 0.4
VOUT + 1.6
VOUT + VIN + 0.4
for Buck
for Boost
Equation 7a
for Buck-boost
Setting the LED Current
The LED current requirement determines the choice of the sense resistor Rs. This also depends on the voltage on the ADJ
pin and the voltage on the GI pin, according to the topology required.
The ADJ pin may be connected directly to the internal 1.25V reference (VREF) to define the nominal 100% LED current. The
ADJ pin can also be driven with an external dc voltage between 125mV and 1.25V to adjust the LED current proportionally
between 10% and 100% of the nominal value.
For a divider ratio GI_ADJ greater than 0.65V, the ZXLD1371 operates in Buck mode when VADJ = 1.25V. If GI_ADJ is less
than 0.65V (typical), the device operates in Boost or buck-Boost mode, according to the load connection. This 0.65V
threshold varies in proportion to VADJ, i.e., the Buck mode threshold voltage is 0.65 VADj /1.25 V.
ADJ and GI are high impedance inputs within their normal operating voltage ranges. An internal 1.3V clamp protects the
device against excessive input voltage and limits the maximum output current to approximately 4% above the maximum
current set by VREF if the maximum input voltage is exceeded.
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Applicatio
ons Inform
mation (contt.)
Buck topolo
ogy
In Buck mod
de, GI is conn
nected to ADJ as in Figure 5.
5 The LED
current depe
ends only upon RS, VADJ and
d VREF. From Equation 1
above,
Eq
quation 10
If ADJ is dire
ectly connected
d to VREF, thiss becomes:
Figure
e 5. Setting LE
ED current in Buck
B
configuration
B
to
opology
Boost and Buck-boost
For Boost and
a
Buck-boos
st topologies, the LED curre
ent depends
upon the re
esistors, RS, RGI1, and RGI2 as in Equatio
ons 4 and 2
above. The
ere is more than
n one degree of
o freedom. Th
hat is to say,
there is not a unique solution. From Equ
uation 4,
Eq
quation 11
If ADJ is con
nnected to REF
F, this becomess
d here for convvenience:
GI_ADJ is given by Equatiion 2, repeated
Figure 6. Setting LED current in Boo
ost and
B
Buck-boost
co
onfigurations
Note that from
m consideration
ns of ZXLD137
71 input bias cu
urrent, the reco
ommended limits for RGI1 are:
22kΩ
Ω < RGI1 < 100kΩ
E
Equation
12
The additiona
al degree of fre
eedom allows us to select GI_ADJ within liimits but this may
m affect overrall performancce a little.
As mentioned
d above, the working
w
voltage
e range at the GI pin is restricted. The pe
ermitted range of GI_ADJ in Boost or
Buck-boost configuration is
0.2 < GI_ADJ < 0.5
0
E
Equation
13
he sense resistor is
The mean voltage across th
VRS = ICOIL RS
E
Equation
14
Note that if GI_ADJ
G
is made
e larger, these equations sho
ow that RS is in
ncreased and VRS is increas
sed. Thereforre, for the
same coil cu
urrent, the diss
sipation in RS is increased. So, in some cases, it is be
etter to minimiize GI_ADJ. However,
consider Equ
uation 5. If AD
DJ is connected
d to REF, this becomes
b
hat VRS becom
mes smaller tha
an 225mV if GII_ADJ < 1 - D.. If also D is small,
s
VRS can become too sm
mall. For
This shows th
example if D = 0.2, and GI_ADJ is the minimum
m
value of 0.2, then VRS becomes 0.225* 0.2 / 0.8
8 = 56.25 mV. This will
he system, succh as mV drop in the copper printed wiring circuit, or
increase the LED current error due to small offsets in th
offset uncerta
ainty in the ZX
XLD1371. If no
ow, GI_ADJ is increased to 0.4 or 0.5, VRSS is increased to a value gre
eater than
100mV.
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This will give small enough ILED error for most practical purposes. Satisfactory operation will be obtained if VRS is more than
about 80mV. This means GI_ADJ should be greater than (1-DMIN) * 80/225 = (1- DMIN) * 0.355.
There is also a maximum limit on VRS which gives a maximum limit for GI_ADJ. If VRS exceeds approximately 300mV, or
133% of 225mV, the STATUS output may indicate an over-current condition. This will happen for larger DMAX. Therefore,
together with the requirement of Equation 13, the recommended range for GI_ADJ is
0.355 ( 1-DMIN) < GI_ADJ < 1.33 ( 1-DMAX )
Equation 15
An optimum compromise for GI_ADJ has been suggested, i.e.
GI_ADJAUTO = 1 - DMAX
Equation 16
This value has been used for the “Automatic” setting of the web Calculator. If 1-DMAX is less than 0.2, then GI_ADJ is set to
0.2. If 1- DMAX is greater than 0.5 then GI_ADJ is set to 0.5.
Once GI_ADJ has been selected, a value of RGI1 can be selected from Equation 12. Then RGI2 is calculated as follows,
rearranging Equation 2:
RGI2 = RGI1
1-GI_ADJ
Equation 17
GI_ADJ
For example to drive 12 LEDS at a current of 350mA from a 12V supply requires Boost configuration. Each LED has a
forward voltage of 3.2V at 350mA, so Vout = 3.2*12 = 38.4V. From Equation 6, the duty cycle is approximately
VOUT -VIN
VOUT
=
38.4-12
38.4
= 0.6875
From Equation 16, we set GI_ADJ to 1 – D = 0.3125.
IF RGI1 = 33kΩ, then from Equation 17, RGI2 = 33000 * ( 1 -0.3125 ) / 0.3125 = 72.6kΩ. Let us choose the preferred value
RGI2 = 75kΩ. Now GI_ADJ is adjusted to the new value, using Equation 2.
GI_ADJ =
RGI1
RGI1 +RGI2
=
33k
=0.305
33k +75k
Now we calculate Rs from Equation 11. Assume ADJ is connected to REF.
RSBoostBB =
0.225
VADJ
0.225
GI_ADJ
=
* 0.305 = 0.196 Ω
VREF
ILED
0.35
A preferred value of RSBoostBB = 0.2Ω will give the desired LED current with an error of 2% due to the preferred value
selection.
Table 1 shows typical resistor values used to determine the GI_ADJ ratio with E24 series resistors.
Table 1
GI ratio
RGI1
RG2
0.2
30kΩ
120kΩ
0.25
33kΩ
100kΩ
0.3
39kΩ
91kΩ
0.35
30kΩ
56kΩ
0.4
100kΩ
150kΩ
0.45
51kΩ
62kΩ
0.5
30kΩ
30kΩ
This completes the LED current setting.
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Inductor Selection and frequency Control
The selection of the inductor coil, L1, requires knowledge of the switching frequency and current ripple, and also depends on
the duty cycle to some extent. In the hysteretic converter, the frequency depends upon the input and output voltages and
the switching thresholds of the current monitor. The peak-to-peak coil current is adjusted by the ZXLD1371 to control the
frequency to a fixed value. This is done by controlling the switching thresholds within particular limits. This effectively much
reduces the overall frequency range for a given input voltage range. Where the input voltage range is not excessive, the
frequency is regulated to approximately 390kHz. This is helpful in terms of EMC and other system requirements. Figure 7
shows practical results of switching frequency driving 8 LEDs at 350mA.
500
L = 33µH
SWITCHING FREQUENCY (kHz)
450
400
350
300
L = 68µH
250
200
150
TA = 25°C, VAUX = VIN
L = 100µH
100
8 LEDs, RS = 150mΩ,
R9 = 120kΩ, R10 = 36kΩ,
CIN = 100µF
50
0
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
VIN (V)
Figure 7. Frequency vs. VIN for Boost LED Driver with
350mA LED Current and Various Inductor Values
For larger input voltage variation, or when the choice of coil inductance is not optimum, the switching frequency may depart
from the regulated value, but the regulation of LED current remains successful. If desired, the frequency can to some extent
be increased by using a smaller inductor, or decreased using a larger inductor. The web Calculator will evaluate the
frequency across the input voltage range and the effect of this upon power efficiency and junction temperatures.
Determination of the input voltage range for which the frequency is regulated may be required. This calculation is very
involved, and is not given here. However the performance in this respect can be evaluated within the web Calculator for the
chosen inductance.
The inductance is given as follows in terms of peak-to-peak ripple current in the coil, ΔIL and the MOSFET on time, tON.
tON
L1 = VIN - N VLED - IOUT RDSON + RCOIL + RS
for Buck
∆IL
tON
L1 = VIN - IIN RDSON + RCOIL + RS
for Boost
Equation 18
∆IL
tON
L1 = VIN - (IIN + IOUT ) RDSON + RCOIL + RS
for Buck-boost
∆IL
Therefore In order to calculate L1, we need to find IIN, tON, and ΔIL. The effects of the resistances are small and will be
estimated.
IIN is estimated from Equation 9.
tON is related to switching frequency, f, and duty cycle, D, as follows:
tON =
D
Equation 19
f
As the regulated frequency is known, and we have already found D from Equation 7 or the approximation Equation 7b, this
allows calculation of tON.
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The ZXLD1371 sets the ripple current, ΔIL, to between nominally 10% and 30% of the mean coil current, ICOIL, which is found
from Equation 8. The device adjusts the ripple current within this range in order to regulate the switching frequency. We
therefore need to use a ΔIL value of 20% of ICOIL to find an inductance which is optimized for the input voltage range. The
range of ripple current control is also modulated by other circuit parameters as follows.
VADJ
1-D
∆ILMAX = 0.06 +0.24
I
VREF
GI_ADJ COIL
VADJ
1-D
Equation 20
∆ILMIN = 0.02 +0.08
I
VREF
GI_ADJ COIL
VADJ
1-D
∆ILMID = 0.04 +0.16
I
VREF
GI_ADJ COIL
If ADJ is connected to REF, this simplifies to
1-D
∆ILMAX = 0.3
I
GI_ADJ COIL
1-D
∆ILMIN = 0.1
I
GI_ADJ COIL
1-D
∆ILMID = 0.2
I
GI_ADJ COIL
Equation 20a
where ΔILMID is the value we must use in Equation 18. We have now established the inductance value.
The chosen coil should saturate at a current greater than the peak sensed current. This saturation current is the DC current
for which the inductance has decreased by 10% compared to the low current value.
Assuming ±10% ripple current, we can find this peak current from Equation 8, adjusted for ripple current:
ICOILPEAK = 1.1 ILED
ICOILPEAK = 1.1 IINMAX
ICOILPEAK = 1.1 IINMAX + ILED
for Buck
for Boost
for Buck-boost
Equation 21
where IINMAX is the value of IIN at minimum VIN.
The mean current rating is also a factor, but normally the saturation current is the limiting factor.
The following websites may be useful in finding suitable components
www.coilcraft.com
www.niccomp.com
www.wuerth-elektronik.de
MOSFET Selection
The ZXLD1371 requires an external NMOS FET as the main power switch with a voltage rating at least 15% higher than
the maximum circuit voltage to ensure safe operation during the overshoot and ringing of the switch node. The current
rating is recommended to be at least 10% higher than the average transistor current. The power rating is then verified by
calculating the resistive and switching power losses.
P = Presistive + Pswitching
Resistive power losses
The resistive power losses are calculated using the RMS transistor current and the MOSFET on-resistance.
Calculate the current for the different topologies as follows:
Buck mode
IMOSFETMAX = ILED
Boost / Buck-boost mode
IMOSFETMAX =
ILED
1 − D MAX
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During the on-time, the MOSFET switch current is equal to the coil current. The rms MOSFET current is ICOIL √D where
ICOIL is the mean coil current. Therefore the approximate RMS current in the MOSFET during tON is:
Buck mode
IMOSFETRMS = ILED D
Boost / Buck-boost mode
IMOSFETRMS =
D
x ILED
1− D
The resistive power dissipation of the MOSFET is:
Presistive = IMOSFETRMS2 x RDS(ON)
Switching power losses
Calculating the switching MOSFET's switching loss depends on many factors that influence both turn-on and turn-off.
Using a first order rough approximation, the switching power dissipation of the MOSFET is:
C
x V2IN x fsw x ILOAD
Pswitching = RSS
IGATE
where
CRSS is the MOSFET's reverse-transfer capacitance (a data sheet parameter),
fSW is the switching frequency,
IGATE is the MOSFET gate-driver's sink/source current at the MOSFET's turn-on threshold.
Matching the MOSFET with the controller is primarily based on the rise and fall time of the gate voltage. The best rise/fall
time in the application is based on many requirements, such as EMI (conducted and radiated), switching losses, lead/circuit
inductance, switching frequency, etc. How fast a MOSFET can be turned on and off is related to how fast the gate
capacitance of the MOSFET can be charged and discharged. The relationship between C (and the relative total gate
charge Qg), turn-on/turn-off time and the MOSFET driver current rating can be written as:
dV ⋅ C Qg
=
I
I
where
dt = turn-on/turn-off time
dV = gate voltage
C = gate capacitance = Qg/V
I = drive current – constant current source (for the given voltage value)
dt =
Here the constant current source” I ” usually is approximated with the peak drive current at a given driver input voltage.
Example 1)
Using the DMN6068 MOSFET (VDS(MAX) = 60V, ID(MAX) = 8.5A):
Æ QG = 10.3nC at VGS = 10V
ZXLD1371 IPEAK = I GATE = 300mA
dt =
Qg
IPEAK
=
10 .3nC
= 35ns
300mA
Assuming that cumulatively the rise time and fall time can account for a maximum of 10% of the period, the maximum
frequency allowed in this condition is:
tPERIOD = 20*dt
Æ
f = 1/ tPERIOD = 1.43MHz
This frequency is well above the max frequency the device can handle, therefore the DNM6068 can be used with the
ZXLD1371 in the whole spectrum of frequencies recommended for the device (from 300kHz to 1MHz).
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Example 2)
Using the ZXMN6A09K (VDS(MAX) = 60V, ID(MAX) = 12.2A):
Æ QG = 29nC at VGS = 10V
ZXLD1371 IPEAK = 300mA
dt =
Qg
29nC
=
= 97ns
IPEAK
300mA
Assuming that cumulatively the rise time and fall time can account for a maximum of 10% of the period, the maximum
frequency allowed in this condition is:
tPERIOD = 20*dt
Æ
f = 1/ tPERIOD = 515kHz
This frequency is within the recommended frequency range the device can handle, therefore the ZXMN6A09K is
recommended to be used with the ZXLD1371 for frequencies from 300kHz to 500kHz).
The recommended total gate charge for the MOSFET used in conjunction with the ZXLD1371 is less than 30nC.
Junction Temperature Estimation
Finally, the ZXLD1371 junction temperature can be estimated using the following equations:
Total supply current of ZXLD1371:
IQTOT ≈ IQ + f • QG
Where IQ = total quiescent current IQ-IN + IQ-AUX
Power consumed by ZXLD1371
PIC = VIN • (IQ + f • Qg)
Or in case of separate voltage supply, with VAUX < 15V
PIC = VIN • IQ-IN + Vaux • (IQ-AUX + f • Qg)
TJ =
TA + PIC • θJA =
TA + PIC • (θJC + θCA)
Where the total quiescent current IQTOT consists of the static supply current (IQ) and the current required to charge and
discharge the gate of the power MOSFET. Moreover the part of thermal resistance between case and ambient depends on
the PCB characteristics.
2.5
POWER DISSIPATION (mW)
2
1.5
1
0.5
0
-40 -25 -10
5
20
35 50 65 80 95 110 125
AMBIENT TEMPERATURE (°C)
Figure 8. Power derating curve for ZXLD1370
mounted on test board according to JESD51
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Diodes Selection
For maximum efficiency and performance, the rectifier (D1) should be a fast low capacitance Schottky diode* with low
reverse leakage at the maximum operating voltage and temperature. The Schottky diode also provides better efficiency
than silicon PN diodes, due to a combination of lower forward voltage and reduced recovery time.
It is important to select parts with a peak current rating above the peak coil current and a continuous current rating higher
than the maximum output load current. In particular, it is recommended to have a voltage rating at least 15% higher than
the maximum transistor voltage to ensure safe operation during the ringing of the switch node and a current rating at least
10% higher than the average diode current. The power rating is verified by calculating the power loss through the diode.
The higher forward voltage and overshoot due to reverse recovery time in silicon diodes will increase the peak voltage on
the Drain of the external MOSFET. If a silicon diode is used, care should be taken to ensure that the total voltage appearing
on the Drain of the external MOSFET, including supply ripple, does not exceed the specified maximum value.
*A suitable Schottky diode for a switching current of up to about 1.5A would be PDS3100 (Diodes Inc).
Output Capacitor
An output capacitor may be required to limit interference or for specific EMC purposes. For boost and buck-boost
regulators, the output capacitor provides energy to the load when the freewheeling diode is reverse biased during the first
switching subinterval. An output capacitor in a buck topology will simply reduce the LED current ripple below the inductor
current ripple. In other words, this capacitor changes the current waveform through the LED(s) from a triangular ramp to a
more sinusoidal version without altering the mean current value.
In all cases, the output capacitor is chosen to provide a desired current ripple of the LED current (usually recommended to
be less than 40% of the average LED current).
Buck:
COUTPUT =
8 x fSW
ΔIL −PP
x rLED x ΔILED −PP
Boost and Buck-boost
C OUTPUT =
fSW
D x Δ IL −PP
x rLED x Δ ILED −PP
where:
•
ΔIL-PP is the ripple of the inductor current, usually ± 20% of the average sensed current
•
ΔILED-PP is the ripple of the LED current, it should be <40% of the LEDs average current
•
fsw is the switching frequency (From graphs and calculator)
•
rLED is the dynamic resistance of the LEDs string (n times the dynamic resistance of the single LED from the
datasheet of the LED manufacturer).
The output capacitor should be chosen to account for derating due to temperature and operating voltage. It must also have
the necessary RMS current rating. The minimum RMS current for the output capacitor is calculated as follows:
Buck
ICOUTPUT RMS =
ILED−PP
12
Boost and Buck-boost
ICOUTPUTRMS = ILED
DMAX
1 − DMAX
Ceramic capacitors with X7R dielectric are the best choice due to their high ripple current rating, long lifetime, and
performance over the voltage and temperature ranges.
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Input Capacitor
The input capacitor can be calculated knowing the input voltage ripple ΔVIN-PP as follows:
Buck
CIN =
D x(1 − D)x ILED
fSW x ΔVIN −PP
CIN =
ΔIL −PP
8 x fSW x ΔVIN−PP
Use D = 0.5 as worst case
Boost
Buck-boost
C IN =
D x ILED
f SW x Δ VIN − PP
Use D = DMAX as worst case
The minimum RMS current for the output capacitor is calculated as follows:
Buck
ICIN −RMS = ILED x Dx(1 − D)
use D=0.5 as worst case
Boost
ICIN −RMS =
IL −PP
12
Buck-boost
ICIN−RMS = ILED x
D
(1 − D)
Use D=DMAX as worst case
LED Current Dimming
The ZXLD1371 has 3 dimming methods for reducing the average LED current
1. DC dimming using the ADJ pin
2. PWM dimming using the PWM pin
3. DC dimming for thermal protection using the TADJ pin.
DC Dimming
The ZXLD1371 has a clamp on the ADJ pin to prevent over-driving of the LED current which results in the maximum
voltage being applied to internal circuitry is the reference voltage. This provides a 10:1 dynamic range of dc LED current
adjustment.
The equation for DC dimming of the LED current is approximately:
ILED_DIM =ILED_NOM
VADJ
VREF
750
750
LED CURRENT (mA)
One consequence of DC dimming is that as the ADJ pin
voltage is reduced the sense voltage will also be reduced
which has an impact on accuracy and switching frequency
especially at lower ADJ pin voltages.
600
600
Switching
Frequency
450
450
300
300
TA=25°C
VAUX =VIN =12V
2 LEDs
L=33µH
RS=300mΩ
150
0
0
0.25
0.5
0.75
ADJ VOLTAGE (V)
1
150
SWITCHING FREQUENCY (kHz)
Where
ILED_DIM is the dimmed LED current
ILED_NOM is the LED current with VADJ = 1.25V
0
1.25
Figure 9. LED Current and switching frequency vs.
ADJ Voltage
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PWM Output Current Control & Dimming
The ZXLD1371 has a dedicated PWM dimming input that allows a wide dimming frequency range from 100Hz to 1kHz with
up to 1000:1 resolution; however higher dimming frequencies can be used – at the expense of dimming dynamic range and
accuracy.
Typically, for a PWM frequency of 1kHz, the error on the current linearity is lower than 5%; in particular the accuracy is
better than 1% for PWM from 5% to 100%. This is shown in the graph below:
Buck mode - L=33uH - Rs = 150mΩ - PWM @ 1kHz
1500.00
10%
9%
8%
7%
1000.00
6%
750.00
5%
4%
500.00
Error
LED current [mA]
1250.00
3%
2%
250.00
1%
0.00
0
10
20
30
40
50
60
70
80
90
0%
100
PWM
PWM @ 1kHz
Error
Figure 10. LED Current Linearity and Accuracy with PWM Dimming at 1kHz
For a PWM frequency of 100Hz, the error on the current linearity is lower than 2.5%; it becomes negligible for PWM greater
than 5%. This is shown in the graph below:
Buck mode - L=33uH - Rs = 150mΩ - PWM @ 100Hz
1500.00
10%
9%
8%
7%
1000.00
6%
5%
750.00
4%
500.00
Error
LED current [mA]
1250.00
3%
2%
250.00
1%
0.00
0
10
20
30
40
50
60
70
80
90
0%
100
PWM
PWM @ 100Hz
Error
Figure 11. LED Current Linearity and Accuracy with PWM Dimming at 100Hz
The PWM pin is designed to be driven by both 3.3V and 5V logic levels and as such doesn’t require open collector/drain
drive. It can also be driven by an open drain/collector transistor. In this case the designer can either use the internal pull-up
network or an external pull-up network in order to speed-up PWM transitions, as shown in the Boost/ Buck-Boost section.
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LED current can be adjusted digitally, by applying a low
frequency PWM logic signal to the PWM pin to turn the
controller on and off. This will produce an average output
current proportional to the duty cycle of the control signal.
During PWM operation, the device remains powered up
and only the output switch is gated by the control signal.
The PWM signal can achieve very high LED current
resolution. In fact, dimming down from 100% to 0, a
minimum pulse width of 2µs can be achieved resulting in
very high accuracy. While the maximum recommended
pulse is for the PWM signal is10ms.
2µs
< 10 ms
Gate
0V
PWM
< 10 ms
0V
2µs
Figure 12. PWM Dimming Minimum and
Maximum Pulse
The device can be put in standby by taking the PWM pin to ground, or pulling it to a voltage below 0.4V with a suitable open
collector NPN or open drain NMOS transistor, for a time exceeding 15ms (nominal). In the shutdown state, most of the
circuitry inside the device is switched off and residual quiescent current will be typically 90µA. In particular, the Status pin
will go down to GND while the FLAG and REF pins will stay at their nominal values.
Figure 13. Stand-by State From PWM Signal
Thermal Control of LED Current
For thermal control of the LEDs, the ZXLD1371 monitors the voltage on the TADJ pin and reduces output current if the
voltage on this pin falls below 625mV. An external NTC thermistor and resistor can therefore be connected as shown below
to set the voltage on the TADJ pin to 625mV at the required temperature threshold. This will give 100% LED current below
the threshold temperature and a falling current above it as shown in the graph. The temperature threshold can be altered by
adjusting the value of Rth and/or the thermistor to suit the requirements of the chosen LED.
The Thermal Control feature can be disabled by connecting TADJ directly to REF.
Here is a simple procedure to design the thermal feedback circuit:
1)
Select the temperature threshold Tthreshold at which the current must start to decrease
2)
Select the Thermistor TH1 (both resistive value at 25˚C and beta)
3)
Select the value of the resistor Rth as Rth = TH at Tthreshold
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Figure 14. Thermal Feedback Network
The thermistor resistance, RT, at a temperature of T degrees Kelvin is given by
B
RT = R R e
1 1
T TR
Where
RR is the thermistor resistance at the reference temperature, TR
TR is the reference temperature, in Kelvin, normally 273 + 25 = 298K (25°C)
B is the “beta” value of the thermistor.
For example,
1)
Temperature threshold Tthreshold = 273 + 70 = 343K (70˚C)
2)
TH1 = 10kΩ at 25˚C and B = 3900
3)
Rth = RT at Tthreshold = 1.8kΩ
Æ RT = 1.8kΩ @ 70˚C
Over-Temperature Shutdown
The ZXLD1371 incorporates an over-temperature shutdown circuit to protect against damage caused by excessive die
temperature. A warning signal is generated on the STATUS output when die temperature exceeds 125°C nominal and the
output is disabled when die temperature exceeds 150°C nominal. Normal operation resumes when the device cools back
down to 125°C.
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FLAG/STATUS Outputs
The FLAG/STATUS outputs provide a warning of extreme operating or fault conditions. FLAG is an open-drain logic
output, which is normally off, but switches low to indicate that a warning, or fault condition exists. STATUS is a DAC
output, which is normally high (4.5V), but switches to a lower voltage to indicate the nature of the warning/fault.
Conditions monitored, the method of detection and the nominal STATUS output voltage are given in the following table
(Note 15):
Table 2
Warning/Fault condition
Severity
(Note 16)
Monitored
parameters
Normal operation
FLAG
Nominal STATUS voltage
H
4.5V
1
VAUX < 5.0V
L
4.5V
2
VIN < 5.6V
L
< 3.6V
Output current out of regulation
(Note 17)
2
VSHP outside normal
voltage range
L
3.6V
Driver stalled with switch ‘on’, or
‘off’ (Note 18)
2
tON, or tOFF > 100µs
L
3.6V
Device temperature above
maximum recommended
operating value
3
TJ > 125°C
L
1.8V
Sense resistor current IRS above
specified maximum
4
VSENSE > 0.3V
L
0.9V
Supply under-voltage
Notes:
15. These STATUS pin voltages apply for an input voltage,VIN, of 7.5V < VIN < 60V. Below 7.5V the STATUS pin voltage levels reduce and therefore
may not report the correct status. For 5.4V < VIN < 7.5V the flag pin still reports an error by going low. At low VIN in Boost and Buck-boost modes
an over-current status may be indicated when operating at high boost ratios -– this due to the feedback loop increasing the sense voltage.
16. Severity 1 denotes lowest severity.
17. This warning will be indicated if the output power demand is higher than the available input power; the loop may not be able to maintain
regulation.
18. This warning will be indicated if the gate pin stays at the same level for greater than 100µs (e.g. the output transistor cannot pass enough current
to reach the upper switching threshold).
Figure 15. Status levels
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Applications Information (cont.)
In the event of more than one fault/warning condition occurring, the higher severity condition will take precedence. E.g.
‘Excessive coil current’ and ‘Out of regulation’ occurring together will produce an output of 0.9V on the STATUS pin.
If VADJ>1.7V, VSENSE may be greater than the excess coil current threshold in normal operation and an error will be
reported. Hence, STATUS and FLAG are only guaranteed for VADJ<=VREF.
In particular, during the first 100μs the diagnostic is
signaling an over-current then an out-of-regulation
status. These two events are due to the charging of
the inductor and are not true fault conditions.
FLAG
VREF
0V
O ut of
STATUS
Diagnostic signals should be ignored during the device
start – up for 100μs. The device start up sequence will
be initiated both during the first power on of the device
or after the PWM signal is kept low for more than
15ms, initiating the standby state of the device.
re g u la tio n
O ver
C u rre n t
Coil current
2 2 5 m V /R 1
0A
100us
Figure 16. Diagnostic during Start-up
Reduced Input Voltage Operation
To facilitate operation in automotive and other applications, that have large transient reductions in system supply voltage,
the ZXLD1371 is now capable of operating down to input voltages as low as 5.0V. Care must be taken when operating at
these lower supply voltages to ensure that the external MOSFET is correctly enhanced and that the boosting ratio is not
increased to excessive amounts where both the duty cycle and peak-switch current limits are not exceeded. The device
will operate down to 5.0V, but for reliable start up VIN must be higher than 5.4V. The designer should also take into
account any noise that may occur on the supply lines.
In Buck-boost and Boost modes (most common topologies for applications likely to require transient operation down to
supply voltages approaching 5.0V) as the input voltage reduces then the peak switch current will increase the ZXLD1371
compensates for this by allowing the sense voltage to increase while maintaining regulation of the LED current. However if
the boost ratio (switch output voltage/input voltage) is increased too much then the sense voltage could be increased too
much causing an over-current flag to be triggered and/or loss of regulation.
In addition to this, increased power dissipation will occur in the external MOSFET switch – especially if the external
MOSFET has a large threshold. One way of overcoming this is to apply a boot-strap network to the VAUX pin – see next
section.
If the ZXLD1371 is used in buck mode at low voltages then the boot-strap network cannot be implemented and so a low
threshold MOSFET with low gate capacitance should be used. Some loss of regulation is expected to occur at voltages
below 6V – see Buck mode Typical Characteristics Section.
When using the ZXLD1371 in applications with transient input voltage excursions we recommend using the web calculator
to optimize operation over the normal operating band. Then change the input range to include the transient excursion while
keeping the optimized component selection to check expected function during the transient input voltage conditions.
ZXLD1371
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Applications Information (cont.)
Boosting VAUX Supply Voltage in Boost and Buck-Boost Mode
This means that depending on the characteristics of the external MOSFET, the gate voltage may not be enough to fully
enhance the power MOSFET. A boot-strap boosting technique can be used to increase the gate drive voltage at low input
voltage. See figure 17 for circuit diagram. This can be particularly important for extended use at low input voltages as this is
when the switch current will be at its greatest – resulting in greatest heat generation within the MOSFET.
Figure 17. Bootstrap Circuit for Boost and Buck-Boost Low Voltage Operations
The Bootstrap circuit guarantees that the MOSFET is fully enhanced reducing both the power dissipation and the risk of
thermal runaway of the MOSFET itself. The bootstrap circuit consists of an extra diode D2 and decoupling capacitor C3
which are used to generate a boosted voltage at VAUX. This enables the device to operate with full output current when VIN
is at the minimum value of 5V. The resistor R2 can be used to limit the current in the bootstrap circuit in order to reduce the
impact of the circuit itself on the LED accuracy. A typical value would be 100 ohms. The impact on the LED current is
usually a decrease of maximum 5% compared to the nominal current value set by the sense resistor.
The Zener diode D3 is used to limit the voltage on the VAUX pin to less than 60V.
Due to the increased number of components and the loss of current accuracy, the bootstrap circuit is recommended only
when the system has to operate continuously in conditions of low input voltage (between 5 and 8V) and high load current.
Other circumstances such as low input voltage at low load current, or transient low input voltage at high current should be
evaluated keeping account of the external MOSFET’s power dissipation.
Figure 18. Effect of Bootstrap on LED Current in Buck-Boost Mode
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Applications Information (cont.)
Over-Voltage Protection
The ZXLD1371 is inherently protected against open-circuit load when used in Buck configuration. However care has to be
taken with open-circuit load conditions in Buck-Boost or Boost configurations. This is because in these configurations there
is no internal open-circuit protection mechanism for the external MOSFET. In this case an Over-Voltage-Protection (OVP)
network should be provided externally to the MOSFET to avoid damage due to open circuit conditions. This is shown in
figure 19 below, highlighted in the dotted blue box.
Figure 19. OVP Circuit
The zener voltage is determined according to: Vz = VLEDMAX +10% where VLEDMAX is maximum LED chain voltage.
If the LEDA voltage exceeds VZ the gate of MOSFET Q2 will rise turning Q2 on. This will pull the PWM pin low and switch
off Q1 until the voltage on the drain of Q1 falls below Vz. If the voltage at LEDA remains above VZ for longer than 20ms
then the ZXLD1371 will enter into a shutdown state.
Care should be taken such that the maximum gate voltage of the Q2 MOSFET is not exceeded.
Take care of the max voltage drop on the Q2 MOSFET gate. Typical devices for Z1 and Q2 are BZX84C and 2N7002
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Applications Information (cont.)
PCB Layout Considerations
PCB layout is a fundamental to device performance in all configurations.
ZXLD1371 PCB layout.
Figure 20 shows a section of a proven
SHP pin
Inductor, Switch
and
Freewheeling
diode
VIN / VAUX
decoupling
Figure 20. Circuit Layout
Here are some considerations useful for the PCB layout using ZXLD1371 in Buck, Boost and Buck-boost configurations:
ƒ
In order to avoid ringing due to stray inductances, the inductor L1, the anode of D1 and the drain of Q1 should be
placed as close together as possible.
ƒ
The shaping capacitor C1 is fundamental for the stability of the control loop. To this end it should be placed no
more than 5mm from the SHP pin.
ƒ
Input voltage pins, VIN and VAUX, need to be decoupled. It is recommended to use two ceramic capacitors of
2.2uF, X7R, 100V (C3 and C4). In addition to these capacitors, it is suggested to add two ceramic capacitors of
1uF, X7R, 100V each (C2, C8), as well as a further decoupling capacitor of 100nF close to the VIN/VAUX pins
(C9). VIN and VAUX pins can be short-circuited when the device is used in buck mode, or can be driven from a
separate supply.
ƒ
The underside of the PCB should be a solid copper ground plane, electrically bonded to top ground copper at
regular intervals using plated-thro via holes. The ground plane should be unbroken as far as possible, particularly
in the area of the switching circuit including the ZXLD1371, L1, Q1 D, C3 and C4. Plated via holes are necessary
to provide a short electrical path to minimize stray inductance. Critical positions of via holes include the decoupling
capacitors, the source connection of the MOSFET and the ground connections of the ZXLD1371, including the
centre paddle. These via holes also serve to conduct heat away from the semiconductors and minimize the device
junction temperatures.
Evaluation Boards
To support easier evaluation of the ZXLD1371 three evaluation boards have been developed which available via your
Diodes sales representative for qualified opportunities:
ZXLD1371EV1 Buck configuration
ZXLD1371EV2 Buck-boost configuration
ZXLD1371EV3 Boost configuration
ZXLD1371
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Ordering Information
Device (Note 19)
Packaging
Status
ZXLD1371EST16TC
TSSOP-16EP
Preview
ZXLD1371QESTTC
TSSOP-16EP
Preview
Note:
Part Marking
ZXLD
1371
YYWW
ZXLD
1371
YYWW
Reel
Quantity
Tape Width
Reel
Size
2500
16mm
13”
2500
16mm
13”
19. For Automotive grade with AEC-Q100 qualification the ZXLD1371QESTTC should be ordered.
Where YY is last two digits of year and WW is two digit week number
Package Outline Dimensions (All Dimensions in mm)
Pin 1 Indent
gauge plane
seating plane
B L
a2
F
Detail “A”
G
K
A
a1
C
D
TSSOP-16EP
Dim
Min
Max
A
4.9
5.10
B
4.30
4.50
C
1.2
⎯
D
0.8
1.05
F
1.00 Ref.
G
0.65 Ref.
K
0.19
0.30
L
6.40 Ref.
a1
7°
a2
0°
8°
All Dimensions in mm
Detail “A”
Suggested Pad Layout
X2
Dimensions
Y 16x
Y3
Y1
X1
Y2
C
X
X1
X2
Y
Y1
Y2
Y3
Value
(in mm)
0.650
0.450
3.290
5.000
1.450
3.290
4.450
7.350
C
X 16x
ZXLD1371
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the express written approval of the Chief Executive Officer of Diodes Incorporated. As used herein:
A. Life support devices or systems are devices or systems which:
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2. support or sustain life and whose failure to perform when properly used in accordance with instructions for use provided
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B.
A critical component is any component in a life support device or system whose failure to perform can be reasonably expected
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Customers represent that they have all necessary expertise in the safety and regulatory ramifications of their life support devices or
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