® LY62256 32K X 8 BIT LOW POWER CMOS SRAM Rev. 1.0 FEATURES GENERAL DESCRIPTION Fast access time : 35/55/70ns Low power consumption: Operating current : 40/35/30mA (TYP.) Standby current : 2µA (TYP.) L-version 1µA (TYP.) LL-version Single 5V power supply All inputs and outputs TTL compatible Fully static operation Tri-state output Data retention voltage : 2.0V (MIN.) Package : 28-pin 600 mil PDIP 28-pin 330 mil SOP 28-pin 8mm x 13.4mm STSOP The LY62256 is a 262,144-bit low power CMOS static random access memory organized as 32,768 words by 8 bits. It is fabricated using very high performance, high reliability CMOS technology. Its standby current is stable within the range of operating temperature. The LY62256 is well designed for low power application, and particularly well suited for battery back-up nonvolatile memory application. The LY62256 operates from a single power supply of 5V and all inputs and outputs are fully TTL compatible PRODUCT FAMILY Product Family LY62256 LY62256(E) LY62256(I) Operating Temperature 0 ~ 70℃ -20 ~ 80℃ -40 ~ 85℃ Vcc Range Speed 4.5 ~ 5.5V 4.5 ~ 5.5V 4.5 ~ 5.5V 35/55/70ns 35/55/70ns 35/55/70ns FUNCTIONAL BLOCK DIAGRAM PIN DESCRIPTION Vcc Vss A0-A14 DECODER DQ0-DQ7 I/O DATA CIRCUIT CE# WE# OE# CONTROL CIRCUIT Power Dissipation Standby(ISB1,TYP.) Operating(Icc,TYP.) 2µA(L)/1µA(LL) 40/35/30mA 2µA(L)/1µA(LL) 40/35/30mA 2µA(L)/1µA(LL) 40/35/30mA 32Kx8 MEMORY ARRAY SYMBOL DESCRIPTION A0 - A14 Address Inputs DQ0 – DQ7 Data Inputs/Outputs CE# Chip Enable Input WE# Write Enable Input OE# Output Enable Input VCC Power Supply VSS Ground COLUMN I/O Lyontek Inc. reserves the rights to change the specifications and products without notice. 40 Hsuch-Fu Rd., Hsinchu, Taiwan. R.O.C. TEL: 886-3-5165511 FAX: 886-3-5165522 2 N0027 ® LY62256 32K X 8 BIT LOW POWER CMOS SRAM Rev. 1.0 PIN CONFIGURATION 1 28 Vcc A12 2 27 WE# A7 3 26 A13 A6 4 25 A8 A5 5 24 A9 A4 6 A3 7 A2 8 A1 9 LY62256 A14 23 A11 22 OE# 21 A10 20 CE# A0 10 19 DQ7 DQ0 11 18 DQ6 DQ1 12 17 DQ5 DQ2 13 16 DQ4 Vss 14 15 DQ3 OE# A11 A9 A8 A13 WE# Vcc A14 A12 A7 A6 A5 A4 A3 1 2 3 4 5 6 7 8 9 10 11 12 13 14 LY62256 28 27 26 25 24 23 22 21 20 19 18 17 16 15 A10 CE# DQ7 DQ6 DQ5 DQ4 DQ3 Vss DQ2 DQ1 DQ0 A0 A1 A2 STSOP PDIP/SOP ABSOLUTE MAXIMUN RATINGS* PARAMETER Terminal Voltage with Respect to VSS SYMBOL VTERM Operating Temperature TA Storage Temperature Power Dissipation DC Output Current Soldering Temperature (under 10 sec) TSTG PD IOUT TSOLDER RATING -0.5 to 7.0 0 to 70(C grade) -20 to 80(E grade) -40 to 85(I grade) -65 to 150 1 50 260 UNIT V ℃ ℃ W mA ℃ *Stresses greater than those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to the absolute maximum rating conditions for extended period may affect device reliability. TRUTH TABLE MODE Standby Output Disable Read Write Note: CE# H L L L OE# X H L X WE# X H H L I/O OPERATION High-Z High-Z DOUT DIN SUPPLY CURRENT ISB,ISB1 ICC,ICC1 ICC,ICC1 ICC,ICC1 H = VIH, L = VIL, X = Don't care. Lyontek Inc. reserves the rights to change the specifications and products without notice. 40 Hsuch-Fu Rd., Hsinchu, Taiwan. R.O.C. TEL: 886-3-5165511 FAX: 886-3-5165522 3 N0027 ® LY62256 32K X 8 BIT LOW POWER CMOS SRAM Rev. 1.0 DC ELECTRICAL CHARACTERISTICS SYMBOL TEST CONDITION PARAMETER Supply Voltage VCC *1 Input High Voltage VIH *2 Input Low Voltage VIL Input Leakage Current ILI VCC ≧ VIN ≧ VSS Output Leakage VCC ≧ VOUT ≧ VSS, ILO Current Output Disabled Output High Voltage VOH IOH = -1mA Output Low Voltage VOL IOL = 2mA ICC Average Operating Power supply Current ICC1 Standby Power Supply Current ISB ISB1 Cycle time = Min. CE# = VIL , II/O = 0mA MIN. 4.5 2.4 - 0.5 -1 -35 -55 -70 Cycle time = 1µs CE#≦0.2V and II/O = 0mA other pins at 0.2V or VCC-0.2V CE# = VIH -L CE# ≧VCC - 0.2V -LL TYP. 5.0 - *5 MAX. 5.5 VCC+0.5 0.8 1 UNIT V V V µA -1 - 1 µA 2.4 - 40 35 30 0.4 50 45 40 V V mA mA mA - 5 10 mA - 1 2 1 3 100 *4 50 mA µA µA Notes: 1. VIH(max) = VCC + 3.0V for pulse width less than 10ns. 2. VIL(min) = VSS - 3.0V for pulse width less than 10ns. 3. Over/Undershoot specifications are characterized, not 100% tested. 4. 10µA for special request 5. Typical values are included for reference only and are not guaranteed or tested. Typical valued are measured at VCC = VCC(TYP.) and TA = 25℃ CAPACITANCE (TA = 25℃, f = 1.0MHz) PARAMETER Input Capacitance Input/Output Capacitance SYMBOL CIN CI/O MIN. - MAX 6 8 UNIT pF pF Note : These parameters are guaranteed by device characterization, but not production tested. AC TEST CONDITIONS Input Pulse Levels Input Rise and Fall Times Input and Output Timing Reference Levels Output Load 0.2V to VCC - 0.2V 3ns 1.5V CL = 50pF + 1TTL, IOH/IOL = -1mA/2mA Lyontek Inc. reserves the rights to change the specifications and products without notice. 40 Hsuch-Fu Rd., Hsinchu, Taiwan. R.O.C. TEL: 886-3-5165511 FAX: 886-3-5165522 4 N0027 ® LY62256 32K X 8 BIT LOW POWER CMOS SRAM Rev. 1.0 AC ELECTRICAL CHARACTERISTICS (1) READ CYCLE PARAMETER Read Cycle Time Address Access Time Chip Enable Access Time Output Enable Access Time Chip Enable to Output in Low-Z Output Enable to Output in Low-Z Chip Disable to Output in High-Z Output Disable to Output in High-Z Output Hold from Address Change (2) WRITE CYCLE PARAMETER Write Cycle Time Address Valid to End of Write Chip Enable to End of Write Address Set-up Time Write Pulse Width Write Recovery Time Data to Write Time Overlap Data Hold from End of Write Time Output Active from End of Write Write to Output in High-Z SYM. tRC tAA tACE tOE tCLZ* tOLZ* tCHZ* tOHZ* tOH SYM. tWC tAW tCW tAS tWP tWR tDW tDH tOW* tWHZ* LY62256-35 MIN. MAX. 35 35 35 25 10 5 15 15 10 - LY62256-55 MIN. MAX. 55 55 55 30 10 5 20 20 10 - LY62256-70 MIN. MAX. 70 70 70 35 10 5 25 25 10 - UNIT LY62256-35 MIN. MAX. 35 30 30 0 25 0 20 0 5 15 LY62256-55 MIN. MAX. 55 50 50 0 45 0 25 0 5 20 LY62256-70 MIN. MAX. 70 60 60 0 55 0 30 0 5 25 UNIT ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns *These parameters are guaranteed by device characterization, but not production tested. Lyontek Inc. reserves the rights to change the specifications and products without notice. 40 Hsuch-Fu Rd., Hsinchu, Taiwan. R.O.C. TEL: 886-3-5165511 FAX: 886-3-5165522 5 N0027 ® LY62256 32K X 8 BIT LOW POWER CMOS SRAM Rev. 1.0 TIMING WAVEFORMS READ CYCLE 1 (Address Controlled) (1,2) tRC Address tAA Dout tOH Previous Data Valid Data Valid READ CYCLE 2 (CE# and OE# Controlled) (1,3,4,5) tRC Address tAA CE# tACE OE# tOE tOH tOHZ tCHZ tOLZ tCLZ Dout High-Z Data Valid High-Z Notes : 1.WE# is high for read cycle. 2.Device is continuously selected OE# = low, CE# = low. 3.Address must be valid prior to or coincident with CE# = low,; otherwise tAA is the limiting parameter. 4.tCLZ, tOLZ, tCHZ and tOHZ are specified with CL = 5pF. Transition is measured ±500mV from steady state. 5.At any given temperature and voltage condition, tCHZ is less than tCLZ , tOHZ is less than tOLZ. Lyontek Inc. reserves the rights to change the specifications and products without notice. 40 Hsuch-Fu Rd., Hsinchu, Taiwan. R.O.C. TEL: 886-3-5165511 FAX: 886-3-5165522 6 N0027 ® LY62256 32K X 8 BIT LOW POWER CMOS SRAM Rev. 1.0 WRITE CYCLE 1 (WE# Controlled) (1,2,3,5,6) tWC Address tAW CE# tCW tAS tWP tWR WE# tWHZ Dout TOW High-Z (4) tDW (4) tDH Data Valid Din WRITE CYCLE 2 (CE# Controlled) (1,2,5,6) tWC Address tAW CE# tAS tWR tCW tWP WE# tWHZ Dout High-Z (4) tDW tDH Data Valid Din Notes : 1.WE#, CE# must be high during all address transitions. 2.A write occurs during the overlap of a low CE#, low WE#. 3.During a WE# controlled write cycle with OE# low, tWP must be greater than tWHZ + tDW to allow the drivers to turn off and data to be placed on the bus. 4.During this period, I/O pins are in the output state, and input signals must not be applied. 5.If the CE# low transition occurs simultaneously with or after WE# low transition, the outputs remain in a high impedance state. 6.tOW and tWHZ are specified with CL = 5pF. Transition is measured ±500mV from steady state. Lyontek Inc. reserves the rights to change the specifications and products without notice. 40 Hsuch-Fu Rd., Hsinchu, Taiwan. R.O.C. TEL: 886-3-5165511 FAX: 886-3-5165522 7 N0027 ® LY62256 32K X 8 BIT LOW POWER CMOS SRAM Rev. 1.0 DATA RETENTION CHARACTERISTICS PARAMETER VCC for Data Retention Data Retention Current Chip Disable to Data Retention Time Recovery Time tRC* = Read Cycle Time SYMBOL TEST CONDITION VDR CE# ≧ VCC - 0.2V VCC = 2.0V IDR CE# ≧ VCC - 0.2V See Data Retention tCDR Waveforms (below) tR -L -LL MIN. 2.0 - TYP. 1 0.5 MAX. 5.5 50 20 UNIT V µA µA 0 - - ns tRC* - - ns DATA RETENTION WAVEFORM VDR ≧ 2.0V Vcc Vcc(min.) Vcc(min.) tCDR CE# VIH tR CE# ≧ Vcc-0.2V VIH Lyontek Inc. reserves the rights to change the specifications and products without notice. 40 Hsuch-Fu Rd., Hsinchu, Taiwan. R.O.C. TEL: 886-3-5165511 FAX: 886-3-5165522 8 N0027 ® LY62256 32K X 8 BIT LOW POWER CMOS SRAM Rev. 1.0 PACKAGE OUTLINE DIMENSION 28 pin 600 mil PDIP Package Outline Dimension UNIT SYM. A1 A2 B B1 c D E E1 e eB L S Q1 Θ INCH.(BASE) 0.010 (MIN) 0.150±0.005 0.020 (MAX) 0.055 (MAX) 0.012 (MAX) 1.430 (MAX) 0.6 (TYP) 0.52 (MAX) 0.100 (TYP) 0.625 (MAX) 0.180(MAX) 0.06 (MAX) 0.08(MAX) o 15 (MAX) MM(REF) 0.254 (MIN) 3.810±0.127 0.508(MAX) 1.397(MAX) 0.304 (MAX) 36.322 (MAX) 15.24 (TYP) 13.208 (MAX) 2.540(TYP) 15.87 (MAX) 4.572(MAX) 1.524 (MAX) 2.032(MAX) o 15 (MAX) Lyontek Inc. reserves the rights to change the specifications and products without notice. 40 Hsuch-Fu Rd., Hsinchu, Taiwan. R.O.C. TEL: 886-3-5165511 FAX: 886-3-5165522 9 N0027 ® LY62256 32K X 8 BIT LOW POWER CMOS SRAM Rev. 1.0 28 pin 330 mil SOP Package Outline Dimension UNIT SYM. A A1 A2 b c D E E1 e L L1 S y Θ INCH(BASE) 0.120 (MAX) 0.002(MIN) 0.098±0.005 0.016 (TYP) 0.010 (TYP) 0.728 (MAX) 0.340 (MAX) 0.465±0.012 0.050 (TYP) 0.05 (MAX) 0.067±0.008 0.047 (MAX) 0.003(MAX) o o 0 ～10 MM(REF) 3.048 (MAX) 0.05(MIN) 2.489±0.127 0.406(TYP) 0.254(TYP) 18.491 (MAX) 8.636 (MAX) 11.811±0.305 1.270(TYP) 1.270 (MAX) 1.702 ±0.203 1.194 (MAX) 0.076(MAX) o o 0 ～10 Lyontek Inc. reserves the rights to change the specifications and products without notice. 40 Hsuch-Fu Rd., Hsinchu, Taiwan. R.O.C. TEL: 886-3-5165511 FAX: 886-3-5165522 10 N0027 ® LY62256 32K X 8 BIT LOW POWER CMOS SRAM Rev. 1.0 28 pin 8mm x 13.4mm STSOP Package Outline Dimension UNIT SYM. A A1 A2 b c Db E e D L L1 y Θ INCH(BASE) MM(REF) 0.047 (MAX) 0.004±0.002 0.039±0.002 0.006 (TYP) 0.010 (TYP) 0.465±0.004 0.315±0.004 0.022 (TYP) 0.528±0.008 0.020±0.004 0.0315±0.004 0.08(MAX) o o 0 ～5 1.20 (MAX) 0.10±0.05 1.00±0.05 0.15(TYP) 0.254(TYP) 11.80±0.10 8.00±0.10 0.55(TYP) 13.40±0.20 0.50±0.10 0.80±0.10 0.003(MAX) o o 0 ～5 Note：E dimension is not including end flash. The total of both sides’ end flash is not above 0.3mm. Lyontek Inc. reserves the rights to change the specifications and products without notice. 40 Hsuch-Fu Rd., Hsinchu, Taiwan. R.O.C. TEL: 886-3-5165511 FAX: 886-3-5165522 11 N0027 ® LY62256 32K X 8 BIT LOW POWER CMOS SRAM Rev. 1.0 ORDERING INFORMATION LY62256 V W - XX YY Z Z : Temperature Range Blank : (Commercial) 0°C ~ 70°C E : (Extended) -20°C ~ +80°C I : (Industrial) -40°C ~ +85°C YY : Power Type L : Low Power LL : Ultra Low Power XX : Access Time(Speed) W : Lead Information N : Normal L : Lead Free V : Package Type P : 28-pin 600 mil P-DIP S : 28-pin 330 mil SOP R : 28-pin 8 mm x 13.4 mm STSOP Lyontek Inc. reserves the rights to change the specifications and products without notice. 40 Hsuch-Fu Rd., Hsinchu, Taiwan. R.O.C. TEL: 886-3-5165511 FAX: 886-3-5165522 12 N0027 ® LY62256 Rev. 1.0 32K X 8 BIT LOW POWER CMOS SRAM THIS PAGE IS LEFT BLANK INTENTIONALLY. Lyontek Inc. reserves the rights to change the specifications and products without notice. 40 Hsuch-Fu Rd., Hsinchu, Taiwan. R.O.C. TEL: 886-3-5165511 FAX: 886-3-5165522 13 N0027