ACT355A Rev2, 13-Aug-08 ActivePSRTM Primary Switching Regulators FEATURES • Multiple Patent-Pending Primary Side Regulation Technology • No Opto-coupler • Best Constant Voltage, Constant Current Over All Accuracy • Minimum External Components • Integrated Line and Primary Inductance Compensation • Integrated Output Cord Resistance Compensation • Line Under-Voltage Protection • Short Circuit Protection • Over Temperature Protection • Flyback Topology in DCM Operation • Complies with all Global Energy Efficient Regulations: 0.3W Standby Power and CEC Average Efficiency • SIP-4 and SOT23-5 Packages The ACT355A ensures safe operation with complete protection against all fault conditions. Built-in protection circuitry is provided for output shortcircuit, line under-voltage, and over-temperature conditions. The ACT355A ActivePSR is optimized for costsensitive applications, and utilizes Active-semi’s proprietary primary-side feedback architecture to provide accurate constant voltage, constant current (CV/CC) regulation without the need of an optocoupler or reference device. Integrated line and primary inductance compensation circuitry provides accurate constant current operation despite wide variations in line voltage and primary inductance. Integrated output cord resistance compensation further enhances output accuracy. These products achieve excellent regulation and transient response, yet requires less than 250mW of standby power. The ACT355A is optimized for 2.5W to 3.5W applications (such as 5V/500mA to 5V/700mA CV/CC chargers). It is available in space-saving 4-pin SIP4 and 5-pin SOT23-5 packages. Figure 1: Typical Application Circuit APPLICATIONS • Chargers for Cell Phones, PDAs, MP3, HIGH VOLTAGE DC Portable Media Players, DSCs, and Other Portable Devices and Appliances + NP • RCC Adapter Replacements NS CV/CC OUTPUT • Linear Adapter Replacements • Standby and Auxiliary Supplies GENERAL DESCRIPTION The ACT355A belongs to the high performance, multiple patent-pending ActivePSRTM Family of universal-input AC/DC off-line controllers for battery charger and adapter applications. It is designed for the flyback topology working in a discontinuous conduction mode (DCM). In addition to being the industry’s most accurate primary side regulator, the ACT355A meets all of the global energy efficiency regulations (CEC, European Blue Angel, and US Energy Star standards) while using very few external components. VDD SW ACT355A + R5 NA FB G R6 TM ― is a trademark of Active-Semi. Copyright © 2008 Active-Semi, Inc. ACT355A Rev2, 13-Aug-08 ORDERING INFORMATION PART NUMBER TEMPERATURE RANGE PACKAGE PINS PACKING METHOD TOP MARK ACT355AHQ-A -40°C to 85°C SIP-4 4 AMMO ACT355A ACT355AUC-T -40°C to 85°C SOT23-5 5 TAPE & REEL PSRI PIN CONFIGURATION 1 G 2 NC 3 5 VDD 4 SW PSRI FB 1 2 3 4 SOT23-5 ACT355AUC-T SIP-4 ACT355AHQ-A PIN DESCRIPTIONS PIN NUMBER PIN DESCRIPTION PIN NAME ACT355AHQ-A ACT355AUC-T 1 1 FB 2 5 VDD Power Supply. 3 4 SW Switch Driver. Connect this pin to the emitter of the power NPN transistor or source of the power MOSFET. 4 2 G 3 NC Feedback Pin. Connect to a resistor divider network from the auxiliary winding. Ground. No Connection. Note: SIP-4 package is not recommended for new design. Innovative PowerTM -2- www.active-semi.com ACT355A Rev2, 13-Aug-08 ABSOLUTE MAXIMUM RATINGSc PARAMETER VALUE UNIT -0.3 to +23.5 V 20 mA FB to G -0.3 to +6 V SW to G -0.3 to +23.5 V Internally limited A VDD to G Maximum Continuous VDD Current Continuous SW Current Maximum Power Dissipation Junction to Ambient Thermal Resistance (θJA) SIP-4 (derate 5mW/˚C above TA = 50˚C) 0.5 SOT23-5 (derate 5.3mW/˚C above TA = 50˚C) 0.53 SIP-4 200 SOT23-5 190 W ˚C/W Operating Junction Temperature -40 to 150 ˚C Storage Temperature -55 to 150 ˚C 300 ˚C Lead Temperature (Soldering, 10 sec) c: Do not exceed these limits to prevent damage to the device. Exposure to absolute maximum rating conditions for long periods may affect device reliability. ELECTRICAL CHARACTERISTICS (VDD = 15V, VOUT = 5V, LP = 2mH, NP = 130, NS = 10, NA = 32, TA = 25°C, unless otherwise specified.) PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNIT VDD Turn-On Voltage VDDON VDD Rising 16.4 19.4 22.0 V VDD Turn-Off Voltage VDDOFF VDD Falling 7 7.5 8 V VDD OVP Trigger Voltage VDDOVP 19.0 20.5 22.5 V 0.8 1.5 mA 30 55 µA 58 kHz 3.520 V Supply Current Start Up Supply Current IDD IDDST VDD = 15V, before turn-on Clamp Switching Frequency Effective FB Feedback Voltage 45 VFB Output Cord Resistance Compensation FB in Regulation 3.415 Maximum Output Power Primary Current Limit ILIM Maximum Duty Cycle DMAX ISW = 10mA Switch On-Resistance RON +3.7 % 320 mA 86 92 % ISW = 50mA 3.5 5 Ω SW Rise Time 1nF load, 15Ω pull-up 30 ns SW Fall Time 1nF load, 15Ω pull-up 20 ns SW Off Leakage Current Switch in off-state, VSW = 22V 1 Over-Temperature Threshold 80 3.467 160 10 µA ˚C ACT355A Rev2, 13-Aug-08 FUNCTIONAL BLOCK DIAGRAM SW VDD REGULATOR & UVLO FB 3.45V - + SIGNAL FILTER DIFFERENTIAL PREAMP REFERENCE CURRENT MODE PWM COMPARATOR + - - ERROR AMPLIFIER DC CORD COMP CURRENT SHAPING + PFWM CONTROL + OSCILLATOR & RAMP G FUNCTIONAL DESCRIPTION Constant Voltage (CV) Mode As shown in the Functional Block Diagram, the ACT355A feedback regulation is done via several circuit blocks to pre-amplify the FB pin error voltage relative to an internal reference, filter out the switching transients, and integrate the resulting useful differential error voltage for current mode PFWM (Pulse Frequency and Width Modulation) control. In constant voltage operation, the IC captures the auxiliary flyback signal at FB pin through a resistor divider network R5 and R6 in the simplified application circuit. The FB pin is pre-amplified against the reference voltage, and the secondary side output voltage error is extracted based on Active-Semi's proprietary filter architecture. This error signal is then integrated by the Error Amplifier . SW is a driver output that drives the emitter of an external high voltage NPN transistor or N-channel MOSFET. This emitter-drive method takes advantage of the high VCBO of the transistor, allowing a low cost transistor such as ‘13003 (VCBO = 700V) or ‘13002 (VCBO = 600V) to be used for a wide AC input range. Startup Mode VDD is the power supply terminal for the IC. During startup, the IC typically draws 30µA supply current. The bleed resistor from the rectified high voltage DC rail supplies current to VDD until it exceeds the VDDON threshold of 19.4V. At this point, the IC enters normal operation when switching begins and the output voltage begins to rise. The VDD bypass capacitor must supply the IC and the NPN base drive until the output voltage builds up enough to provide power from the auxiliary winding to sustain the VDD. The VDDOFF threshold is 7.5V, and therefore, the voltage on the VDD capacitor must not drop more than 10V while the output is charging up. TM When the secondary output voltage is above regulation, the Error Amplifier output voltage decreases to reduce the switch current. When the secondary side is below regulation, the Error Amplifier output voltage increases to ramp up the switch current to bring the secondary output back to regulation. The output regulation voltage is determined by the following relationship: R 5 ⎞⎛ N S ⎛ VOUTCV = 3 .45 V × ⎜1 + ⎟⎜ R 6 ⎠⎜⎝ N A ⎝ ⎞ ⎟⎟ − V F ⎠ (1) where R5 and R6 are top and bottom feedback resistor, NS and NA are numbers of transformer secondary and auxiliary turns, and VF is the rectifier diode forward drop voltage at approximately 0.1A bias. The ACT355A includes internal feedback loop compensation to simplify application circuit design. ACT355A Rev2, 13-Aug-08 Constant Current (CC) Mode Loop Compensation When the secondary output current reaches a level set by the internal current limiting circuit, the IC enters current limit condition and causes the secondary output voltage to drop. As the output voltage decreases, so does the flyback voltage in a proportional manner. An Internal current shaping circuitry adjusts the switching frequency based on the flyback voltage so that the transferred power remains proportional to the output voltage, resulting in a constant secondary side output current profile. The energy transferred to the output during each switching cycle is ½(LP × ILIM2) × η, where LP is the transformer primary inductance, ILIM is the primary peak current, and η is the conversion efficiency. From this formula, the constant output current can be derived: The ACT355A integrates loop compensation circuitry for simplified application design, optimized transient response, and minimal external components. IOUTCC 1 2 ⎛ η × fSW = LP × ILIM ⎜⎜ 2 ⎝ VOUTCV ⎞ ⎟⎟ ⎠ (2) where fSW is the nominal switching frequency and VOUTCV is the nominal secondary output voltage. The constant current operation typically extends down to lower than 40% of output voltage regulation. Light Load Mode When the secondary side output load current decreases to an internally set light load level, the IC's switching frequency is also reduced to save power. This enables the application to meet all current green energy standards. The actual minimum switching frequency is programmable with a small dummy load (while still meeting standby power). Short Circuit Mode When the secondary side output is short circuited, the ACT355A enters hiccup mode operation. In this condition, the auxiliary supply voltage collapses and the VDD voltage drops below the VDDOFF threshold. This turns off the IC and causes it to restart. This hiccup behavior continues until the short circuit is removed. Output Over Voltage Protection The ACT355A includes output over-voltage protection circuitry, which shuts down the IC when the output voltage is 40% above the normal regulation voltage or when no feedback signal is detected for 8 consecutive switching cycles. The IC enters hiccup mode when an output over voltage fault is detected. Primary Inductance Compensation The ACT355A includes built-in primary inductance compensation to maintain constant current regulation despite variations in transformer manufacturing. Peak Inductor Current Limit Compensation The ACT355A includes peak inductor current limit compensation to achieve constant input power over wide line and wide load range. Output Cord Resistance Compensation The ACT355A provides automatic output cord resistance compensation during constant voltage regulation, monotonically adding an output voltage correction up to a typical correction of 3.2% at full power. This feature allows for better output voltage accuracy by compensating for the output voltage droop due to the output cord resistance. ACT355A Rev2, 13-Aug-08 is driven at its emitter. Thus, the ACT355A+’13002 or ‘13003 combination meets the necessary breakdown safety requirement. Table 1 lists the breakdown voltage of some transistors appropriate for use with the ACT355A. APPLICATIONS INFORMATION Figure 2: NPN Transistor Reverse Bias Safe Operation Area The power dissipated in the NPN transistor is equal to the collector current times the collector-emitter voltage. As a result, the transistor must always be in saturation when turned on to prevent excessive power dissipation. Select an NPN transistor with sufficiently high current gain (hFEMIN > 8) and a base drive resistor low enough to ensure that the transistor easily saturates. IC Base-Drive Safe Region (RCC) Emitter-Drive Safe Region VCEO VCBO Table 1: VC Recommended NPN Transistor External Power Transistor The ACT355A allows a low-cost high voltage power NPN transistor such as ‘13003 or ‘13002 to be used safely in flyback configuration. The required collector voltage rating for VAC = 265V with full output load is at least 600V to 700V. As seen from Figure 2, NPN Reverse Bias Safe Operation Area, the breakdown voltage of an NPN is significantly improved when it DEVICE VCBO VCEO MJE13002 IC hFEMIN PACKAGE 600V 300V 1.5A 25 TO-126 MJE13003, 700V KSE13003 400V 1.5A 25 TO-126 STX13003 400V 25 TO-92 700V 1A Figure 3: Typical Application Circuit R12 L FR1 L1 C6 T1 VO D4 D1 R7 VIN = 85 to 265VAC R8 D3 D2 + C1 + GND C1, C2 4.7µF/400V Q1 '13002S, TO-92 C3 4.7nF/1kV L1 1.5mH D7 C4 4.7µF/25V FR1 10Ω R9 C5 680µF/10V R2, R7, R8 750kΩ C6 1nF/50V R3, R10 100Ω C7 470pF/50V R4 33Ω C8 680pF/50V R5 See Table 2 D1-D4 1N4007 R6 See Table 2 D5 FR107 R9 390Ω D6 HER103 R11 1kΩ D7 1N4148 R12 10Ω D8 SB240 T1 See Table 2 Q1 C8 R10 VDD FB SW ACT355A R6 + C4 C5 R11 D6 N R5 + D5 R3 R4 C2 D8 C3 R2 G C7 ACT355A Rev2, 13-Aug-08 Design Procedure Figure 3, Typical Application Circuit, shows a complete, optimized constant voltage/constant current charger application. The application design procedure for using the ACT355A is simple. Three components determine the output constant voltage and constant current settings: the transformer T1 and resistors R5 and R6. Refer to Table 2 for selection values for these three key components for different typical design cases. The Typical Application Circuit in Figure 3 lists component values of other devices in the a complete charger application. Design Notes 1) Feedback resistors R5 and R6 must meet the ±1% maximum tolerance to have good V0 regulation. 2) The value of the feedback resistor can be chosen slightly different from the table according to the actual system efficiencies in different systems. 3) C8 must be added to guarantee good CC accuracy. Table 2: Component Selection Table OUTPUT TRANSFORMER RESISTOR NETWORK VO (V) IO (mA) ActivePSRTM PART NUMBER 1 5.0 500 ACT355A 130 32 10 1.6 26.7 6.98 2 5.0 600 ACT355A 130 32 10 1.8 31.6 8.25 3 5.0 650 ACT355A 130 32 10 1.9 34.4 9.09 DESIGN CASE NP NA NS LP±7% (mH) R5±1% (kΩ) R6±1% (kΩ) ACT355A Rev2, 13-Aug-08 PACKAGE OUTLINE SIP-4 PACKAGE OUTLINE AND DIMENSIONS (AMMO TAPE PACKING) SYMBOL C A A1 A2 ? θ D E D1 H2 H1 b1 H3 b e1 e -8- DIMENSIONS IN INCHES MIN MAX MIN MAX A 1.400 1.800 0.055 0.071 A1 0.700 0.900 0.028 0.035 A2 0.500 0.700 0.020 0.028 b 0.360 0.500 0.014 0.020 b1 0.380 0.550 0.015 0.022 C 0.360 0.510 0.014 0.020 D 4.980 5.280 0.196 0.208 D1 3.780 4.080 0.149 0.161 E 3.450 3.750 0.136 0.148 e 2.200 2.800 0.086 0.110 e1 6.600 8.400 0.259 0.330 H1 1.350 1.650 0.053 0.065 H2 3.370 3.670 0.133 0.144 H3 10.83 11.13 0.426 0.438 θ Innovative PowerTM DIMENSIONS IN MILLIMETERS 45°TYP 45°TYP www.active-semi.com ACT355A Rev2, 13-Aug-08 PACKAGE OUTLINE SOT23-5 PACKAGE OUTLINE AND DIMENSIONS θ ? b L1 0.2 L E E1 D c e A A1 A2 e1 SYMBOL DIMENSION IN MILLIMETERS DIMENSION IN INCHES MIN MAX MIN MAX A 1.050 1.250 0.041 0.049 A1 0.000 0.100 0.000 0.004 A2 1.050 1.150 0.041 0.045 b 0.300 0.500 0.012 0.020 c 0.100 0.200 0.004 0.008 D 2.820 3.020 0.111 0.119 E 1.500 1.700 0.059 0.067 E1 2.650 2.950 0.104 0.116 e e1 L 0.950 TYP 1.800 2.000 0.700 REF 0.037 TYP 0.071 0.079 0.028 REF L1 0.300 0.600 0.012 0.024 θ 0° 8° 0° 8° Active-Semi, Inc. reserves the right to modify the circuitry or specifications without notice. Users should evaluate each product to make sure that it is suitable for their applications. Active-Semi products are not intended or authorized for use as critical components in life-support devices or systems. Active-Semi, Inc. does not assume any liability arising out of the use of any product or circuit described in this datasheet, nor does it convey any patent license. Active-Semi and its logo are trademarks of Active-Semi, Inc. For more information on this and other products, contact [email protected] or visit http://www.active-semi.com. For other inquiries, please send to: 1270 Oakmead Parkway, Suite 310, Sunnyvale, California 94085-4044, USA