CR6853 Novel Low Cost Green-Power PWM Controller Mobile:13554992568 Feature Low Cost, PWM&PFM&CRM (Cycle Reset Mode) Low Start-up Current (about 3µA) Low Operating Current (about 1.2mA) Current Mode Operation Under Voltage Lockout (UVLO) Built-in Synchronized Slope Compensation Built-in Low EMI Technique Programmable PWM Frequency Audio Noise Free Operation Leading edge Blanking on Sense input Constant output power limiting for universal AC input Range SOT-23-6L 、SOP8 and DIP-8 Pb-Free Packaging Good Protection Coverage With Auto Self-Recovery Compatible with SG6848 (6849) / SG5701/SG5848/LD7535 (7550) / OB2262 (2263)/OB2278（ （2279） ） Complete Protection with Soft Clamped GATE output voltage 18.0V VDD over voltage protect 34.0V Cycle-by-cycle current limiting Output SCP (Short circuit Protection) Output OLP (Over Load Protection) High-Voltage CMOS Process with ESD Standby Power Supplies Set-Top Box Power Supplies 384X Replacement Applications Switching AC/DC Adaptor Battery Charger Open Frame Switching Power Supply General Description The CR6853 is a highly integrated low cost current mode PWM controller, which is ideal for small power current mode of offline AC-DC fly-back converter applications. Making use of external resistors, the IC changes the operating frequency and automatically enters the PFM/CRM (Cycle Reset Mode) under light-load/zero-load conditions. This can minimize standby power consumption and achieve powersaving functions. With a very low start-up current, the CR6853 could use a large value start-up resistor (2MΩ). Built-in synchronized slope compensation enhances the stability of the system and avoids sub-harmonic oscillation. Dynamic peak current limiting circuit minimizes output power change caused by delay time of the system over a universal AC input range. Leading edge blanking circuit on current Oct, 2008 V2.0 Chengdu Chip-Rail Tech. Co., Ltd. sense input could remove the signal glitch due to snubber circuit diode reverse recovery and thus greatly reduces the external component count and system cost in the design. Cycle-by-Cycle current limiting ensures safe operation even during short-circuit. Excellent EMI performance is achieved built-in soft driver and low EMI technique. The CR6853 offers perfect protection like OVP(Over Voltage Protection)、OLP(Over Load Protection) 、 SCP(Short circuit protection)、OTP、Sense Fault Protection and OCP(Over current protection). The CR6853’s output driver is soft clamped to maximum 18.0V to protect the power MOSFET. CR6853 is offered in SOT-23-6L, SOT-8 and DIP-8 packages. 1/12 http://www.chiprail.com CR6853 Pin Assignment Pin Descriptions Name GND FB Description GND Pin Voltage feedback pin. Output current of this pin could controls the PWM duty cycle、OLP and SCP. RI SEN VDD GATE This pin is to program the switching frequency. By connecting a resistor to ground to set the switching frequency. Current sense pin, a resistor connects to sense the MOSFET current. Supply voltage pin. Totem output to drive the external power MOSFET. TYPICAL APPLICATION Oct, 2008 V2.0 Chengdu Chip-Rail Tech. Co., Ltd. 2/12 http://www.chiprail.com CR6853 Block Diagram Simplified Internal Circuit Architecture Absolute Maximum Ratings Symbol VDD IOVP VFB VSEN PD TL TSTG Parameter Supply voltage Pin Voltage VDD OVP maximal enter current Input Voltage to FB Pin Input Voltage to SEN Pin Power Dissipation ESD Capability, HBM Model ESD Capability, Machine Model SOT-23-6L (20S) Lead Temperature DIP-8 (10S) (Soldering) SOP-8 (10S) Storage Temperature Range Rating 40 20 -0.3 to 6V -0.3 to 6V 300 2500 250 220 260 230 -55 to + 150 Unit V mA V V mW V V ℃ ℃ ℃ ℃ RECOMMENDED OPERATION CONDITION Symbol VDD RI TOA Parameter VDD Supply Voltage RI PIN Resistor Value Operation Ambient Temperature Min ~ Max 10~30 100 -20~85 Unit V K ohm POMAX FPWM Maximal Output Power Frequency of PWM 0~80 30~150 W kHz Oct, 2008 V2.0 Chengdu Chip-Rail Tech. Co., Ltd. ℃ 3/12 http://www.chiprail.com CR6853 Electrical Characteristics (Ta=25°C unless otherwise noted, VDD = 16V) Symbol Parameter Conditions Min. Typ. Max. Unit 3.0 20.0 µA Supply Voltage (VDD Pin) IST ISS Startup Current Operating Current VFB=0V 3.0 mA VFB=3V 1.2 mA VFB=Open 0.8 mA VDDON Turn-on Threshold Voltage 13.0 14.0 15.0 V VDDOFF Turn-off Threshold Voltage 7.8 8.8 9.8 V VDDCLAMP VDD Clamp Voltage IVDD=10mA 34.0 V 9.4 V Anti Intermission Surge VDDAIS VDD Voltage Voltage Feedback (FB Pin) IFB Short Circuit Current VFB=0V 0.7 mA VFB Open Loop Voltage VFB=Open 4.8 V Zero Duty Cycle FB current 0.59 mA IPFM Enter PFM FB current 0.50 mA ICRM Enter CRM FB current 0.55 mA VPFM Enter PFM Threshold VFB 1.80 V VCRM Enter CRM Threshold VFB 1.40 V IOLP&SCP Enter OLP&SCP FB current 170 uA VOLP&SCP Enter OLP&SCP FB voltage 3.7 V TOLP&SCP OLP&SCP min. delay Time IFB_0D RI=100K 33 35 50 mS Current Sensing (SEN Pin) SEN Maximum Voltage Level RI=100K, （Dmin=0%） FB=3.3V SEN Maximum Voltage RI=100K, Level(Dmax=78%) FB=3.3V TPD Delay to Output FB=3.3V RCS Input Impedance VTH_L VTH_H 0.80 V 1.05 V 75 ns 40 KΩ 300 nS Leading edge blanking time TLEB Oct, 2008 RI=100K ( LEB ) V2.0 Chengdu Chip-Rail Tech. Co., Ltd. 4/12 http://www.chiprail.com CR6853 Oscillator (RI Pin) FOSC Normal Frequency RI=100Kohm FPFM PFM Frequency RI=100Kohm 22 KHZ DCMAX_W Maximum Duty Cycle PWM RI=100Kohm 78 % DCMAX_F Maximum Duty Cycle PFM RI=100Kohm 78 % ΔFTEMP Frequency Temp. Stability -30-100℃ 5 % 300 nS TBLANK Leading-Edge Blanking Time FJITTER Frequency jitter RI=100Kohm 60 65 -4 70 KHz 4 % 0.8 V GATE Drive Output (GATE Pin) Output Low Level VOL VDD=16V, IO=20mA Output High Level VOH VDD=16V, 10 V IO=20mA TR1 Rising Time CL=500pF 123 ns TF1 Falling Time CL=500pF 71 ns TR2 Rising Time CL=1000pF 248 ns TF2 Falling Time CL=1000pF 116 ns TR3 Rising Time CL=1500pF 343 ns TF3 Falling Time CL=1500pF 153 ns TR4 Rising Time CL=2000pF 508 ns TF4 Falling Time CL=2000pF 209 ns Output Clamp Voltage VDD=20V 18.0 V 65 KHz VGCLAMP Low EMI technique fEMI Low EMI frequency RI=100Kohm Frequency modulation range RI=100Kohm ∆f_osc -3 3 % /Base frequency Oct, 2008 V2.0 Chengdu Chip-Rail Tech. Co., Ltd. 5/12 http://www.chiprail.com CR6853 OPERATION DESCRIPTION Current Mode Compared to voltage mode control, current mode control has a current feedback loop. When the voltage of the Sense resistor peak current of the primary winding reaches the internal setting value VTH, the register resets and the power MOSFET cuts off. So, to detect and modulate the peak current cycle-by-cycle could control the output of the power supply. The current feedback has a good linear modulation rate and a fast input and output dynamic impact, and avoid the pole that the output filter inductance brings and the two-class system descends to the one-class. So it widens the frequency range and optimizes overload protection and short circuit protection. Startup Current and Under Voltage Lockout The startup current of CR6853 is set to be very low so that a large value startup resistor can be used to minimize the power loss. For AC to DC adaptor with universal input range design, a 2 MΩ, 1/8 W startup resistor and a 10uF/25V VDD hold capacitor could be used. The turn-on and turn-off threshold of the CR6853 is designed to 14V/8.8V. During startup, the hold-up capacitor must be charge to 14.0V through the startup resistor. The hysteresis is implemented to prevent the shutdown from the voltage dip during startup. generate a 20uA constant current and a 65kHz PWM switching frequency. The suggested operating frequency range of CR6853 is within 50KHz to 150KHz. Green Power Operation The power dissipation of switching mode power supply is very important in zero load or light load condition. The major dissipation results from conduction loss、 switching loss and consume of the control circuit. However, all of them relates to the switching frequency. There are many difference topologies has been implemented in different chip. The basic operation theory of all these approaches intends to reduce the switching frequency under light-load or no-load condition. The CR6853`s green power function adapts PWM、PFM and CRM combining modulation. When RI resistor is 100kΩ, the PWM frequency is 65kHz in medium or heavy load operation. Through modifying the pulse width, The CR6853 could control output voltage. The current of FB pin increases when the load is in light condition and the internal mode controller enters PFM&PWM when the feedback current is over 0.5mA. The operation frequency of oscillator is to descend gradually. When the feedback current is over 0.55mA, the frequency of oscillator is invariable, namely 22kHz. Internal Bias and OSC Operation A resistor connected between RI pin and GND pin sets the internal constant current source to charge or discharge the internal fixed capacitor. The charge time and discharge time determines the internal clock speed and the switching frequency. Increasing the resistance will reduce the value of the input current and reduce the switching frequency. The relationship between RI and PWM switching frequency follows the below equation within the RI allowed range. FOSC = 6500 (kHz ) RI ( KΩ) For example, a 100kΩ resistor RI could Oct, 2008 V2.0 Chengdu Chip-Rail Tech. Co., Ltd. CR6853 Green-Power Function To decrease the standby consumption of the power supply, Chip-Rail introduces the Cycle Reset Mode technology (CRM). If the feedback current is over 0.59mA, mode controller of the CR6853 would reset internal register all the time and cut off the GATE pin. While the output voltage is lower than the set value, the register would be set, 6/12 http://www.chiprail.com CR6853 the GATE pin operate again. So the frequency of the internal OSC is invariable, the register would reset some pulses so that the practical frequency is decreased at the GATE pin. Internal Synchronized Slop Compensation Although there are more advantages of the current mode control than conventional voltage mode control, there are still several drawbacks of peak-sensing current-mode converter, especially the open loop instability when it operates in higher than 50% of the duty-cycle. To solve this problem, the CR6853 is introduced an internal slope compensation adding voltage ramp to the current sense input voltage for PWM generation. It improves the close loop stability greatly at CCM, prevents the sub-harmonic oscillation and thus reduces the output ripple voltage. VSLOP = 0.33 × DUTY = 0.4389 × DUTY DUTYMAX value ( ∆I = VIN × TD ) due to the system LP delay time that is from detecting the current through the Sense pin to power MOSFET off in the CR6853 (Among these, VIN is the primary winding voltage of the transformer and LP is the primary wind inductance). VIN ranges from 85VAC to 264VAC. To guarantee the output power is a constant for universal input AC voltage, there is a dynamic peak limit circuit to compensate the system delay T that the system delay brings on. Vsense 1.10 1.05 1.00 0.95 0.90 0.85 0.80 0.75 0.70 Duty Cycle 0.65 0% 10%20%30%40%50%60%70%80%90% OLP&SCP Slop Compensation Current Sensing & Dynamic peak limiting The current flowing by the power MOSFET comes into being a voltage VSENSE on the Sense pin cycle-by-cycle, which compares to the internal reference voltage, and controls the reverse of the internal register, limits the peak current IMAX of the primary of the transformer. The transformer energy is E = To protect the circuit from being damaged under the over load or short circuit condition, a smart OLP&SCP function is implemented in the CR6853. When short circuit or over load occurs in the output end, the feedback cycle would enhance the voltage of FB pin, while the voltage is over 3.7V or the current from FB is below 170uA, the internal detective circuit would send a signal to shut down the GATE and pull down the VDD voltage, then the circuit is restart. To avoid the wrong operation when circuit starts, the delay time is set. When the RI resistance is 100Kohm, the delay time TOLP&SCP is between 33mS and 50mS. The relationship between RI and TOLP&SCP follows the below equation. RI × 2 RI × 3 (mS ) < TOLP & SCP < (mS ) 3 6 × 10 6 × 10 3 1 2 × L × I MAX . So adjusting 2 the RSENSE can set the maximal output power of the power supple. The current flowing by the power MOSFET has an extra Oct, 2008 V2.0 Chengdu Chip-Rail Tech. Co., Ltd. 7/12 http://www.chiprail.com CR6853 Anti Intermission Surge When the power supplies change the heavy load to light load immediately, there could be tow phenomena caused by system delay. They are output voltage overshot and intermission surge. To avoid it, the anti intermission surge is built in the CR6853. If it occurs, the FB current is to increase rapidly, the GATE would be cut off for a while, VDD pin voltage descends gradually. When VDD reaches 9.4V, the GATE pin would operate again, which the frequency is 22KHz. Leading-edge Blanking (LEB) Each time the power MOSFET is switched on, a turn-on spike will inevitably occur at the Sense pin, which would disturb the internal signal from the sampling of the RSENSE. There is a 300nS leading edge blanking time built in to avoid the effect of the turn-on spike, and the power MOSFET cannot be switched off during the moment. So that the conventional external RC filtering on sense input is no longer required. circuit in the CR6853 to improve the credibility and extend the life of the chip. When the VDD voltage is over 34V, the GATE pin is to shutdown immediately and the VDD voltage is to descend rapidly. GATE Driver & Soft Clamped The CR6853’ output designs a totem pole to drive a periphery power MOSFET. The dead time is introduced to minimize the transfixion current during the output operating. The novel soft clamp technology is introduced to protect the periphery power MOSFET from breaking down and current saturation of the Zener. Low EMI technique The frequency low EMI technique is introduced in the CR6853. As following figure, the internal oscillation frequency is modulated by itself. A whole surge cycle includes 128 pulses and the jittering ranges from -4% to +4%. Thus, the function could minimize the electromagnetic interferer from the power supply module. Frequency(HZ) 70K 65K 60K Over Voltage Protection (OVP) Time Frequency low EMI There is a 34V over-voltage protection Oct, 2008 V2.0 Chengdu Chip-Rail Tech. Co., Ltd. 8/12 http://www.chiprail.com CR6853 CHARACTERIZATION PLOTS VDD=16V,RI=100Kohm,TA=25℃ condition applies if not otherwise noted. Oct, 2008 V2.0 Chengdu Chip-Rail Tech. Co., Ltd. 9/12 http://www.chiprail.com CR6853 PACKAGE DEMENSIONS DIP-8L Dimensions Symbol Millimeters Min. Typ. A Max. Min. Typ. 5.334 A1 0.381 A2 3.175 0.210 3.302 3.429 0.125 0.130 b 1.524 0.060 0.457 0.018 9.017 9.271 6.223 6.350 E E1 10.160 0.355 6.477 0.245 7.620 e Max. 0.015 b1 D Oct, 2008 Inches 0.365 0.135 0.400 0.300 2.540 0.250 0.255 0.100 L 2.921 3.302 3.810 0.115 0.130 0.150 eB 8.509 9.017 9.525 0.335 0.355 0.375 θ˚ 0˚ 7˚ 15˚ 0˚ 7˚ 15˚ V2.0 Chengdu Chip-Rail Tech. Co., Ltd. 10/12 http://www.chiprail.com CR6853 SOT-23-6L Symbol Oct, 2008 Dimensions In Millimeters Dimensions In Inches Min Max Min Max A 0.700 1.000 0.028 0.039 A1 0.000 0.100 0.000 0.004 B 1.397 1.803 0.055 0.071 b 0.300 0.559 0.012 0.022 C 2.591 3.000 0.102 0.118 D 2.692 3.099 0.106 0.122 e 0.838 1.041 0.033 0.041 H 0.080 0.254 0.003 0.010 L 0.300 0.610 0.012 0.024 V2.0 Chengdu Chip-Rail Tech. Co., Ltd. 11/12 http://www.chiprail.com CR6853 SOP-8L Dimensions DISCLAIMERS Symbol Min. A 1.346 A1 0.101 Millimeter Typ. b 0.053 0.254 0.004 E 3.810 e 1.016 1.270 0.381X45 ° Max. 0.069 0.010 0.016 0.203 4.648 F Oct, 2008 Min. 1.752 0.406 c D Max. Inch Typ. 0.008 4.978 0.183 3.987 0.150 1.524 0.040 0.196 0.157 0.050 0.015X45 ° 0.060 H 5.791 6.197 0.228 0.244 L 0.406 1.270 0.016 0.050 θ˚ 0° 8° 0° 8° V2.0 Chengdu Chip-Rail Tech. Co., Ltd. 12/12 http://www.chiprail.com