Page No. : 1/11 RS2051 Green-Mode PWM Controller with Frequency Jiggling for Low EMI Description The RS2051 is a highly integrated low cost current mode PWM controller, which is ideal for small power current mode of offline AC-DC fly-back converter applications. Making use of external resistors, the IC changes the operating frequency and automatically enters the PFM/CRM (Cycle Reset Mode) under light-load/zero-load conditions. This can minimize standby power consumption and achieve power-saving functions. With a very low start-up current, the RS2051 could use a large value start-up resistor (2Mohms). Built-in synchronized slope compensation enhances the stability of the system and avoids sub-harmonic oscillation. Dynamic peak current limiting circuit minimizes output power change caused by delay time of the system over a universal AC input range. Leading edge blanking circuit on current sense input could remove the signal glitch due to snubber circuit diode reverse recovery and thus greatly reduces the external component count and system cost in the design. Cycle-byCycle current limiting ensures safe operation even during short-circuit. Excellent EMI performance is achieved built-in soft start with 1.2ms、soft driver and low EMI Technique. The RS2051 offers perfect protection like OVP(Over Voltage Protection)、OLP(Over Load Protection)、SCP(Short circuit protection)、Sense Fault Protection, LM (Latch Mode) and OCP(Over current protection). The RS2051’s output driver is soft clamped to maximum 18V to protect the power MOSFET. RS2051 is offered in SOT-23-6, SOP-8 and DIP-8 packages. Features Low Cost, PWM, PFM&CRM (Cycle Reset Mode) Low Start-up Current (about 3μA) Low Operating Current (about 1.2mA) Current Mode Operation Under Voltage Lockout (UVLO) Built-in Synchronized Slope Compensation Built-in fixed soft start with 1.2ms Built-in Frequency Jiggling for better EMI Signature Programmable PWM Frequency Audio Noise Free Operation Leading edge Blanking on Sense input Constant output power limiting for universal AC input Range SOT-26、SOP-8 and DIP-8 Pb-Free Packaging Soft Clamped GATE output voltage 18V VDD over voltage protect 34V Cycle-by-cycle current limiting Sense Fault Protect ion Output SCP (Short circuit Protection) Output OLP (Over Load Protection) Latch mode After OLP&SCP High-Voltage CMOS Process with ESD Applications Switching AC/DC Adaptor Battery Charger Open Frame Switching Power Supply Standby Power Supplies Set-Top Box Power Supplies Pin Configurations Name GND FB RI SEN VDD GATE Description GND Pin Voltage feedback pin. Output current of this pin could controls the PWM duty cycle、OLP and SCP. This pin is to program the switching frequency. By connecting a resistor to ground to set the switching frequency Current sense pin, connect to sense the MOSFET current Supply voltage pin Totem output to drive the external Power MOSFET. DS-RS2051-09 No v, 2010 www.Orister.com Page No. : 2/11 Typical Application Circuit Block Diagram DS-RS2051-09 No v, 2010 www.Orister.com Page No. : 3/11 Absolute Maximum Ratings Symbol VDD IOVP VFB VSEN PD Parameter Supply voltage Pin Voltage VDD OVP maximal enter current Input Voltage to FB Pin Input Voltage to SEN Pin Power Dissipation ESD Capability, HBM Model ESD Capability, Machine Model ESD 20second: SOT-23-6L 10second: DIP-8L 10second: SOP-8L Lead Temperature (Soldering) TL TSTG Rating 40 20 -0.3 to 6V -0.3 to 6V 300 2500 250 Unit V mA V V mW V V 220 260 o C o C o C 230 Storage Temperature Range -55 to + 150 Recommended Operation Condition Symbol VDD RI TOA PO FPWM Parameter VDD Supply Voltage RI PIN Resistor Value Operation Ambient Temperature Output Power Frequency of PWM Min ~ Max 10~30 100 -20~85 60 30~150 Unit V K ohm o C W KHz Electrical Characteristics (Ta=25°C unless otherwise noted, VDD = 15V.) Symbol Parameter IST Startup Current ISS Operating Current VDDON VDDOFF VDDCLAMP VDDAIS IFB VFB IFB_0D IPFM ICRM VPFM VCRM IOLP&SCP VOLP&SCP TOLP&SCP Conditions Supply Voltage (VDD Pin) Min. VFB=0V VFB=3V VFB=Open Turn-on Threshold Voltage Turn-off Threshold Voltage VDD Clamp Voltage IVDD=20mA Anti Intermission Surge VDD Voltage Voltage Feedback (FB Pin) Short Circuit Current Open Loop Voltage Zero Duty Cycle FB current Enter PFM&PWM, FB current Enter CRM, FB current PFM Threshold VFB Enter CRM Threshold VFB Enter OLP&SCP FB current Enter OLP&SCP FB voltage OLP&SCP min. delay Time 13.0 7.8 VFB=0V VFB=Open RI=100K 33 Typ. Max. Unit 3.0 3.0 1.2 0.8 14.0 8.8 34.0 20.0 μA mA mA mA V V V 15.0 9.8 9.4 V 0.7 4.8 0.59 0.50 0.55 1.80 1.40 170 3.7 35 mA V mA mA mA V V uA V ms 50 Current Sensing (SEN Pin) VTH_L VTH_H TPD RCS TLEB Minimum Voltage Lever (Dmin=0%) Maximum Voltage Lever (Dmax=78%) Delay to Output Input Impedance Leading edge blanking time DS-RS2051-09 No v, 2010 0.80 V 1.05 V 75 40 300 ns KΩ ns www.Orister.com Page No. : 4/11 Oscillator (RI Pin) FOSC FPFM DCMAX_W DCMAX_F ΔFTEMP TBLANK FPFM Normal Frequency PFM Frequency Maximum Duty Cycle PWM Maximum Duty Cycle PFM Frequency Temp. Stability Leading-Edge Blanking Time Frequency PFM VOL VOH TR1 TF1 TR2 TF2 TR3 TF3 TR4 TF4 VGCLAMP Output Low Level Output High Level Rising Time Falling Time Rising Time Falling Time Rising Time Falling Time Rising Time Falling Time Output Clamp Voltage RI=100Kohm RI=100Kohm RI=100Kohm RI=100Kohm -30~100℃ 60 RI=100Kohm -4 65 22 78 78 5 300 70 4 KHz KHZ % % % nS % GATE Drive Output (GATE Pin) FJiggling ∆f_osc VDD=16V, IO=20mA VDD=16V, IO=20mA CL=500pF CL=500pF CL=1000pF CL=1000pF CL=1500pF CL=1500pF CL=2000pF CL=2000pF VDD=20V Frequency Jiggling RI=100Kohm RI=100Kohm Frequency modulation range / Base frequency 0.8 10 123 71 248 116 343 153 508 209 18.0 Low EMI frequency 65 -3 3 V V ns ns ns ns ns ns ns ns V KHz % Notice: The drive current of GATE pin is a variable value, which is decided by I = K( V VDD − VGATE − 2.8) 2 (Among these, K is a invariable coefficient，VGATE is the voltage of GATE pin, VVDD is the voltage of VDD pin)；So the higher the VDD voltage is and the lower the output voltage is, the bigger the drive transient current is. When the GATE voltage is 0V and the VDD voltage is 13V, the output drive current would over 120mA. The output driver current would decrease with increasing of the GATE voltage. DS-RS2051-09 No v, 2010 www.Orister.com Page No. : 5/11 OPERATION DESCRIPTION Current Mode Compared to voltage mode control, current mode control has a current feedback loop. When the voltage of the Sense resistor peak current of the primary winding reaches the internal setting value VTH, the register resets and the power MOSFET cuts off. So, to detect and modulate the peak current cycle-by-cycle could control the output of the power supply. The current feedback has a good linear modulation rate and a fast input and output dynamic impact, and avoid the pole that the output filter inductance brings and the two-class system descends to the one-class. So it widens the frequency range and optimizes overload protection and short circuit protection. Startup Current and Under Voltage Lockout The startup current of RS2051 is set to be very low so that a large value startup resistor can be used to minimize the power loss. For AC to DC adaptor with universal input range design, a 2 mΩ, 1/8 W startup resistor and a 10uF/25V VDD hold capacitor could be used. The turn-on and turn-off threshold of the RS2051 is designed to 14V/8.8V. During startup, the hold-up capacitor must be charge to 14V through the startup resistor. The hysteresis is implemented to prevent the shutdown from the voltage dip during startup. Internal Bias and OSC Operation A resistor connected between RI pin and GND pin sets the internal constant current source to charge or discharge the internal fixed capacitor. The charge time and discharge time determines the internal clock speed and the switching frequency. Increasing the resistance will reduce the value of the input current and reduce the switching frequency. The relationship between RI and PWM switching frequency follows the below equation within the RI allowed range. 6500 (kHz) RI(KΩ ) For example, a 100kΩ resistor RI could generate a 20uA constant current and a 65KHz PWM switching frequency. The suggested operating frequency range of RS2051 is within 50KHz to 150KHz. FOSC = Green Power Operation The power dissipation of switching mode power supply is very important in zero load or light load condition. The major dissipation results from conduction loss、switching loss and consume of the control circuit. However, all of them relates to the switching frequency. There are many difference topologies has been implemented in different chip. The basic operation theory of all these approaches intends to reduce the switching frequency under light-load or no-load condition. The RS2051’s green power function adapts PWM、PFM and CRM combining modulation. When RI resistor is 100kΩ, the PWM frequency is 65KHz in medium or heavy load operation. Through modifying the pulse width, The RS2051 could control output voltage. The current of FB pin increases when the load is in light condition and the internal mode controller enters PFM&PWM when the feedback current is over 1.37mA. The operation frequency of oscillator is to descend gradually. When the feedback current is over 0.5mA, the frequency of oscillator is invariable, namely 22kHz. To decrease the standby consumption of the power supply, Orister introduces the Cycle Reset Mode technology (CRM). If the feedback current is over 0.59mA, mode controller of the RS2051 would reset internal register all the time and cut off the GATE pin. While the output voltage is lower than the set value, the register would be set, the GATE pin operate again. So the frequency of the internal OSC is invariable, the register would reset some pulses so that the practical frequency is decreased at the GATE pin. RS2051 Green-Power Function DS-RS2051-09 No v, 2010 www.Orister.com Page No. : 6/11 Internal Synchronized Slope Compensation Although there are more advantages of the current mode control than conventional voltage mode control, there are still several drawbacks of peak-sensing current-mode converter, especially the open loop instability when it operates in higher than 50% of the duty-cycle. To solve this problem, the RS2051 is introduced an internal slope compensation adding voltage ramp to the current sense input voltage for PWM generation. It improves the close loop stability greatly at CCM, prevents the sub-harmonic oscillation and thus reduces the output ripple voltage. DUTY VSLOP = 0.33 × = 0.4389 × DUTY DUTYMAX Slope Compensation Current Sensing & Dynamic peak limiting The current flowing by the power MOSFET comes into being a voltage VSENSE on the Sense pin cycle-by-cycle, which compares to the internal reference voltage, and controls the reverse of the internal register, limits the peak current IMAX of the primary of 1 × L × IMAX 2 . So adjusting the RSENSE can set the maximal output power of 2 V the power supple. The current flowing by the power MOSFET has an extra value ( ΔI = IN × TD ) due to the system delay time LP the transformer. The transformer energy is E = that is from detecting the current through the Sense pin to power MOSFET off in the RS2051 (Among these, VIN is the primary winding voltage of the transformer and LP is the primary wind inductance). VIN ranges from 85VAC to 264VAC. To guarantee the output power is a constant for universal input AC voltage, there is a dynamic peak limit circuit to compensate the system delay T that the system delay brings on. Vsense 1.10 1.05 1.00 0.95 0.90 0.85 0.80 0.75 0.70 Duty Cycle 0.65 0% 10%20%30%40%50%60%70%80%90% Frequency Jiggling for EMI improvement The Frequency Jiggling Technique is introduced in the RS2051. As following figure, the internal oscillation frequency is modulated by itself. A whole surge cycle includes 128 pulses and the Jiggling ranges from -4% to +4%. Thus, the function could minimize the electromagnetic interferer from the power supply module. Frequency(HZ) 70K 65K 60K Frequency Jiggling for EMI DS-RS2051-09 No v, 2010 Time www.Orister.com Page No. : 7/11 OLP&SCP To protect the circuit from being damaged under the over load or short circuit condition, a smart OLP&SCP function is implemented in the RS2051. When short circuit or over load occurs in the output end, the feedback cycle would enhance the voltage of FB pin, while the voltage is over 3.7V or the current from FB is below 170uA, the internal detective circuit would send a signal to shut down the GATE and pull down the VDD voltage, then the circuit is restart. To avoid the wrong operation when circuit starts, the delay time is set. When the RI resistance is 100Kohm, the delay time TOLP&SCP is between 33ms and 50ms. The relationship between RI and TOLP&SCP follows the below equation. RI × 2 6 × 10 3 (mS) < TOLP& SCP < RI × 3 6 × 10 3 (mS) Anti Intermission Surge When the power supplies change the heavy load to light load immediately, there could be tow phenomena caused by system delay. They are output voltage overshot and intermission surge. To avoid it, the anti intermission surge is built in the RS2051. If it occurs, the FB current is to increase rapidly, the GATE would be cut off for a while, VDD pin voltage descends gradually. When VDD reaches 9.4V, the GATE pin would operate again, which the frequency is 22KHz. Leading-edge Blanking (LEB) Each time the power MOSFET is switched on, a turn-on spike will inevitably occur at the Sense pin, which would disturb the internal signal from the sampling of the RSENSE. There is a 300ns leading edge blanking time built in to avoid the effect of the turn-on spike, and the power MOSFET cannot be switched off during the moment. So that the conventional external RC filtering on sense input is no longer required. Over Voltage Protection (OVP) There is a 25.6V over-voltage protection circuit in the RS2051 to improve the credibility and extend the life of the chip. When the VDD voltage is over 25.6V, the GATE pin is to shutdown immediately and the VDD voltage is to descend rapidly. GATE Driver & Soft Clamped The RS2051 output designs a totem pole to drive a periphery power MOSFET. The dead time is introduced to minimize the transfixion current during the output operating. The novel soft clamp technology is introduced to protect the periphery power MOSFET from breaking down and current saturation of the Zener. DS-RS2051-09 No v, 2010 www.Orister.com Page No. : 8/11 DIP-8 Dimension 8 6 7 5 A 1 2 3 4 Marking: B J P R6 2 0 5 1 F Date Code E C I α1 K G M H D Control Code DIM A B C D E F G H I J K L M α1 Min. 6.29 9.22 3.25 3.17 0.38 2.28 7.49 8.56 0.229 o 94 Max. 6.40 9.32 *1.52 *1.27 *0.99 3.35 3.55 0.53 2.79 7.74 *3.00 8.81 0.381 o 97 *: Typical, Unit: mm L 8-Lead DIP-8 Plastic Package Package Code: P SOP-8 Dimension A 7 8 B G 6 C Pin1 Index 2 3 I 5 Marking: H 4 R6 S 2 0 5 1 J D Part A Part A F Date Code K E M L N O Control Code DIM A B C D E F G H I J K L M N O Min. 4.85 3.85 5.80 1.22 0.37 3.74 1.45 4.80 0.05 0.30 0.19 0.37 0.23 0.08 0.00 Max. 5.10 3.95 6.20 1.32 0.47 3.88 1.65 5.10 0.20 0.70 0.25 0.52 0.28 0.13 0.15 *: Typical, Unit: mm 8-Lead SO-8 Plastic Surface Mounted Package Package Code: S DS-RS2051-09 No v, 2010 www.Orister.com Page No. : 9/11 SOT-23-6 Dimension DIM A A1 B b C D e H L Min. 0.700 0.000 1.397 0.300 2.591 2.692 0.838 0.080 0.300 Max. 1.000 0.100 1.803 0.559 3.000 3.099 1.041 0.254 0.610 Marking: 1 6-Lead SOT-23-6L Plastic Package Package Code: N Ordering Information PART NUMBER RS2051S RS2051P RS2051N DS-RS2051-09 No v, 2010 PACKAGE SOP-8 DIP-8 SOT-23-6 www.Orister.com Page No. : 10/11 Soldering Methods for Orister’s Products 1. Storage environment: Temperature=10oC~35oC Humidity=65%±15% 2. Reflow soldering of surface-mount devices Figure 1: Temperature profile tP Critical Zone TL to TP TP Ramp-up TL tL Temperature Tsmax Tsmin tS Preheat 25 Ramp-down t 25oC to Peak Time Profile Feature Sn-Pb Eutectic Assembly Pb-Free Assembly <3oC/sec <3oC/sec 100oC 150oC 60~120 sec 150oC 200oC 60~180 sec <3oC/sec <3oC/sec Time maintained above: - Temperature (TL) - Time (tL) 183oC 60~150 sec 217oC 60~150 sec Peak Temperature (TP) 240oC +0/-5oC 260oC +0/-5oC Time within 5oC of actual Peak Temperature (tP) 10~30 sec 20~40 sec Ramp-down Rate <6oC/sec <6oC/sec <6 minutes <8 minutes Peak temperature Dipping time Average ramp-up rate (TL to TP) Preheat - Temperature Min (Tsmin) - Temperature Max (Tsmax) - Time (min to max) (ts) Tsmax to TL - Ramp-up Rate Time 25oC to Peak Temperature 3. Flow (wave) soldering (solder dipping) Products Pb devices. Pb-Free devices. DS-RS2051-09 No v, 2010 o o 245 C ±5 C o o 260 C +0/-5 C 5sec ±1sec 5sec ±1sec www.Orister.com Page No. : 11/11 Important Notice: • All rights are reserved. Reproduction in whole or in part is prohibited without the prior written approval of Orister Corporation. • Orister Corporation reserves the right to make changes to its products without notice. • Orister Corporation products are not warranted to be suitable for use in Life-Support Applications, or systems. • Orister Corporation assumes no liability for any consequence of customer product design, infringement of patents, or application assistance. DS-RS2051-09 No v, 2010 www.Orister.com