ETC EUA6027A

芯美电子
EUA6027A
2-W Stereo Audio Power Amplifier
with Selectable Gain and Shutdown
DESCRIPTOIN
FEATURES
The EUA6027A is a stereo audio speaker amplifier in a 20-pin
TSSOP thermally enhanced package. Operating on a single 5V
supply, EUA6027A is capable of delivering 2W of output power
per channel into 3Ω loads with less than 1% THD+N.
Amplifier gain is internally configured and controlled by way of
two terminals (GAIN0 and GAIN1). Gain settings of 6 dB, 10 dB,
15.6 dB, and 21.6 dB (inverting) are provided. Internal gain
control requires few external components.
Other features include an active-low shutdown mode input and
thermal shutdown protection.
z
z
z
z
z
z
z
2W/Ch Output Power Into 3-Ω Load From 5-V
Supply
Internal Gain Control
Fully Differential Input
Depop Circuitry
Thermal Shutdown Protection
TSSOP-20 with Thermal Pad
RoHS Compliant and 100% Lead (Pb)-Free
APPLICATIONS
z
Notebook Computers, PDAs, and Other Portable
Audio Devices
Typical Application
Figure 1.
DS6027A Ver 1.1 June 2008
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EUA6027A
Figure 2. Application Circuit Using Differential Inputs
Note A: A 0.1µF ceramic capacitor should be placed as close as possible to the IC. For filtering lower frequency noise
signals, a larger electrolytic capacitor of 10µF or greater should be placed near the audio power amplifier.
DS6027A Ver 1.1 June 2008
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EUA6027A
Pin Configurations
Package Type
Pin
Configurations
TSSOP-20 (FD)
Pin Description
PIN
BYPASS
GAIN0
GAIN1
GND
LINLIN+
LOUTLOUT+
NC
PVDD
ROUTROUT+
RINRIN+
SHUTDOWN
VDD
PIN
10
2
3
1,11
13,20
5
9
8
4
12
6,15
14
18
17
7
19
16
DS6027A Ver 1.1 June 2008
I/O
I
I
DESCRIPTION
Tap to voltage divider for internal midsupply bias generator
Bit 0 of gain control
Bit 1 of gain control
-
Ground
I
I
O
O
I
O
O
I
I
I
-
Left channel negative differential input
Left channel positive differential input
Left channel negative output
Left channel positive output
No connection
Supply voltage terminal
Right channel negative output
Right channel positive output
Right channel negative differential input
Right channel positive differential input
Places IC in shutdown mode when held low
Supply voltage terminal
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EUA6027A
Ordering Information
Order Number
Package Type
EUA6027AQIR1
TSSOP-20
EUA6027A
Marking
xxxxx
6027A
Operating Temperature Range
-40 °C to 85°C
□ □ □ □
Lead Free Code
1: Lead Free 0: Lead
Packing
R: Tape& Reel
Operating temperature range
I: Industry Standard
Package Type
Q: TSSOP
DS6027A Ver 1.1 June 2008
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EUA6027A
Absolute Maximum Ratings
„
„
„
„
„
„
„
Supply voltage, VDD------------------------------------------------------------------------------------------------ 6V
Input voltage, VI------------------------------------------------------------------------------ –0.3 V to VDD +0.3 V
Operating free-air temperature range, TA--------------------------------------------------------- –40°C to 85° C
Operating junction temperature range, TJ ------------------------------------------------------ - –40°C to 150°C
Storage temperature range, Tstg------------------------------------------------------------------ -- –65°C to 150°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds----------------------------------------- 260°C
Thermal Resistance
θJA (TSSOP) ----------------------------------------------------------------------------------------------- 87.9°C/W
Recommended Operating Conditions
Supply voltage, VDD
High-level input voltage, VIH
SHUTDOWN
Low-level input voltage, VIL
SHUTDOWN
Operating free-air temperature, TA
Min
Max
Unit
4.5
5.5
V
2
V
-40
0.8
V
85
°C
Electrical Characteristics at Specified Free-air Temperature, VDD = 5V, TA = 25°C
(unless otherwise noted)
EUA6027A
Symbol
Parameter
Conditions
VOO
Output offset voltage
(measured differentially)
VI= 0, AV=-2V/V,BTL,no load
PSRR
Power supply rejection ratio
VDD= 4.5 V to 5.5 V
IIH
High-level input current
VDD= 5.5V, VI = VDD
1
µA
IIL
Low-level input current
VDD=5.5V, VI = 0V
1
µA
IDD
Supply current, no load
SHUTDOWN =2V
10
14
mA
IDD(SD)
Supply current, shutdown mode
SHUTDOWN =0.8V
145
300
µA
Min.
Typ. Max.
25
79
Unit
mV
dB
Operating Characteristics, VDD = 5V, TA = 25°C, RL = 8Ω, Gain =-2V/V(unless otherwise noted)
Symbol
Parameter
PO
Output power
THD+N
BOM
Conditions
THD=1%, RL=4Ω,f=1kHz
Total harmonic distortion plus
noise
Maximum output power
bandwidth
KSVR
Supply ripple rejection ratio
SNR
Signal-to-noise ratio
Vn
Noise output voltage
DS6027A Ver 1.1 June 2008
PO=1W, RL=8Ω, f=20Hz to 15kHz
THD=5%, RL=8Ω
f =1kHz, CB=0.47µF
CB=0.47µF,f=20 Hz to 20 kHz,
EUA6027A
Min.
Typ. Max.
Unit
1.95
W
0.045
@1KHz
%
＞15
kHz
-80
dB
103
dB
17
µVRMS
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EUA6027A
Typical Characteristics
Figure 3
Figure 4
Figure 5
Figure 6
Figure 7
Figure 8
DS6027A Ver 1.1 June 2008
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EUA6027A
Figure 9
Figure 10
Figure 11
Figure 12
Figure 13
Figure 14
DS6027A Ver 1.1 June 2008
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EUA6027A
Figure 15
Figure 16
Figure 17
Figure 18
Figure 19
Figure 20
DS6027A Ver 1.1 June 2008
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EUA6027A
Figure 21
Figure 22
Figure 23
Figure 24
Figure 25
DS6027A Ver 1.1 June 2008
Figure 26
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EUA6027A
Figure 27
DS6027A Ver 1.1 June 2008
Figure 28
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EUA6027A
Application Information
Shutdown Modes
The EUA6027A employs a shutdown mode of operation
designed to reduce supply current, IDD, to the absolute
minimum level during periods of nonuse for battery-power
conservation. The SHUTDOWN input terminal should be
held high during normal operation when the amplifier is in
use. Pulling SHUTDOWN low causes the outputs to mute
and the amplifier to enter a low-current state,
IDD=150µA. SHUTDOWN should never be left
unconnected because amplifier operation would be
unpredictable.
The value of
Ci is important to
consider as it directly affects the bass (low frequency)
performance of the circuit. Consider the example where Zi
is 70kΩ and the specification calls for a flat bass response
down to 40Hz. Equation 2 is reconfigured as equation 2.
Ci =
Gain Setting via GAIN0 and GAIN1 Inputs
The gain of the EUA6027A is set by two input terminals,
GAIN0 and GAIN1.
Table 1 .Gain Settings
GAIN0
GAIN1
AV(inv)
Input
Impedance
0
0
1
1
0
1
0
1
6dB
10dB
15.6dB
21.6dB
90kΩ
70kΩ
45kΩ
25kΩ
i
In this example, Ci is 56nF so one would likely choose a
value in the range of 56nF to 1µF. A further consideration
for this capacitor is the leakage path from the input source
through the input network (Ci) and the feedback network to
the load. This leakage current creates a dc offset voltage at
the input to the amplifier that reduces useful headroom,
especially in high gain applications. For this reason, a lowleakage tantalum or ceramic capacitor is the best choice.
When polarized capacitors are used, the positive side of the
capacitor should face the amplifier input in most
applications as the dc level there is held at VDD/2, which is
likely higher than the source dc level. Note that it is
important to confirm the capacitor polarity in the
application.
The gains listed in Table 1 are realized by changing the taps
on the input resistors inside the amplifier. This causes the
input impedance, ZI, to be dependent on the gain setting.
The actual gain settings are controlled by ratios of resistors,
so the actual gain distribution from part-to-part is quite
good. However, the input impedance will shift by 30% due
to shifts in the actual resistance of the input impedance.
For design purposes, the input network (discussed in the
next section) should be designed assuming an input
impedance of 10 kΩ, which is the absolute minimum input
impedance of the EUA6027A. At the higher gain settings,
the input impedance could increase to as high as 115 kΩ.
The typical input impedance at each gain setting is given in
Table 1.
Input Capacitor, Ci
In the typical application an input capacitor, Ci, is required
to allow the amplifier to bias the input signal to the proper
dc level for optimum operation. In this case, Ci and the input
impedance of the amplifier, Zi, form a high-pass filter with
the corner frequency determined in equation 1.
fc(highpass)=
1
----------------------------(2 )
2 π Z fC
Power Supply Decoupling, (CS)
The EUA6027A is a high-performance CMOS audio
amplifier that requires adequate power supply decoupling to
ensure the output total harmonic distortion (THD) is as low
as possible. Power supply decoupling also prevents
oscillations for long lead lengths between the amplifier and
the speaker. The optimum decoupling is achieved by using
two capacitors of different types that target different types
of noise on the power supply leads. For higher frequency
transients, spikes, or digital hash on the line, a good low
equivalent-series-resistance (ESR) ceramic capacitor,
typically 0.1µF placed as close as possible to the device
VDD lead, works best. For filtering lower-frequency noise
signals, a larger aluminum electrolytic capacitor of 10µF or
greater placed near the audio power amplifier is
recommended.
1
-----------------(1)
2 π Zi Ci
DS6027A Ver 1.1 June 2008
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EUA6027A
In a typical computer sound channel operating at 5V,
bridging raises the power into an 8-Ω speaker from a
singled-ended (SE, ground reference) limit of 250 mW to
1W. In sound power that is a 6-dB improvement, which is
loudness that can be heard. In addition to increased power
there are frequency response concerns. Consider the
single-supply SE configuration shown in Figure 30.
A coupling capacitor is required to block the dc offset
voltage from reaching the load. These capacitors can be
quite large (approximately 33µF to 1000µF) so they tend
to be expensive, heavy, occupy valuable PCB area, and
have the additional drawback of limiting low-frequency
performance of the system. This frequency limiting effect
is due to the high pass filter network created with the
speaker impedance and the coupling capacitance and is
calculated with equation 4.
Midrail Bypass Capacitor, (CBYP)
The midrail bypass capacitor, CBYP, the most critical
capacitor and serves several important functions. During
start-up or recovery from shutdown mode, CBYP
determines the rate at which the amplifier starts up. The
second function is to reduce noise produced by the power
supply caused by coupling into the output drive signal.
This noise is from the midrail generation circuit internal to
the amplifier, which appears as degraded PSRR and
THD+N.
Bypass capacitor, CBYP, values of 0.47µF to 1µF ceramic
or tantalum low-ESR capacitors are recommended for the
best THD and noise performance.
Using Low- ESR Capacitors
Low- ESR capacitors are recommended throughout this
applications section. A real (as opposed to ideal) capacitor
can be modeled simply as a resistor in series with an ideal
capacitor. The voltage drop across this resistor minimizes
the beneficial effects of the capacitor in the circuit. The
lower the equivalent value of this resistance the more the
real capacitor behaves like an ideal capacitor.
fC =
= VO(PP)
Power
2 2
=
V(rms)
2 π R LCC
----------------------------------(4)
For example, a 68µF capacitor with an 8-Ω speaker would
attenuate low frequencies below 293 Hz. The BTL
configuration cancels the dc offsets, which eliminates the
need for the blocking capacitors. Low-frequency
performance is then limited only by the input network and
speaker response. Cost and PCB space are also minimized
by eliminating the bulky coupling capacitor.
Bridged-Tied Load Versus Single-Ended Mode
Figure 29 show a Class-AB audio power amplifier (APA)
in a BTL configuration. The EUA6027A BTL amplifier
consists of two Class-AB amplifiers driving both ends of
the load. There are several potential benefits to this
differential drive configuration, but initially consider
power to the load. The differential drive to the speaker
means that as one side is slewing up, the other side is
slewing down, and vice versa. This in effect doubles the
voltage swing on the load as compared to a ground
referenced load. Plugging 2×VO(PP) into the power
equation, where voltage is squared, yields 4× the output
power from the same supply rail and load impedance(see
equation 3)
V(rms)
1
2
Figure 30. Single-Ended configuration and
Frequency Response
Increasing power to the load does carry a penalty of
increased internal power dissipation. The increased
dissipation is understandable considering that the BTL
configuration produces 4 × the output power of the SE
configuration. Internal dissipation versus output power is
discussed further in the crest factor and thermal
considerations section.
------(3)
RL
Figure 29.Bridge-Tied Load configuration
DS6027A Ver 1.1 June 2008
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EUA6027A
Thermal Pad Considerations
The thermal pad must be connected to ground. The package
with thermal pad of the EUA6027A requires special
attention on thermal design. If the thermal design issues are
not properly addressed, the EUA6027A will go into thermal
shutdown when driving a heavy load.
The thermal pad on the bottom of the EUA6027A should be
soldered down to a copper pad on the circuit board. Heat can
be conducted away from the thermal pad through the copper
plane to ambient. If the copper plane is not on the top
surface of the circuit board, 8 to 10 vias of 13 mil or smaller
in diameter should be used to thermally couple the thermal
pad to the bottom plane.
For good thermal conduction, the vias must be plated
through and solder filled. The copper plane used to conduct
heat away from the thermal pad should be as large as
practical.
If the ambient temperature is higher than 25℃,a larger
copper plane or forced-air cooling will be required to keep
the EUA6027A junction temperature below the thermal
shutdown temperature (150℃). In higher ambient
temperature, higher airflow rate and/or larger copper area
will be required to keep the IC out of thermal shutdown.
DS6027A Ver 1.1 June 2008
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Package Information
TSSOP-20 (FD)
SYMBOLS
A
A1
b
E1
D
D1
E
E2
e
L
DS6027A Ver 1.1 June 2008
MILLIMETERS
MIN.
MAX.
1.20
0.00
0.15
0.19
0.30
4.40
6.50
3.77
6.20
6.60
2.70
0.65
0.45
0.75
INCHES
MIN.
0.000
0.007
MAX.
0.047
0.006
0.012
0.173
0.256
0.148
0.244
0.260
0.106
0.026
0.018
0.030
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