ETC EUP3406

芯美电子
EUP3406
1.5MHz, 600mA Synchronous
Step-Down Converter
DESCRIPTION
FEATURES
The EUP3406 is a constant frequency, current mode,
PWM step-down converter. The device integrates a
main switch and a synchronous rectifier for high
efficiency. The 2.5V to 5.5V input voltage range makes
the EUP3406 ideal for powering portable equipment
that runs from a single cell Lithium-Ion (Li+) battery or
3-cell NiMH/ NiCd batteries. The output voltage can be
regulated as low as 0.6V. The EUP3406 supports up to
600mA load current and can also run at 100% duty
cycle for low dropout applications, extending battery
life in portable systems.
Switching frequency is internally set at 1.5MHz,
allowing the use of small surface mount inductor and
capacitors. The internal synchronous switch increases
efficiency while eliminate the need for an external
Schottky diode. The EUP3406 is available in a low
profile 5 lead SOT package.
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High Efficiency
1.5MHz Constant Switching Frequency
600mA Available Load Current
270µA Typical Quiescent Current
2.5V to 5.5V Input Voltage Range
Adjustable Output Voltage as Low as 0.6V
100% Duty Cycle Low Dropout Operation
No Schottky Diode Required
Short Circuit and Thermal Protection
Over Voltage Protection
<1µA Shutdown Current
Available in SOT23-5 Package
RoHS Compliant and 100% Lead(Pb)-Free
APPLICATIONS
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Cellular and Smart Phones
Portable Media Players/ MP3 Players
Digital Still and Video Cameras
Portable Instruments
WLAN PC Cards
Typical Application Circuit
Figure1.
DS3406 Ver1.2
Nov. 2007
1
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EUP3406
Block Diagram
Figure2.
Pin Configurations
Package Type
Pin Configurations
SOT23-5
Pin Description
PIN
Pin
EN
1
GND
2
SW
3
VIN
4
DESCRIPTION
Chip Enable pin. Forcing this pin above 1.5V enables the part. Forcing this pin below
0.3V shuts down the device. Do not leave EN floating.
Common ground
Switch Node Connection to Inductor. This pin connects to the drains of the internal
main and synchronous power MOSFET switches.
Supply voltage pin
VFB
5
Feedback pin
DS3406 Ver1.2
Nov. 2007
2
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EUP3406
Ordering Information
Order Number
Package Type
Marking
Operating Temperature range
EUP3406VIR1
SOT23-5
eA □ □ □ □
-40 °C to 85°C
EUP3406
□ □ □ □
Lead Free Code
1: Lead Free 0: Lead
Packing
R: Tape & Reel
Operating temperature range
I: Industry Standard
Package Type
V: SOT-23
DS3406 Ver1.2
Nov. 2007
3
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EUP3406
Absolute Maximum Ratings
„
„
„
„
„
„
„
„
„
„
Input Supply Voltage ----------------------------------------------------------- -0.3V to 6V
EN, VFB Voltages -------------------------------------------------------------- -0.3V to VIN
P-Channel Switch Source Current (DC) ------------------------------------------ 800mA
N-Channel Switch Sink Current (DC) ---------------------------------------------- 800mA
Peak SW Sink and Source Current -------------------------------------------------1.4A
Operating Temperature Range ----------------------------------------------- -40°C to 85°C
Junction Temperature ------------------------------------------------------------------- 125°C
Storage Temperature ------------------------------------------------------- -65°C to 150°C
Lead Temp (Soldering, 10sec) ------------------------------------------------------260°C
ESD Rating (HBM) -----------------------------------------------------------------2kV
Electrical Characteristics
Unless otherwise specified, TA=25°C, VIN=3.6V.
Symbol
Parameter
Conditions
VIN
Input Voltage Range
IVFB
Feedback Current
IQ
Quiescent Current
VFB=0.5V
ISHDN
Shutdown Current
VEN=0V, VIN= 4.2V
IPK
Peak Inductor Current
VIN=3V, VFB=0.5V
VFB
Regulated Feedback Voltage
∆ Output Overvoltage
Lockout
Output Voltage Line
Regulation
Reference Voltage Line
Regulation
Output Voltage Load
Regulation
(Note 1)
∆VOVL
∆VOUT
∆VFB
VLOADREG
fOSC
Oscillator Frequency
RPFET
Min
EUP3406
Typ
Max.
2.5
5.5
±30
Unit
V
nA
270
370
µA
1
µA
1
1.2
1.4
A
0.588
0.6
0.612
V
20
50
80
mV
VIN=2.5V to 5.5V, ILOAD=0
0.2
0.4
%/V
VIN=2.5V to 5.5V
0.2
0.4
%/V
ILOAD=0mA to 600mA
0.5
∆VOVL=VOVL- VFB
VFB=0.6V
1.2
1.5
%
1.8
MHz
VFB=0V
210
RDS(ON) of P-Channel FET
ISW=100mA
0.26
0.4
Ω
RNFET
RDS(ON) of N-Channel FET
ISW=-100mA
0.28
0.4
Ω
ILSW
SW Leakage Current
VEN=0V, VSW=0V or 5V, VIN=5V
±1
µA
VEN
EN Threshold
1.5
V
IEN
EN Leakage Current
1
Note 1: The EUP3406 is tested in a proprietary test mode that connects VFB to the output of the error amplifier.
µA
DS3406 Ver1.2
Nov. 2007
0.3
1.0
4
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kHz
芯美电子
EUP3406
Typical Operating Characteristics
DS3406 Ver1.2
Nov. 2007
5
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DS3406 Ver1.2
Nov. 2007
EUP3406
6
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DS3406 Ver1.2
Nov. 2007
EUP3406
7
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DS3406 Ver1.2
Nov. 2007
EUP3406
8
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EUP3406
Application Information
Main Control Loop
The EUP3406 uses a slop-compensated constant
frequency, current mode PWM architecture. Both the
main (P-Channel MOSFET) and synchronous
(N-channel MOSFET) switches are internal. During
normal operation, the EUP3406 regulates output voltage
by switching at a constant frequency and then
modulating the power transferred to the load each cycle
using PWM comparator. It sums three weighted
differential signals: the output feedback voltage from an
external resistor divider, the main switch current sense,
and the slope-compensation ramp. It modulates output
power by adjusting the inductor-peak current during the
first half of each cycle. An N-channel, synchronous
switch turns on during the second half of each cycle (off
time). When the inductor current starts to reverse or
when the PWM reaches the end of the oscillator period,
the synchronous switch turns off. This keep excess
current from flowing backward through the inductor,
from the output capacitor to GND, or through the main
and synchronous switch to GND.
Inductor Selection
The output inductor is selected to limit the ripple current
to some predetermined value, typically 20%~40% of the
full load current at the maximum input voltage. Large
value inductors lower ripple currents. Higher VIN or
VOUT also increases the ripple current as shown in
equation. A reasonable starting point for setting ripple
current is ∆IL=240mA (40% of 600mA).
The input capacitor RMS current varies with the input
voltage and the output voltage. The equation for the
maximum RMS current in the input capacitor is:
I
RMS
=I
O
 V
V
O × 1 − O
 V
V
IN
IN 
×




The output capacitor COUT has a strong effect on loop
stability.
The selection of COUT is driven by the required effective
series resistance (ESR).
ESR is a direct function of the volume of the capacitor;
that is, physically larger capacitors have lower ESR.
Once the ESR requirement for COUT has been met, the
RMS current rating generally far exceeds the IRIPPLE(P-P)
requirement. The output ripple ∆VOUT is determined by:

≅ ∆I  ESR +
∆V
L
OUT
8fC




OUT 
1
When choosing the input and output ceramic capacitors,
choose the X5R or X7R dielectric formulations. These
dielectrics have the best temperature and voltage
characteristics of all the ceramics for a given value and
size.
Output Voltage Programming

 V
1 − OUT 
∆I =
V
L (f)(L) OUT 

V

IN 
1
The output voltage is set by a resistive divider according
to the following formula:
The DC current rating of the inductor should be at least
equal to the maximum load current plus half the ripple
current to prevent core saturation. Thus, a 720mA rated
inductor should be enough for most applications
(600mA+120mA). For better efficiency, choose a low
DC-resistance inductor.


VOUT = 0.6V 1 +
R2 

R1 
The external resistive divider is connected to the output,
allowing remote voltage sensing as shown in Figure3.
CIN and COUT Selection
In continuous mode, the source current of the top
MOSFET is a square wave of duty cycle VOUT/VIN. The
primary function of the input capacitor is to provide a
low impedance loop for the edges of pulsed current
drawn by the EUP3406. A low ESR input capacitor sized
for the maximum RMS current must be used. The size
required will vary depending on the load, output voltage
and input voltage source impedance characteristics. A
typical value is around 4.7µF.
DS3406 Ver1.2
Nov. 2007
Figure3.
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EUP3406
Thermal Considerations
To avoid the EUP3406 from exceeding the maximum
junction temperature, the user will need to do a thermal
analysis. The goal of the thermal analysis is to determine
whether the operating conditions exceed the maximum
junction temperature of the part. The temperature rise is
given by:
TR=(PD)(θJA)
Where PD=ILOAD2 × RDS(ON) is the power dissipated by
the regulator ; θJA is the thermal resistance from the
junction of the die to the ambient temperature.
The junction temperature, TJ, is given by:
TJ=TA+TR
Where TA is the ambient temperature.
TJ should be below the maximum junction temperature
of 125°C.
DS3406 Ver1.2
Nov. 2007
PC Board Layout Checklist
When laying out the printed circuit board, the following
guidelines should be used to ensure proper operation of
the EUP3406.
1. The input capacitor CIN should connect to VIN as
closely as possible. This capacitor provides the AC
current to the internal power MOSFETs.
2. The power traces, consisting of the GND trace, the
SW trace and the VIN trace should be kept short,
direct and wide.
3. The VFB pin should connect directly to the feedback
resistors. The resistive divider R1/R2 must be
connected between the COUT and ground.
4. Keep the switching node, SW, away from the
sensitive VFB node.
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EUP3406
Packaging Information
SOT23-5
SYMBOLS
INCHES
MIN.
MAX.
MIN.
MAX.
A
-
1.30
-
0.052
A1
0.00
0.15
0.000
0.006
D
2.90
0.114
E1
1.60
0.063
E
2.60
3.00
0.102
0.118
L
0.30
0.60
0.012
0.024
b
0.30
0.50
0.012
0.020
e
DS3406 Ver1.2
MILLIMETERS
Nov. 2007
0.95
0.037
11
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