RT9293 Conceptual Small Package, High Performance, Asynchronies Boost for 10 WLED Driver General Description Features The RT9293 is a high frequency, asynchronous boost converter. The internal MOSFET can support up to 10 White LEDs for backlighting and OLED power application, and the internal soft start function can reduce the inrush current. The device operates with 1-MHz fixed switching frequency to allow small external components and to simplify possible EMI problems. Moreover, the IC comes with 46V over voltage protection to allow inexpensive and small-output capacitors with lower voltage ratings. The LED current is initially set with the external sense resistor RSET . The RT9293 is available in the tiny package type TSOT-23-6 and WDFN-8L 2x2 packages to provide the best solution for PCB space saving and total BOM cost. l Ordering Information RT9293 l l l l l l l l l l Applications l l l Package Type J6 : TSOT-23-6 QW : WDFN-8L 2x2 (W-Type) Operating Temperature Range G : Green (Halogen Free with Commercial Standard) VIN Operating Range : 2.5V to 5.5V Internal Power N-MOSFET Switch Wide Range for PWM Dimming (100Hz to200kHz) Minimize the External Component Counts Internal Soft Start Internal Compensation Under Voltage Protection Over Voltage Protection Over Temperature Protection Small TSOT-23-6 and 8-Lead WDFN Packages RoHS Compliant and Halogen Free l Cellular Phones Digital Cameras PDAs and Smart Phones and MP3 and OLED. Probable Instruments Pin Configurations (TOP VIEW) Feedback Voltage Reference A : 104mV B : 300mV C : 200mV VIN VOUT EN Note : Richtek Green products are : 6 5 4 1 2 3 LX GND FB TSOT-23-6 }RoHS compliant and compatible with the current require- GND 1 VIN 2 VOUT 3 EN 4 }Suitable for use in SnPb or Pb-free soldering processes. }100% matte tin (Sn) plating. GND ments of IPC/JEDEC J-STD-020. 9 8 7 6 5 LX NC FB GND WDFN-8L 2x2 Marking Information Note : There is no pin1 indicator on top mark for TSOT-23-6 For marking information, contact our sales representative directly or through a Richtek distributor located in your area, otherwise visit our website for detail. DS9293-03C April 2008 type, and pin 1 will be lower left pin when reading top mark from left to right. www.richtek.com 1 RT9293 Conceptual Typical Application Circuit L 22uH D V OUT LX V IN VOUT VIN C IN 2.2uF C OUT 1uF RT9293 10 WLEDs Chip Enable EN GND FB R SET Functional Pin Description Pin No. Pin Name Pin Function RT9293□ GJ6 RT9293□ GQW 1 8 1, 5, Exposed pad (9) LX 3 6 FB Feed Back Pin, put a resistor to GND to setting the current. 4 4 EN Chip Enable (Active High). 5 3 VOUT Output Voltage Pin. 6 2 VIN Input Supply. -- 7 NC No Internal Condition. 2 Switching Pin. Ground Pin. The exposed pad must be soldered to a large PCB and connected to GND for maximum power dissipation. GND Function Block Diagram LX VIN UVLO VOUT OCP Internal Compensation Internal Soft Start OVP OTP Logic Control, Minimum On Time PWM CurrentSense + + EA GM Driver GND + - Slope Compensation LPF Enable Logic Shutdown 20ms PWM Oscillator Reference Voltage VREF 1uA FB www.richtek.com 2 Bias Current EN DS9293-03C April 2008 RT9293 Conceptual Absolute Maximum Ratings l l l l l l l l l (Note 1) Supply Input Voltage, VIN ---------------------------------------------------------------------------------------------- −0.3V to 6V Switching Pin, LX -------------------------------------------------------------------------------------------------------- −0.3V to 50V VOUT ----------------------------------------------------------------------------------------------------------------------- −0.3V to 46V Other Pins ----------------------------------------------------------------------------------------------------------------- −0.3V to 6V Power Dissipation, PD @ TA = 25°C TSOT-23-6 ----------------------------------------------------------------------------------------------------------------- 0.392W WDFN−8L 2x2 ------------------------------------------------------------------------------------------------------------ 0.606W Package Thermal Resistance (Note 3) TSOT-23-6, θJA ----------------------------------------------------------------------------------------------------------- 255°C/W WDFN−8L 2x2, θJA ------------------------------------------------------------------------------------------------------- 165°C/W WDFN−8L 2x2, θJC ------------------------------------------------------------------------------------------------------ 20°C/W Lead Temperature (Soldering, 10 sec.)------------------------------------------------------------------------------ 260°C Junction Temperature --------------------------------------------------------------------------------------------------- 150°C Storage Temperature Range ------------------------------------------------------------------------------------------- −65°C to 150°C Recommended Operating Conditions l l (Note 2) Junction Temperature Range ------------------------------------------------------------------------------------------ −40°C to 125°C Ambient Temperature Range ------------------------------------------------------------------------------------------ −40°C to 85°C Electrical Characteristics (VIN = 3.7V, CIN = 2.2uF, COUT = 0.47uF, IOUT = 20mA, L = 22uH, TA = 25°C, unless otherwise specified) Parameter Symbol Input Voltage VIN Under Voltage Lock Out VUVLO Conditions UVLO Hystersis Min Typ Max Unit 2.5 -- 5.5 V 2 2.2 2.45 V -- 0.1 -- V Quiescent Current IQ FB = 1.5V, No Switching -- 400 600 uA Supply Current IIN FB = 0V, Switching -- 1 2 mA Shutdown Current ISHDN VEN < 0.4V -- 1 4 uA Line Regulation VIN = 3 to 4.3V -- 1 -- % Load Regulation 1mA to 20mA -- 1 -- % 0.75 1 1.25 MHz Maximum Duty Cycle 90 92 -- % Clock Rate 0.1 -- 200 kHz 94 104 114 285 300 315 190 200 210 Operation Frequency fOSC RT9293A Feedback Reference Voltage RT9293B RT9293C VREF mV To be continued DS9293-03C April 2008 www.richtek.com 3 RT9293 Conceptual Parameter On R esistance EN Threshold Symbol Conditions RDS(ON) Min Typ Max Unit -- 0.7 1.2 Ω Logic-High Voltage V IH 1.4 -- -- V Logic-Low Voltage V IL -- -- 0.5 V IIH -- 1 -- uA -- 0.1 -- V 42 1 46 1.2 50 -- V A ---- 160 30 20 ---- °C °C ms EN Sink Current EN Hystersis Over-Voltage Threshold Over-C urrent Threshold OTP OTP H ystersis Shutdown Delay V OVP IOCP T OTP T SHDN Note 1. Stresses listed as the above “Absolute Maximum Ratings” may cause permanent damage to the device. These are for stress ratings. Functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may remain possibility to affect device reliability. Note 2. The device is not guaranteed to function outside its operating conditions. Note 3. θJA is measured in the natural convection at TA = 25°C on a low effective single layer thermal conductivity test board of JEDEC 51-3 thermal measurement standard. The case point of θJC is on the expose pad for the WDFN package. www.richtek.com 4 DS9293-03C April 2008 RT9293 Conceptual Typical Operating Characteristics Efficiency vs. Input Voltage Efficiency vs. Output Current 100 100 VIN = 4.5V VIN = 4V 80 80 Efficiency (%) 70 Efficiency (%) ILOAD = 30mA 90 90 60 50 40 30 ILOAD = 10mA 70 ILOAD = 20mA 60 50 40 30 20 20 10 10 VOUT = 10V VOUT = 34V 0 0 0 0.05 0.1 0.15 0.2 0.25 2.5 0.3 3 3.5 4.5 5 Output Voltage vs. Output Current Quiescent Current vs. Input Voltage 500 35 450 Quiescent Current (uA) 40 30 25 20 15 400 350 300 250 VFB = 1.5V VIN = 3.7V, VOUT = 34V 200 10 5 15 25 35 45 55 65 75 2.5 85 3 3.5 4 4.5 5 5.5 Input Voltage (V) Output Current (mA) Frequency vs. Input Voltage Frequency vs. Temperature 1100 1100 1050 1050 Frequency (kHz) Frequency (kHz) 5.5 Input Voltage (V) Output Current (A) Output Voltage (V) 4 1000 950 900 1000 950 900 850 850 VIN = 3.7V, ILED = 20mA ILED = 20mA 800 800 2.5 3 3.5 4 4.5 Input Voltage (V) DS9293-03C April 2008 5 5.5 -40 -25 -10 5 20 35 50 65 80 95 110 125 Temperature (°C) www.richtek.com 5 RT9293 Conceptual VFB vs. Input Voltage VFB vs. Temperature 0.34 0.32 0.33 0.29 0.26 V FB (V) V FB (V) VOUT = 34V, IOUT = No Load 10WLED, ILED = 20mA 0.23 0.32 VIN = 3V 0.31 VIN = 3.7V 0.30 VIN = 4.2V 0.29 0.28 0.2 0.27 ILED = 20mA 0.17 0.26 2.5 3 3.5 4 4.5 5 -40 5.5 -15 10 60 85 Temperature (°C) Input Voltage (V) Enable Voltage vs. Input Voltage VFB vs. Output Current 0.314 1.00 0.98 VIN = 3V 0.310 Rising VIN = 4.2V VIN = 3.7V 0.302 0.298 Enable Voltage (V) 0.96 0.306 V FB (V) 35 0.94 0.92 0.90 0.88 Falling 0.86 0.84 0.294 VOUT = 34V 0.290 0.82 0.80 0 5 10 15 20 25 30 2.5 3 3.5 4 4.5 Output Current (mA) Input Voltage (V) LED Current vs. Duty Power On from EN 5 5.5 25 LED Current (mA) 20 VEN (2V/Div) 15 f f f f 10 = 200Hz = 2kHz = 20kHz = 200kHz 5 VOUT (10V/Div) VIN = 3.7V, ILED = 20mA VIN = 3.7V, ILED = 20mA 0 0 10 20 30 40 50 60 70 80 90 100 Time (1ms/Div) Duty (%) www.richtek.com 6 DS9293-03C April 2008 RT9293 Conceptual Power Off from EN Ripple VIN (20mV/Div) VEN (2V/Div) VOUT (20mV/Div) VOUT (10V/Div) VIN = 3.7V, ILED = 20mA VIN = 3.7V, ILED = 20mA Time (1ms/Div) Time (500ns/Div) PWM Dimming PWM Dimming f = 20kHz f = 200Hz VEN (4V/Div) VEN (4V/Div) ILED (10mA/Div) ILED (10mA/Div) VIN = 3.7V, ILED = 20mA Time (1ms/Div) DS9293-03C April 2008 VIN = 3.7V, ILED = 20mA Time (10us/Div) www.richtek.com 7 RT9293 Conceptual Applications Information LED Current Setting V IN 2.5V to 5.5V The loop of Boost structure will keep the FB pin voltage equal to the reference voltage VREF. Therefore, when RREF connects FB pin and GND, the current flows from VOUT through LED and RREF to GND will be decided by the current on RREF, which is equal to following equation. D C OUT 1uF C IN 2.2uF RT9293 LX VIN GND VOUT EN FB ILED V OUT L 10uH to 22uH WLEDs Chip Enable V = REF RSET R3 10k R4 82k Dimming Control V DC Dimming 0V to 2.8V a. Using a PWM Signal to EN Pin For controlling the LED brightness, the RT9293 can perform the dimming control by applying a PWM signal to EN pin. A low pass filter is implemented inside chip to reduce the slew rate of IWLED for preventing the audio noise. The internal soft start and the wide range dimming frequency from 200 to 200kHz can eliminate inrush current and audio noise when dimming. The average LED current is proportional to the PWM signal duty cycle. The magnitude of the PWM signal should be higher than the maximum enable voltage of EN pin, in order to let the dimming control perform correctly. EN IWLED,AVG = Duty of EN IWLED Figure 1. PWM Dimming b. Using a DC Voltage Using a variable DC voltage to adjust the brightness is a popular method in some applications. The dimming control using a DC voltage circuit is shown in Figure 2. As the DC voltage increases, the current pass through R3 increasingly and the voltage drop on R3 increase, i.e. the LED current decreases. For example, if the VDC range is from 0V to 2.8V and assume the RT9293B is selected which VREF is equal to 0.3V, the selection of resistors in Figure 2 sets the LED current from 21mA to 0mA. The LED current can be calculated by the following equation. VREF − ILED = www.richtek.com 8 R SET 16 R3 × (VDC − VREF ) R4 RSET Figure 2. Dimming Control Using a DC Voltage for the RT9293 c. Using a Filtered PWM signal Another common application is using a filtered PWM signal as an adjustable DC voltage for LED dimming control. A filtered PWM signal acts as the DC voltage to regulate the output current. The recommended application circuit is shown as Figure 3. In this circuit, the output ripple depends on the frequency of PWM signal. For smaller output voltage ripple (<100mV), the recommended frequency of 2.8V PWM signal should be above 2kHz. To fix the frequency of PWM signal and change the duty cycle of PWM signal can get different output current. The LED current can be calculated by the following equation. R3 × (VPWM × Duty − VREF ) VREF − R4 + RDC ILED = R SET V IN 2.5V to 5.5V L 10uH to 22uH V OUT D C OUT 1uF C IN 2.2uF RT9293 VIN GND FB LX VOUT EN WLEDs Chip Enable R3 10k R4 3k R DC 82k R SET 16 C DC 1uF 2.8V 0V PWM Signal Figure 3. Filtered PWM Signal for LED Dimming Control of the RT9293 DS9293-03C April 2008 RT9293 Conceptual By the above equation and the application circuit shown in Figure 3, and assume the RT9293B is selected which VREF is equal to 0.3V. Figure 4 shows the relationship between the LED current and PWM duty cycle. For example, when the PWM duty is equal to 60%, the LED current will be equal to 8.6mA. When the PWM duty is equal to 40%, the LED current will be equal to 12.7mA. Application for Driving 3 x 13 WLEDs The RT9293 can driver different WLEDs topology. For example, the Figure 6 shows the 3x13 WLEDs and total current is equal to 260mA. The total WLEDs current can be set by the RREF which is equal to following equation. ITotal = VREF RSET 20 V IN 18 LED Current (mA) 16 D C OUT 1uF C IN 2.2uF 14 V OUT L 22uH RT9293 LX VIN 12 GND 10 8 … VOUT FB EN Chip Enable 3 x 13 WLEDs 6 4 R SET 2 0 Figure 6. Application for Driving 3 X 13 WLEDs 0 20 40 60 80 100 PWM Duty (%) Soft-Start Figure 4 Constant Output Voltage Control The output voltage of R9293 can be adjusted by the divider circuit on FB pin. Figure 5 shows the application circuit for the constant output voltage. The output voltage can be calculated by the following Equations. VOUT = VREF × V IN 2.5V to 5.5V R1 + R2 ; R2 >10k R2 L 10uH to 22uH V OUT D GND FB limiting threshold. LX VOUT EN R1 Chip Enable R2 Figure 5. Application for Constant Output Voltage DS9293-03C April 2008 across the current limiting threshold, the N-MOSFET will be turned off so that the inductor will be forced to leave charging stage and enter discharging stage. Therefore, the inductor current will not increase over the current RT9293 VIN Current Limiting The current flow through inductor as charging period is detected by a current sensing circuit. As the value comes COUT 1uF CIN 2.2uF The function of soft-start is made for suppressing the inrush current to an acceptable value at the beginning of poweron. The soft-start function is built-in the RT9293 by clamping the output voltage of error amplifier so that the duty cycle of the PWM will be increased gradually in the soft-start period. OVP/UVLO/OTP The Over Voltage Protection is detected by a junction breakdown detecting circuit. Once VOUT goes over the detecting voltage, LX pin stops switching and the power N-MOSFET will be turned off. Then, the VOUT will be clamped to be near VOVP. As the output voltage is higher than a specified value or input voltage is lower than a specified value, the chip will enter protection mode to www.richtek.com 9 RT9293 Conceptual prevent abnormal function. As the die temperature > 160°C, the chip also will enter protection mode. The power MOSFET will be turned off during protection mode to prevent abnormal operation. PD(MAX) = (125°C − 25°C) / (165°C/W) = 0.606W for WDFN-8L 2x2 packages Inductor Selection The maximum power dissipation depends on operating ambient temperature for fixed T J(MAX) and thermal resistance θJA. For RT9293 packages, the Figure 7 of derating curves allows the designer to see the effect of rising ambient temperature on the maximum power allowed. Capacitor Selection Input ceramic capacitor of 2.2uF and output ceramic capacitor of 1uF are recommended for the RT9293 applications for driving 10 series WLEDs. For better voltage filtering, ceramic capacitors with low ESR are recommended. X5R and X7R types are suitable because of their wider voltage and temperature ranges. Thermal Considerations For continuous operation, do not exceed absolute maximum operation junction temperature. The maximum power dissipation depends on the thermal resistance of IC package, PCB layout, the rate of surroundings airflow and temperature difference between junction to ambient. The maximum power dissipation can be calculated by 0.8 Maximum Power Dissipation (W) The recommended value of inductor for 10 WLEDs applications is from 10uH to 22uH. Small size and better efficiency are the major concerns for portable devices, such as the RT9293 used for mobile phone. The inductor should have low core loss at 1MHz and low DCR for better efficiency. The inductor saturation current rating should be considered to cover the inductor peak current. PD(MAX) = (125°C − 25°C) / (255°C/W) = 0.392W for TSOT-23-6 packages Single Layer PCB 0.7 WDFN-8L 2x2 0.6 0.5 0.4 TSOT-23-6 0.3 0.2 0.1 0 0 25 50 75 Figure 7. Derating Curves for RT9293 Packages Layout Considerations PD(MAX) = ( TJ(MAX) − TA ) / θJA } A full GND plane without gap break. temperature 125°C, TA is the ambient temperature and the θJA is the junction to ambient thermal resistance. For recommended operating conditions specification of RT9293, where T J(MAX) is the maximum junction temperature of the die (125°C) and TA is the maximum ambient temperature. The junction to ambient thermal resistance θJA is layout dependent. For WDFN-8L 2x2 packages, the thermal resistance θJA is 165°C/W on the standard JEDEC 51-3 single layer thermal test board. The maximum power dissipation at TA = 25°C can be calculated by following formula : www.richtek.com 10 125 Ambient Temperature (°C) following formula : Where T J(MAX) is the maximum operation junction 100 } LX node copper area should be minimized for reducing EMI. } The input capacitor CIN should be placed as closed as possible to Pin 6. } The output capacitor COUT should be connected directly from the Pin 5 to ground rather than across the LEDs. } FB node copper area should be minimized and kept far away from noise sources (Pin 1, Pin 5, Pin 6). } The Inductor is far away receiver and microphone. } RSET should be placed as close as possible to the RT9293. DS9293-03C April 2008 Conceptual RT9293 } Traces in bold need to be routed first and should be kept as short as possible. } VDD to GND noise bypass : Short and wide connection for the 1uF MLCC capacitor between Pin 6 and Pin 2 is recommended. } The voice trace should be far away from the RT9293. } The embedded antenna should be kept far away from and at different side of the RT9293. } The through hole of the RT9293's GND pin is recommended to be large and as many as possible. The inductor should be placed as close as possible to the switch pin to minimize the noise coupling into other circuits. LX node copper area should be minimized for reducing EMI. GND The C OUT should be connected directly from the output schottky diode to ground rather than across the WLEDs C OUT V IN C IN should be placed as closed as possible to VIN pin for good filtering. D L LX 1 6 VIN GND 2 5 VOUT 3 4 EN CIN RSET FB WLEDs FB node copper area should be minimized and keep far away from noise sources (LX pin) and RS should be as close as possible to FB pin. Figure 8. The Layout Consideration of the RT9293 DS9293-03C April 2008 www.richtek.com 11 RT9293 Conceptual Datasheet Revision History Version Data 00C 2008/1/16 Page No. Item Description First Edition Headline General Description 01C 2008/2/13 Features Absolute Maximum Ratings Modify Recommended Operating Conditions Electrical Characteristics 02C 03C 2008/3/18 2008/4/10 General Description Ordering Information Typical Application Circuit Electrical Characteristics Typical Application Circuit Absolute Maximum Ratings Typical Operating Characteristics Applications Information www.richtek.com 12 Change from RT9293A/B to RT9293 Modify. Previous RT9293 Phase Out_by Eric/PME Modify Add Typical Operating Characteristics and Applications Information DS9293-03C April 2008 RT9293 Conceptual Outline Dimension H D L C B b A A1 e Symbol Dimensions In Millimeters Dimensions In Inches Min Max Min Max A 0.700 1.000 0.028 0.039 A1 0.000 0.100 0.000 0.004 B 1.397 1.803 0.055 0.071 b 0.300 0.559 0.012 0.022 C 2.591 3.000 0.102 0.118 D 2.692 3.099 0.106 0.122 e 0.838 1.041 0.033 0.041 H 0.080 0.254 0.003 0.010 L 0.300 0.610 0.012 0.024 TSOT-23-6 Surface Mount Package DS9293-03C April 2008 www.richtek.com 13 RT9293 Conceptual D2 D L E2 E 1 e SEE DETAIL A b 2 1 2 1 A A1 A3 DETAIL A Pin #1 ID and Tie Bar Mark Options Note : The configuration of the Pin #1 identifier is optional, but must be located within the zone indicated. Symbol Dimensions In Millimeters Dimensions In Inches Min Max Min Max A 0.700 0.800 0.028 0.031 A1 0.000 0.050 0.000 0.002 A3 0.175 0.250 0.007 0.010 b 0.200 0.300 0.008 0.012 D 1.950 2.050 0.077 0.081 D2 1.000 1.250 0.039 0.049 E 1.950 2.050 0.077 0.081 E2 0.400 0.650 0.016 0.026 e L 0.500 0.300 0.020 0.400 0.012 0.016 W-Type 8L DFN 2x2 Package Richtek Technology Corporation Richtek Technology Corporation Headquarter Taipei Office (Marketing) 5F, No. 20, Taiyuen Street, Chupei City 8F, No. 137, Lane 235, Paochiao Road, Hsintien City Hsinchu, Taiwan, R.O.C. Taipei County, Taiwan, R.O.C. Tel: (8863)5526789 Fax: (8863)5526611 Tel: (8862)89191466 Fax: (8862)89191465 Email: [email protected] www.richtek.com 14 DS9293-03C April 2008