a High-Accuracy Ultralow IQ, 1 A, anyCAP® Low Dropout Regulator ADP3338 FEATURES High Accuracy Over Line and Load: 0.8% @ 25C, 1.4% Over Temperature Ultralow Dropout Voltage: 190 mV (Typ) @ 1 A Requires Only CO = 1 F for Stability anyCAP = Stable with Any Type of Capacitor (Including MLCC) Current and Thermal Limiting Low Noise 2.7 V to 8 V Supply Range –40C to +85C Ambient Temperature Range SOT-223 Package FUNCTIONAL BLOCK DIAGRAM Q1 IN THERMAL PROTECTION R1 CC DRIVER gm R2 BANDGAP REF GND APPLICATIONS Notebook, Palmtop Computers SCSI Terminators Battery-Powered Systems Bar Code Scanners Camcorders, Cameras Home Entertainment Systems Networking Systems DSP/ASIC Supply GENERAL DESCRIPTION The ADP3338 is a member of the ADP33xx family of precision low dropout anyCAP voltage regulators. The ADP3338 operates with an input voltage range of 2.7 V to 8 V and delivers a load current up to 1 A. The ADP3338 stands out from the conventional LDOs with a novel architecture and an enhanced process that enables it to offer performance advantages and higher output current than its competition. Its patented design requires only a 1 µF output capacitor for stability. This device is insensitive to output capacitor Equivalent Series Resistance (ESR), and is stable with any good quality capacitor, including ceramic (MLCC) types for space-restricted applications. The ADP3338 achieves exceptional accuracy of ± 0.8% at room temperature and ± 1.4% over temperature, line and load variations. The dropout voltage of the ADP3338 is only 190 mV (typical) at 1 A. This device also includes a safety current limit and thermal overload protection. The ADP3338 has ultralow quiescent current 110 µA (typical) in light load situations. OUT ADP3338 ADP3338 VIN IN 1F VOUT OUT GND 1F Figure 1. Typical Application Circuit anyCAP is a registered trademark of Analog Devices Inc. REV. 0 Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781/329-4700 www.analog.com Fax: 781/326-8703 © Analog Devices, Inc., 2001 ADP3338–SPECIFICATIONS1, 2, 3 (VIN = 6.0 V, CIN = COUT = 1 F, TJ = –40C to +125C, unless otherwise noted.) Parameter Symbol Conditions Min OUTPUT Voltage Accuracy VOUT VIN = VOUTNOM + 0.4 V to 8 V IL = 0.1 mA to 1 A TJ = 25°C VIN = VOUTNOM + 0.4 V to 8 V IL = 0.1 mA to 1 A TJ = –40°C to +125°C VIN = VOUTNOM + 0.4 V to 8 V IL = 50 mA to 1 A TJ = 150 °C VIN = VOUTNOM + 0.4 V to 12 V TJ = 25°C IL = 0.1 mA to 1 A TJ = 25°C VOUT = 98% of VOUTNOM IL = 1 A IL = 500 mA IL = 100 mA VIN = VOUTNOM + 1 V f = 10 Hz–100 kHz, CL = 10 µF IL = 1 A Line Regulation Load Regulation Dropout Voltage Peak Load Current Output Noise GROUND CURRENT In Regulation In Dropout VDROP ILDPK VNOISE IGND IGND Max Unit –0.8 +0.8 % –1.4 +1.4 % –1.6 +1.6 % IL = 1 A IL = 500 mA IL = 100 mA IL = 0.1 mA VIN = VOUTNOM – 100 mV IL = 0.1 mA Typ 0.04 mV/V 0.006 mV/mA 190 125 70 1.6 95 400 200 150 mV mV mV A µV rms 9 4.5 0.9 110 190 30 15 3 190 600 mA mA mA µA µA NOTES 1 All limits at temperature extremes are guaranteed via correlation using standard Statistical Quality Control (SQC) methods. 2 Application stable with no load. 3 VIN = 2.7 V for models with V OUTNOM ≤ 2.2 V. Specifications subject to change without notice. –2– REV. 0 ADP3338 ABSOLUTE MAXIMUM RATINGS* PIN FUNCTION DESCRIPTIONS Input Supply Voltage . . . . . . . . . . . . . . . . . . –0.3 V to +8.5 V Power Dissipation . . . . . . . . . . . . . . . . . . . Internally Limited Operating Ambient Temperature Range . . . . –40°C to +85°C Operating Junction Temperature Range . . . –40°C to +150°C θJA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62.3°C/W θJC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26.8°C/W Storage Temperature Range . . . . . . . . . . . . –65°C to +150°C Lead Temperature Range (Soldering 10 sec) . . . . . . . . 300°C Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . 215°C Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 220°C Pin No. Mnemonic Function 1 2 GND OUT 3 IN Ground Pin. Output of the Regulator. Bypass to ground with a 1 µF or larger capacitor. Regulator Input. Bypass to ground with a 1 µF or larger capacitor. *This is a stress rating only; operation beyond these limits can cause the device to be permanently damaged. Unless otherwise specified, all voltages are referenced to GND. PIN CONFIGURATION 3 OUT ADP3338 IN OUT TOP VIEW (Not to Scale) 1 GND 2 ORDERING GUIDE Model Output Voltage* Package Option Package Description ADP3338AKC-1.8 ADP3338AKC-2.5 ADP3338AKC-2.85 ADP3338AKC-3.3 ADP3338AKC-5 1.8 V 2.5 V 2.85 V 3.3 V 5V KC (SOT-223) KC (SOT-223) KC (SOT-223) KC (SOT-223) KC (SOT-223) Plastic Surface Mount Plastic Surface Mount Plastic Surface Mount Plastic Surface Mount Plastic Surface Mount *Contact the factory for other voltage options. CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the ADP3338 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high-energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. REV. 0 –3– WARNING! ESD SENSITIVE DEVICE ADP3338–Typical Performance Characteristics (T = 25C unless otherwise noted.) A 2.504 2.515 VOUT = 2.5V VOUT = 2.5V ILOAD = 0A IL = 0.5A 2.505 IL = 1A 2.500 2.495 250 2.502 GROUND CURRENT – A OUTPUT VOLTAGE – V IL = 0A 2.510 OUTPUT VOLTAGE – V 300 VIN = 6V 2.503 2.501 2.500 2.499 2.498 2.497 200 150 100 50 2.496 2.490 2.5 2.495 4.5 6.5 8.5 INPUT VOLTAGE – V 10.5 0 12.5 0.4 0.6 0.6 LOAD CURRENT – A 0.8 0 1.0 0.4 10 6 4 16 IL = 0.7A 0.3 OUTPUT VOLTAGE – % 8 2 4 6 8 INPUT VOLTAGE – V 10 12 18 IL = 1A VOUT = 2.5V VIN = 6V VOUT = 2.5V VIN = 6V GROUND CURRENT – mA 12 0 TPC 3. Ground Current vs. Supply Voltage TPC 2. Output Voltage vs. Load Current TPC 1. Line Regulation Output Voltage vs. Supply Voltage GROUND CURRENT – mA 0.2 IL = 0.5A IL = 0.3A 0.2 0.1 IL = 0A ILOAD = 1A ILOAD = 700mA 14 ILOAD = 500mA 12 ILOAD = 300mA 10 8 6 4 2 2 0 0 0 0.2 0.4 0.6 OUTPUT LOAD – A 0.8 1.0 TPC 4. Ground Current vs. Load Current 0 –40 –20 0 20 40 60 80 100 120 140 150 JUNCTION TEMPERATURE – C –0.05 0 20 40 60 80 100 120 –40 –20 JUNCTION TEMPERATURE – C TPC 6. Ground Current vs. Junction Temperature TPC 5. Output Voltage Variation % vs. Junction Temperature 250 DROPOUT – mV 200 150 100 VOUT = 2.5V RLOAD = 2.5 3 2.51 VOUT = 2.5V COUT = 1F RLOAD = 2.5 2.50 2 VOLTS INPUT/OUTPUT VOLTAGE – V VOUT = 2.5V 2.49 1 4.5 0 3.5 50 0 0 0 0.2 0.4 0.6 0.8 LOAD CURRENT – A TPC 7. Dropout Voltage vs. Load Current 1 2 3 4 5 6 TIME – sec 7 8 9 10 80 120 140 TIME – s 180 1.0 TPC 8. Power-Up/Power-Down –4– TPC 9. Line Transient Response REV. 0 ADP3338 2.5 80 120 140 TIME – s 1 1 0 300 600 TIME – s 200 180 TPC 10. Line Transient Response 200 800 TPC 11. Load Transient Response 0.0 –20 400m SHORT FULL SHORT A VIN = 6V 1.0 0.5 0.0 –30 CL = 10F IL = 1A –40 0.6 0.8 TIME – s 1 250 CL = 1F IL = 1A –50 –60 –70 CL = 1F IL = 0 –80 0.4 –90 CL = 10F IL = 0 200 150 VOLTAGE NOISE SPECTRAL DENSITY – V/ Hz TPC 13. Short-Circuit Current 50 IL = 0A 100 1k 10k 100k FREQUENCY – Hz TPC 14. Power Supply Ripple Rejection 100 10 CL = 1F 1 0.1 CL = 10F 0.01 0.001 10 100 10k 1k 100k FREQUENCY – Hz 1M TPC 16. Output Noise Density REV. 0 IL = 1A 100 0 10 800 300 VOUT = 2.5V RMS NOISE – V –10 RIPPLE REJECTION – dB VOLTS 2.5 400 600 TIME – s TPC 12. Load Transient Response 0 1.5 2.5 2.4 0 3.5 VIN = 6V COUT = 10F A 4.5 T 2.6 2.4 A 2.49 2.6 VOLTS VOLTS 2.50 VOLTS VIN = 6V COUT = 1F RLOAD = 2.5 T VOUT = 2.5V COUT = 10F RLOAD = 2.5 2.51 –5– 1M 0 10 20 30 CL – F 40 TPC 15. RMS Noise vs. CL (10 Hz–100 kHz) 50 ADP3338 THEORY OF OPERATION With the ADP3338 anyCAP LDO, this is no longer true. It can be used with virtually any good quality capacitor, with no constraint on the minimum ESR. This innovative design allows the circuit to be stable with just a small 1 µF capacitor on the output. Additional advantages of the pole-splitting scheme include superior line noise rejection and very high regulator gain, which leads to excellent line and load regulation. An impressive ± 1.4% accuracy is guaranteed over line, load, and temperature. The new anyCAP LDO ADP3338 uses a single control loop for regulation and reference functions. The output voltage is sensed by a resistive voltage divider consisting of R1 and R2 which is varied to provide the available output voltage option. Feedback is taken from this network by way of a series diode (D1) and a second resistor divider (R3 and R4) to the input of an amplifier. INPUT OUTPUT COMPENSATION CAPACITOR Q1 NONINVERTING WIDEBAND DRIVER gm ATTENUATION (VBANDGAP/VOUT) R3 PTAT VOS R1 D1 (a) R4 PTAT CURRENT ADP3338 Additional features of the circuit include current limit and thermal shutdown. VIN CLOAD C1 1F C2 1F RLOAD IN R2 OUT VOUT GND ADP3338 GND Figure 2. Functional Block Diagram Figure 3. Typical Application Circuit A very high-gain error amplifier is used to control this loop. The amplifier is constructed in such a way that equilibrium produces a large, temperature-proportional input, “offset voltage” that is repeatable and very well controlled. The temperatureproportional offset voltage is combined with the complementary diode voltage to form a “virtual bandgap” voltage, implicit in the network, although it never appears explicitly in the circuit. Ultimately, this patented design makes it possible to control the loop with only one amplifier. This technique also improves the noise characteristics of the amplifier by providing more flexibility on the trade-off of noise sources that leads to a low noise design. The R1, R2 divider is chosen in the same ratio as the bandgap voltage to the output voltage. Although the R1, R2 resistor divider is loaded by the diode D1 and a second divider consisting of R3 and R4, the values can be chosen to produce a temperature-stable output. This unique arrangement specifically corrects for the loading of the divider, thus avoiding the error resulting from base current loading in conventional circuits. APPLICATION INFORMATION CAPACITOR SELECTION Output Capacitor The stability and transient response of the LDO is a function of the output capacitor. The ADP3338 is stable with a wide range of capacitor values, types, and ESR (anyCAP). A capacitor as low as 1 µF is all that is needed for stability. A higher capacitance may be necessary if high output current surges are anticipated or if the output capacitor cannot be located near the output and ground pins. The ADP3338 is stable with extremely low ESR capacitors (ESR ≈ 0), such as Multilayer Ceramic Capacitors (MLCC) or OSCON. Note that the effective capacitance of some capacitor types fall below the minimum over temperature or with dc voltage. Input Capacitor An input bypass capacitor is not strictly required but it is recommended in any application involving long input wires or high source impedance. Connecting a 1 µF capacitor from the input to ground reduces the circuit’s sensitivity to PC board layout and input transients. If a larger output capacitor is necessary, a larger value input capacitor is also recommended. The patented amplifier controls a new and unique noninverting driver that drives the pass transistor, Q1. The use of this special noninverting driver enables the frequency compensation to include the load capacitor in a pole-splitting arrangement to achieve reduced sensitivity to the value, type, and ESR of the load capacitance. OUTPUT CURRENT LIMIT The ADP3338 is short-circuit protected by limiting the pass transistor’s base drive current. The maximum output current is limited to about 2 A. See TPC 13. Most LDOs place very strict requirements on the range of ESR values for the output capacitor because they are difficult to stabilize due to the uncertainty of load capacitance and resistance. Moreover, the ESR value, required to keep conventional LDOs stable, changes depending on load and temperature. These ESR limitations make designing with LDOs more difficult because of their unclear specifications and extreme variations over temperature. –6– REV. 0 ADP3338 THERMAL OVERLOAD PROTECTION The ADP3338 is protected against damage due to excessive power dissipation by its thermal overload protection circuit. Thermal protection limits the die temperature to a maximum of 160°C. Under extreme conditions (i.e., high ambient temperature and power dissipation) where the die temperature starts to rise above 160°C, the output current will be reduced until the die temperature has dropped to a safe level. As shown in Figures 4a–c, the amount of copper the ADP3338 is mounted to affects the thermal performance. When mounted to 2 oz. copper with just the minimal pads, Figure 4a, the θJA is 126.6°C/W. By adding a small copper pad under the ADP3338, Figure 4b, reduces the θJA to 102.9°C/W. Increasing the copper pad to 1 square inch, Figure 4c, reduces the θ JA even further to 52.8°C/W. Current and thermal limit protections are intended to protect the device against accidental overload conditions. For normal operation, the device’s power dissipation should be externally limited so that the junction temperature will not exceed 150°C. CALCULATING POWER DISSIPATION Device power dissipation is calculated as follows: a. PD = (VIN − VOUT ) × ILOAD + (VIN ) × IGND Where ILOAD and IGND are load current and ground current, VIN and VOUT are the input and output voltages respectively. Assuming worst-case operating conditions are ILOAD = 1.0 A, IGND = 10 mA, VIN = 3.3 V and VOUT = 2.5 V, the device power dissipation is: PD = ( 3.3V – 2.5V ) 1000 mA + ( 3.3V ) 10 mA = 833 mW So, for a junction temperature of 125°C and a maximum ambient temperature of 85°C, the required thermal resistance from junction to ambient is: θ JA = 125°C – 85°C = 48°C /W 0.833 W PRINTED CIRCUIT BOARD LAYOUT CONSIDERATIONS The SOT-223’s thermal resistance, θJA, is determined by the sum of the junction-to-case and the case-to-ambient thermal resistances. The junction-to-case thermal resistance, θJC, is determined by the package design and specified at 26.8°C/W. However, the case-to-ambient thermal resistance is determined by the printed circuit board design. REV. 0 b. c. Figure 4. PCB Layouts Use the following general guidelines when designing printed circuit boards: 1. Keep the output capacitor as close to the output and ground pins as possible. 2. Keep the input capacitor as close to the input and ground pins as possible. 3. PC board traces with larger cross sectional areas will remove more heat from the ADP3338. For optimum heat transfer, specify thick copper and use wide traces. 4. The thermal resistance can be decreased by adding a copper pad under the ADP3338 as shown in Figure 4b. 5. If possible, utilize the adjacent area to add more copper around the ADP3338. Connecting the copper area to the output of the ADP3338, as shown in Figure 4c, is best but will improve thermal performance even if it is connected to other signals. 6. Use additional copper layers or planes to reduce the thermal resistance. Again, connecting the other layers to the output of the ADP3338 is best, but not necessary. When connecting the output pad to other layers use multiple vias. –7– ADP3338 OUTLINE DIMENSIONS Dimensions shown in inches and (mm). C02050–1.5–6/01(0) 3-Lead Surface Mount KC (SOT-223) 0.124 (3.15) 0.116 (2.95) 4 0.146 (3.70) 0.130 (3.30) 0.287 (7.30) 0.264 (6.70) 1 2 3 0.033 (0.85) 0.026 (0.65) 0.0905 (2.30) NOM 0.041 (1.05) 0.033 (0.85) 0.264 (6.70) 0.248 (6.30) 0.051 (1.30) 0.043 (1.10) 16 10 0.25 (0.35) 0.010 (0.25) 0.067 (1.70) 0.060 (1.50) 0.181 (4.60) NOM 10 MAX 16 10 SEATING PLANE PRINTED IN U.S.A. 0.004 (0.10) 0.0008 (0.02) –8– REV. 0