Revised March 2005 USB1T11A Universal Serial Bus Transceiver General Description Features The USB1T11A is a one chip generic USB transceiver. It is designed to allow 5.0V or 3.3V programmable and standard logic to interface with the physical layer of the Universal Serial Bus. It is capable of transmitting and receiving serial data at both full speed (12Mbit/s) and low speed (1.5Mbit/s) data rates. The input and output signals of the USB1T11A conform with the “Serial Interface Engine”. Implementation of the Serial Interface Engine along with the USB1T11A allows the designer to make USB compatible devices with off-theshelf logic and easily modify and update the application. ■ Complies with Universal Serial Bus specification 1.1 ■ Utilizes digital inputs and outputs to transmit and receive USB cable data ■ Supports 12Mbit/s “Full Speed” and 1.5Mbit/s “Low Speed” serial data transmission ■ Compatible with the VHDL “Serial Interface Engine” from USB Implementers' Forum ■ Supports single-ended data interface ■ Single 3.3V supply ■ ESD Performance: Human Body Model ! 9.5 kV on D, D pins only ! 4 kV on all other pins ■ 16-lead Pb-Free MLP package saves space Ordering Code: Order Number Package Package Description Number USB1T11AM (Note 1) M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow USB1T11AM_NL (Note 2) M14A Pb-Free 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow USB1T11ABQX MLP16C Pb-Free 16-Terminal Molded Leadless Package (MLP), JEDEC MO-220, 3mm square USB1T11AMTC (Note 1) MTC14 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide USB1T11AMTC_NL (Note 2) MTC14 Pb-Free 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide USB1T11AMTCX_NL (Note 2) MTC14 Pb-Free 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Pb-Free package per JEDEC J-STD-020B. Note 1: Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code. Note 2: “_NL” indicates Pb-Free package (per JEDEC J-STD-020B). Please use order number as indicated. The USB-IF Logos are trademarks of Universal Serial Bus Implementers Forum, Inc. © 2005 Fairchild Semiconductor Corporation DS500234 www.fairchildsemi.com USB1T11A Universal Serial Bus Transceiver November 1999 USB1T11A Connection Diagrams Logic Diagram Pin Assignments for SOIC and TSSOP Pin Assignments for MLP Pin Descriptions Pin Name I/O RCV O Receive data. CMOS level output for USB differential input Description OE I Output Enable. Active LOW, enables the transceiver to transmit data on the bus. When not active the transceiver is in receive mode. MODE I Mode. When left unconnected, a weak pull-up transistor pulls it to VCC and in this GND, the VMO/FSEO pin takes the function of FSEO (Force SEO). VPO, VMO/FSEO I Inputs to differential driver. (Outputs from SIE). MODE VPO VMO/FSEO RESULT 0 0 0 Logic “0” 0 1 SE0 1 0 Logic “1” 1 1 SEO 1 VP, VM O 0 0 SE0 0 1 Logic “0” 1 0 Logic “1” 1 1 Illegal code Gated version of D and D. Outputs are logic “0” and logic “1”. Used to detect single ended zero (SE0), error conditions, and interconnect speed. (Input to SIE). VP VM RESULT 0 0 SE0 0 1 Low Speed 1 0 Full Speed 1 1 Error D, D AI/O Data, Data. Differential data bus conforming to the Universal Serial Bus standard. SUSPND I Suspend. Enables a low power state while the USB bus is inactive. While the suspend pin is active it will drive the RCV pin to a logic “0” state. Both D and D are 3-STATE. SPEED I Edge rate control. Logic “1” operates at edge rates for “full speed”. Logic “0” operates edge rates for “low speed”. VCC 3.0V to 3.6V power supply GND Ground reference www.fairchildsemi.com 2 Input X Z U I/O Outputs Mode VPO VMO/FSEO OE SUSPND D D RCV VP VM Result 0 0 0 0 0 0 1 0 0 1 Logic 0 0 0 1 0 0 0 0 U 0 0 SEO 0 1 0 0 0 1 0 1 1 0 Logic 1 0 1 1 0 0 0 0 U 0 0 SEO 1 0 0 0 0 0 0 U 0 0 SEO 1 0 1 0 0 0 1 0 0 1 Logic 0 1 1 0 0 0 1 0 1 1 0 Logic 1 1 1 1 0 0 1 1 U U U Illegal Code X X X 1 0 Z Z U U U D/D Hi-Z X X X 1 1 Z Z U U U D/D Hi-Z Don’t Care 3-STATE Undefined State 3 www.fairchildsemi.com USB1T11A Functional Truth Table USB1T11A Absolute Maximum Ratings(Note 3) DC Supply Voltage (VCC) Recommended Operating Conditions 0.5V to 7.0V DC Input Diode Current (IIK) VI 0 Supply Voltage VCC 50 mA Input Voltage (VI) 0.5V to 5.5V 0.5V to VCC 0.5V (Note 4) Input Voltage (VI/O) 0V to 5.5V Input Range for AI/O (VAI/O) 0V to VCC Output Voltage (VO) 0V to VCC Operating Ambient Temperature Output Diode Current (IOK) VO ! VCC or VO 0 3.0V to 3.6V Input Voltage (VI) 40qC to 85qC in free air (Tamb) r50 mA Output Voltage (VO) 0.5V to VCC 0.5V (Note 4) Output Source or Sink Current (IO) VP.VM, RCV pins VO r15 mA 0 to VCC Output Source or Sink Current (IO) Note 3: The Absolute Maximum Ratings are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristic tables are not guaranteed at the absolute maximum rating. The “Recommended Operating Conditions” table will define the conditions for actual device operation. D/D pins VO 0 to VCC VCC or GND Current (ICC, IGND) Storage Temperature (TSTO) r50 mA r100 mA 60qC to 150qC Note 4: The input and output voltage ratings may be exceeded if the input and output clamp current ratings are observed. DC Electrical Characteristics (Digital Pins) Over recommended range of supply voltage and operating free air temperature (unless otherwise noted). VCC 3.0V to 3.6V Limits Symbol Parameter Test Conditions Temp Min 40qC to 85qC Typ Unit Max INPUT LEVELS: VIL LOW Level Input Voltage VIH HIGH Level Input Voltage 0.8 2.0 V V OUTPUT LEVELS: VOL VOH LOW Level Output Voltage HIGH Level Output Voltage IOL 4 mA 0.4 IOL 20 PA 0.1 IOH 4 mA 2.4 IOH 20 PA VCC – 0.1 V V LEAKAGE CURRENT: IL Input Leakage Current VCC 3.0 to 3.6 r5 PA ICCFS Supply Current (Full Speed) VCC 3.0 to 3.6 5 mA ICCLS Supply Current (Low Speed) VCC 3.0 to 3.6 5 mA ICCQ Quiescent Current VCC 3.0 to 3.6 5 mA 10 PA VIN ICCS Supply Current in Suspend www.fairchildsemi.com VCC VCC or GND 3.0 to 3.6; Mode 4 VCC (D/D Pins) Over recommended range of supply voltage and operating free air temperature (unless otherwise noted). VCC 3.0V to 3.6V Limits Symbol Parameter Test Conditions Temp Min 40qC to 85qC Typ Units Max INPUT LEVELS: VDI Differential Input Sensitivity |(D) – (D)| 0.2 VCM Differential Common Mode Range Includes VDI Range 0.8 2.5 V VSE Single Ended Receiver Threshold 0.8 2.0 V 0.3 V V OUTPUT LEVELS: VOL Static Output LOW Voltage RL of 1.5 k: to 3.6V VOH Static Output HIGH Voltage RL of 15 k: to GND VCR Differential Crossover 2.8 3.6 V 1.3 2.0 V r5 PA 10 pF 10 % LEAKAGE CURRENT: High Z State Data Line Leakage Current 0V VIN 3.3V IOZ CAPACITANCE: CIN(Note 6) Transceiver Capacitance Pin to GND Capacitance Match OUTPUT RESISTANCE: ZDRV (Note 5) Driver Output Resistance Steady State Drive 4 Resistance Match 20 : 10 % Note 5: Excludes external resistor. In order to comply with USB Specification 1.1, external series resistors of 24: r 1% each on D and D are recommended. This specification is guaranteed by design and statistical process distribution. Note 6: This specification is guaranteed by design and statistical process distribution. AC Electrical Characteristics (D/D Pins, Full Speed) Over recommended range of supply voltage and operating free air temperature (unless otherwise noted). VCC CL 50 pF; RL 1.5 k: on D to VCC 3.0V to 3.6V Limits Symbol Parameter Test Condition Temp Min 40qC to 85qC Typ Units Max DRIVER CHARACTERISTICS: 10% and 90% ns tR Rise Time Figure 1 4 20 tF Fall Time Figure 1 4 20 tRFM Rise/Fall Time Matching (tr/tf) 90 110 % VCRS Output Signal Crossover Voltage 1.3 2.0 V DRIVER TIMINGS: tPLH Driver Propagation Delay Figure 2 18 ns tPLH (VPO, VMO/FSEO to D/D) Figure 2 18 ns tPHZ Driver Disable Delay Figure 4 13 ns tPLZ (OE to D/D) Figure 4 13 ns tPZH Driver Enable Delay Figure 4 17 ns tPZL (OE to D/D) Figure 4 17 ns RECEIVER TIMINGS: tPLH Receiver Propagation Delay Figure 3 16 ns tPHL (D, D to RCV) Figure 3 19 ns tPLH Single-ended Receiver Delay Figure 3 8 ns tPHL (D, D to VP, VM) Figure 3 8 ns 5 www.fairchildsemi.com USB1T11A DC Electrical Characteristics USB1T11A AC Electrical Characteristics (D/D Pins, Low Speed) Over recommended range of supply voltage and operating free air temperature (unless otherwise noted). VCC CL 200 pF to 600 pF; RL 1.5k: on D to VCC 3.0V to 3.6V Limits Symbol Parameter Tamb Test Conditions Min 40qC to 85qC Typ Unit Max DRIVER CHARACTERISTICS: 10% and 90% tLR Rise Time Figure 1 75 300 tLF Fall Time Figure 1 75 300 tRFM Rise/Fall Time Matching (tr/tf) 80 120 % VCRS Output Signal Crossover Voltage 1.3 2.0 V ns DRIVER TIMINGS: tPLH Driver Propagation Delay Figure 2 300 ns tPHL (VPO, VMO/FSEO to D/D) Figure 2 300 ns tPHZ Driver Disable Delay Figure 4 13 ns tPLZ (OE to D/D) Figure 4 13 ns tPZH Driver Enable Delay Figure 4 205 ns tPZL (OE to D/D) Figure 4 205 ns RECEIVER TIMINGS: tPLH Receiver Propagation Delay Figure 3 18 ns tPHL (D, D to RCV) Figure 3 18 ns tPLH Single-ended Receiver Delay Figure 3 28 ns tPHL (D, D to VP, VM) Figure 3 28 ns www.fairchildsemi.com 6 VOL and VOH are the typical output voltage drops that occur with the output load. (VCC never goes below 3.0V) FIGURE 2. VPI, VMO/FSEO to D/D FIGURE 1. Rise and Fall Times FIGURE 3. D/D to RCV, VP/VM FIGURE 4. OE to D/D Test Circuits and Waveforms Load for VM/VP and RCV Load for Enable and Disable Times Note: V 0 for tPZH, tPHZ V VCC for t PZL, tPLZ Load for D/D Test S1 D/LS Close CL 50 pF, Full Speed CL 200 pF, Low Speed (Min Timing) D/LS Open CL 600 pF, Low Speed (Max Timing) D/FS Open 1.5 k: on D (Low Speed) or D (Full Speed) only 7 D/FS Close www.fairchildsemi.com USB1T11A AC Waveforms USB1T11A Tape and Reel Specification Tape Format for MLP Package Designator Tape Number Cavity Section Cavities Status Status 125 (typ) Empty Sealed 2500 Filled Sealed 75 (typ) Empty Sealed Leader (Start End) BQX Carrier Trailer (Hub End) Cover Tape TAPE DIMENSIONS inches (millimeters) REEL DIMENSIONS inches (millimeters) Tape Size A (mm) N (Typical) (mm) W1 (mm) W2 (Max) (mm) 12 mm 330 178 12.4 18.4 www.fairchildsemi.com 8 USB1T11A Physical Dimensions inches (millimeters) unless otherwise noted 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow Package Number M14A 9 www.fairchildsemi.com USB1T11A Physical Dimensions inches (millimeters) unless otherwise noted (Continued) Pb-Free 16-Terminal Molded Leadless Package (MLP), JEDEC MO-220, 3mm square Package Number MLP16C www.fairchildsemi.com 10 USB1T11A Universal Serial Bus Transceiver Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Package Number MTC14 Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. www.fairchildsemi.com 11 www.fairchildsemi.com