FAIRCHILD USB1T20MPX

Revised January 2005
USB1T20
Universal Serial Bus Transceiver
General Description
Features
The USB1T20 is a generic USB 2.0 compliant transceiver.
Using a single voltage supply, the USB1T20 provides an
ideal USB interface solution for any electronic device able
to supply 3.0V to 3.6V. It is designed to allow 5.0V or 3.3V
programmable and standard logic to interface with the
physical layer of the Universal Serial Bus. It is capable of
transmitting and receiving serial data at both full speed
(12Mbit/s) and low speed (1.5Mbit/s) data rates.
■ Complies with Universal Serial Bus specification 2.0 for
FS/LS applications
Packaged in industry standard TSSOP and Fairchild’s
ultra-small 2.5mm x 2.5mm MLP package, the USB1T20 is
ideal for ultra-portable electronics and other space constrained applications.
■ Utilizes digital inputs and outputs to transmit and receive
USB cable data
■ Supports 12Mbit/s “Full Speed” and 1.5Mbit/s
“Low Speed” serial data transmission
■ Supports single-ended and differential data interface as
function of MODE
■ Single 3.3V supply
■ ESD Performance: Human Body Model
> 9.5 kV on D−, D+ pins only
> 4 kV on all other pins
■ Space saving 14-terminal MLP package
Ordering Code:
Order Number
Package Number
USB1T20MPX
(Preliminary)
MLP14D
USB1T20MTC
(Note 1)
MTC14
Package Description
14-Terminal Molded Leadless Package (MLP), 2.5mm Square
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Note 1: Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Diagram
Connection Diagrams
Terminal Assignments for MLP (Preliminary)
(Top View)
Pin Assignments for TSSOP
(Top View)
© 2005 Fairchild Semiconductor Corporation
DS500894
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USB1T20 Universal Serial Bus Transceiver
September 2004
USB1T20
Terminal and Pin Descriptions
Terminal or Pin
Number
Terminal or Pin
Name
MLP14D MTC14
I/O
Description
RCV
13
3
O
Receive data. CMOS level output for USB differential input
OE
12
2
I
Output Enable. Active LOW, enables the transceiver to transmit data on the
bus. When not active the transceiver is in receive mode.
MODE
11
1
I
Mode. When left unconnected, a weak pull-up transistor pulls it to
VCC and in this GND, the Vmo/FSEO pin takes the function of FSEO
(Force SEO).
Vpo,
8, 9
12, 13
I
Inputs to differential driver. (Outputs from SIE).
Vmo / FSEO
MODE
Vpo
Vmo/FSEO
RESULT
0
0
0
Logic “0”
1
Vp, Vm
14, 1
4, 5
O
0
1
SE0
1
0
Logic “1”
1
1
SE0
0
0
SE0
0
1
Logic “0”
1
0
Logic “1”
1
1
Illegal code
Gated version of D− and D+. Outputs are logic “0” and logic “1”. Used to
detect single ended zero (SE0), error conditions, and interconnect speed.
(Input to SIE).
Vm
Vp
RESULT
0
0
SE0
0
1
Low Speed
1
0
Full Speed
1
1
Error
D +, D−
7, 6
11, 10
AI/O
Data+, Data−. Differential data bus conforming to the Universal Serial Bus
standard.
SUSPND
2
6
I
Suspend. Enables a low power state while the USB bus is inactive. While
the SUSPND pin is active it will drive the RCV pin to a logic “0” state. Both
D+ and D− are 3-STATE.
SPEED
5
9
I
Edge rate control. Logic “1” operates at edge rates for “full speed”.
Logic “0” operates edge rates for “low speed”.
VCC
10
14
—
GND
3
7
—
NC
4
8
3.0V to 3.6V power supply
Ground reference
No Connect
Functional Truth Table
Input
I/O
Outputs
Mode
Vpo
Vmo/FSEO
OE
SUSPND
D+
D−
RCV
Vp
Vm
Result
0
0
0
0
0
0
1
0
0
1
Logic 0
0
0
1
0
0
0
0
U
0
0
SE0
0
1
0
0
0
1
0
1
1
0
Logic 1
0
1
1
0
0
0
0
U
0
0
SE0
1
0
0
0
0
0
0
U
0
0
SE0
1
0
1
0
0
0
1
0
0
1
Logic 0
1
1
0
0
0
1
0
1
1
0
Logic 1
1
1
1
0
0
1
1
U
U
U
Illegal Code
X
X
X
1
0
Z
Z
U
U
U
D+/D− Hi-Z
X
X
X
1
1
Z
Z
U
U
U
D+/D− Hi-Z
X = Don’t Care
Z = 3-STATE
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U = Undefined State
2
DC Supply Voltage (VCC)
Recommended Operating
Conditions
−0.5V to +7.0V
DC Input Diode Current (IIK)
VI < 0
Input Voltage (VI)
−0.5V to +5.5V
(Note 3)
−0.5V to VCC + 0.5V
Input Voltage (VI/O)
Input Voltage (VI)
0V to 5.5V
Input Range for AI/O (VAI/O)
0V to VCC
Output Voltage (VO)
0V to VCC
Operating Ambient Temperature
Output Diode Current (IOK)
VO > VCC or VO < 0
3.0V to 3.6V
Supply Voltage VCC
−50 mA
−40°C to +85°C
in Free Air (TAMB)
±50 mA
Output Voltage (VO)
−0.5V to VCC + 0.5V
(Note 3)
Output Source or Sink Current (IO)
Vp.Vm, RCV Pins
VO = 0V to VCC
±15 mA
Output Source or Sink Current (IO)
Note 2: The Absolute Maximum Ratings are those values beyond which
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the Electrical
Characteristic tables are not guaranteed at the absolute maximum rating.
The “Recommended Operating Conditions” table will define the conditions
for actual device operation.
D+/D− Pins
VO = 0V to VCC
±50 mA
VCC or GND Current (ICC , IGND)
Storage Temperature (TSTO)
±100 mA
−60°C to + 150°C
Note 3: The input and output voltage ratings may be exceeded if the input
and output clamp current ratings are observed.
DC Electrical Characteristics (Digital Pins)
Over recommended range of supply voltage and operating free air temperature (unless otherwise noted). VCC = 3.0V to 3.6V
Limits
Symbol
Parameter
Test Conditions
Temperature = −40°C to +85°C
Min
Typ
Unit
Max
Input Levels
VIL
LOW Level Input Voltage
VIH
HIGH Level Input Voltage
0.8
2.0
V
V
Output Levels
VOL
VOH
LOW Level Output Voltage
HIGH Level Output Voltage
IOL = 4 mA
0.4
IOL = 20 µA
0.1
IOH = 4 mA
2.4
IOH = 20 µA
VCC – 0.1
V
V
Leakage Current
IL
Input Leakage Current
VCC = 3.0 to 3.6
±5
µA
ICCFS
Supply Current (Full Speed)
VCC = 3.0 to 3.6
5
mA
ICCLS
Supply Current (Low Speed)
VCC = 3.0 to 3.6
5
mA
ICCQ
Quiescent Current
VCC = 3.0 to 3.6
5
mA
10
µA
VIN = VCC or GND
ICCS
Supply Current in Suspend
VCC = 3.0 to 3.6; Mode = VCC
3
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USB1T20
Absolute Maximum Ratings(Note 2)
USB1T20
DC Electrical Characteristics
(D+/D− Pins)
Over recommended range of supply voltage and operating free air temperature (unless otherwise noted). VCC = 3.0V to 3.6V
Limits
Symbol
Parameter
Test Conditions
Temperature = −40°C to +85°C
Min
Typ
Units
Max
Input Levels
VDI
Differential Input Sensitivity
|(D+) – (D−)|
0.2
VCM
Differential Common Mode Range
Includes VDI Range
0.8
2.5
V
V
VSE
Single Ended Receiver Threshold
0.8
2.0
V
0.3
V
2.8
3.6
V
1.3
2.0
V
High Z State Data Line Leakage Current 0V < VIN < 3.3V
±5
µA
CIN
Transceiver Capacitance
10
pF
(Note 5)
Capacitance Match
10
%
Output Levels
VOL
Static Output LOW Voltage
RL of 1.5 kΩ to 3.6V
VOH
Static Output HIGH Voltage
RL of 15 kΩ to GND
VCR
Differential Crossover
Leakage Current
IOZ
Capacitance
Pin-to-GND
Output Resistance
ZDRV
Driver Output Resistance
(Note 4)
Resistance Match
Steady State Drive
4
20
Ω
10
%
Note 4: Excludes external resistor. In order to comply with USB Specification 1.1, external series resistors of 24Ω ± 1% each on D+ and D− are recommended. This specification is guaranteed by design and statistical process distribution.
Note 5: This specification is guaranteed by design and statistical process distribution.
AC Electrical Characteristics (D+/D− Pins, Full Speed)
Over recommended range of supply voltage and operating free air temperature (unless otherwise noted).
VCC = 3.0V to 3.6V; CL = 50 pF; RL = 1.5 kΩ on D+ to VCC
Limits
Symbol
Parameter
Test Condition
Temperature = −40°C to +85°C
Min
Typ
Units
Max
Driver Characteristics
10% and 90%
tR
Rise Time
Figure 1
4
20
tF
Fall Time
Figure 1
4
20
tRFM
Rise/Fall Time Matching
(tR/tF)
90
110
%
VCRS
Output Signal Crossover Voltage
1.3
2.0
V
ns
Driver Timings
tPLH
Driver Propagation Delay
Figure 2
18
ns
tPLH
(Vpo, Vmo/FSEO to D+/D−)
Figure 2
18
ns
tPHZ
Driver Disable Delay
Figure 4
13
ns
tPLZ
(OE to D+/D−)
Figure 4
13
ns
tPZH
Driver Enable Delay
Figure 4
17
ns
tPZL
(OE to D+/D−)
Figure 4
17
ns
Receiver Timings
tPLH
Receiver Propagation Delay
Figure 3
16
ns
tPHL
(D+, D− to RCV)
Figure 3
19
ns
tPLH
Single-ended Receiver Delay
Figure 3
8
ns
tPHL
(D+, D− to Vp, Vm)
Figure 3
8
ns
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4
USB1T20
AC Electrical Characteristics (D+/D− Pins, Low Speed)
Over recommended range of supply voltage and operating free air temperature (unless otherwise noted).
VCC = 3.0V to 3.6V; CL = 200 pF to 600 pF; RL = 1.5kΩ on D− to VCC
Limits
Symbol
Parameter
TAMB = −40°C to +85°C
Test Conditions
Min
Typ
Unit
Max
Driver Characteristics
10% and 90%
tLR
Rise Time
Figure 1
75
300
tLF
Fall Time
Figure 1
75
300
ns
tRFM
Rise/Fall Time Matching
(tR/tF)
80
120
%
VCRS
Output Signal Crossover Voltage
1.3
2.0
V
Driver Timings
tPLH
Driver Propagation Delay
Figure 2
300
ns
tPHL
(Vpo, Vmo/FSEO to D+/D−)
Figure 2
300
ns
tPHZ
Driver Disable Delay
Figure 4
13
ns
tPLZ
(OE to D+/D−)
Figure 4
13
ns
tPZH
Driver Enable Delay
Figure 4
205
ns
tPZL
(OE to D+/D−)
Figure 4
205
ns
Receiver Timings
tPLH
Receiver Propagation Delay
Figure 3
18
ns
tPHL
(D+, D− to RCV)
Figure 3
18
ns
tPLH
Single-ended Receiver Delay
Figure 3
28
ns
tPHL
(D+, D− to Vp, Vm)
Figure 3
28
ns
5
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USB1T20
AC Waveforms
VOL and VOH are the typical output voltage drops that occur with the output load. (VCC never goes below 3.0V)
FIGURE 2. Vpi, Vmo/FSEO to D+/D−
FIGURE 1. Rise and Fall Times
FIGURE 3. D+/D− to RCV, Vp/Vm
FIGURE 4. OE to D+/D−
Test Circuits and Waveforms
Load for Vm/Vp and RCV
Load for Enable and Disable Times
Note:
V = 0 for tPZH, tPHZ
V = VCC for tPZL, tPLZ
Load for D+/D−
Test
CL = 50 pF, Full Speed
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S1
D−/LS Close
CL = 200 pF, Low Speed (Minimum Timing)
D+/LS Open
CL = 600 pF, Low Speed (Maximum Timing)
D−/FS Open
1.5 kΩ on D− (Low Speed) or D+ (Full Speed) only
D+/FS Close
6
Tape Format for MLP
Package
Designator
MPX
Tape
Number
Cavity
Section
Cavities
Status
Cover Tape
Status
Leader (Start End)
125 (typ)
Empty
Sealed
Carrier
2500
Filled
Sealed
Trailer (Hub End)
75 (typ)
Empty
Sealed
TAPE DIMENSIONS inches (millimeters)
REEL DIMENSIONS inches (millimeters)
Tape Size
A
(mm)
N
(Typical)
(mm)
W1
(mm)
W2
(Max)
(mm)
12 mm
330
178
12.4
18.4
7
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USB1T20
Tape and Reel Specification
USB1T20
Physical Dimensions inches (millimeters) unless otherwise noted
14-Terminal Molded Leadless Package (MLP), 2.5mm Square
Package Number MLP14D
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8
USB1T20 Universal Serial Bus Transceiver
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Package Number MTC14
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
2. A critical component in any component of a life support
device or system whose failure to perform can be reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the
user.
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9
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