NSC FPD63310

ADVANCED INFORMATION
NOV, 1997
FPD63310
Universal Interface XGA Panel Timing Controller (UI-XPAT)
Reduced Swing Differential Signaling (RSDS )
General Description
Feature
The FPD63310 is the first TFT-LCD timing controller that
combines at TTL single pixel system interface with National’s Reduced Swing Differential Signaling (RSDS) source
driver interface. It resides on the TFT-LCD panel and provides the data buffering and control signal generation for
XGA and SVGA TFT-LCD panels.
■ Reduced Swing Differential Signaling (RSDS)TM source
driver bus for low power and reduced EMI
■ Universal TTL single pixel system interface
■ Drives National Semiconductor RSDS Column Drivers
at 130Mb/s with a 65 MHz clock
■ Optional EEPROM programming allows fine tuning in
The RSDS path to the source or column drivers contributes
toward lowing radiated EMI, reducing system power consumption and eliminates one of the pixel busses used in typical XGA TFT-LCD panels today.
■ Ability to drive SVGA XGA TFT-LCD Systems
■ Narrow 9-bit differential Source Driver bus minimizes
This single 9-bit differential bus conveys the 18-bit color data
for XGA panels at 130Mb/s when using VESA 60Hz standard timing.
■ CMOS circuitry operates from a 3.3V supply.
■
development and production environments.
width of Source PCB
With the addition of a single National DS90CF364 or 564
FPD-LINK TM chip, the entire data path is optimized for reduced EMI, power consumption and width..
System Diagram
Gray Scale Voltage Reference BUS
Gray scale
Reference
Line Transfer Signal
/9 + CLK, RSDS BUS
Start Pulse
Inversion
Control
LMC7532
LMC7532
LMC7532
LMC7532
n
1
n
1
n
1
n
1
Start Pulse
/2 Link3
R*A
FPD63310
An
XGA Panel
Timing
Controller
1024 X 768 or 800 X 600
Gate Clock
/2 LinkC
FPD-Link
/2 Link2
DS90CF564
/364
A1
/2 Link1
VDD
Panel Power
Supply
NM93CSxxL
E1
Serial EEPROM
R*E
VSS
TFT-LCD Array
En
*: Row Driver; LM7403(National Semiconductor)
TMS57600, 1, 4(Texas Instrument)
uPD16650, 2, 4(NEC)
fFPD-LINK TM is a trademark of National Semiconductor
©1997 NSC
1
http://www.national.com
Package information
Physical Dimension (millimeters)
ThinPlastic Quad Flatpac (JEDEC)(TQFP)
NS package Number VJD100A
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National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.
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