12-Channel Gamma Buffers with VCOM Buffer ADD8702 FEATURES Programmable 12-Channel Gamma Reference Generator Mask Programmable Adjustable VCOM Buffer Upper/Lower Outputs Swing to VDD/GND Continuous Output Current: 10 mA VCOM Peak Output Current: 250 mA Outputs with Fast Settling Time for Load Change Output Pins Are Compatible with ADD8701 Single-Supply Operation: 7 V to 16 V Supply Current: 15 mA Max The ADD8702 provides a complete programmed set of gamma voltage references for the LCD source drivers. These references settle quickly to load change. The VCOM output is stable with high capacitive loads and can source or sink 250 mA peak current. The VCOM output level can be adjusted using an external trim-potentiometer or discrete resistors. PANEL TIMING CONTROLLER GND VGMA12 VGMA11 VGMA10 VGMA9 VGMA8 VGMA7 31 30 26 28 27 26 25 VGMA6 VIN11 4 21 VGMA5 VIN10 5 20 VGMA4 VIN9 6 19 VGMA3 VIN8 7 18 VGMA2 VIN7 8 17 VGMA1 9 10 11 12 13 14 15 16 GND 22 VDD 3 VLOW VDD VHIGH VIN2 23 VIN3 GND 2 VIN4 24 VCOM ADJ VIN5 1 GENERAL DESCRIPTION The ADD8702 is a low cost, mask programmable, 12-channel gamma reference generator, plus an adjustable VCOM driver. This part is designed to provide gamma correction for high resolution TFT LCD panels. The 12 gamma reference levels and VCOM are mask programmable to 0.3% resolution using the on-chip 500 chain resistor string. This reduces component and board costs. 32 VDD VIN6 APPLICATIONS TFT LCD Panels VCOM OUT FUNCTIONAL BLOCK DIAGRAM The output pins are compatible with the ADD8701. This allows for single board design and fast turns for prototyping using the initial ADD8701 board design. The ADD8702 is specified over the temperature range of –40°C to +85°C and comes in the 32-lead lead frame chip scale package (LFCSP) for compact board space. ADD8702 TIMING AND CONTROL GAMMA REFERENCE VOLTAGES SCAN DRIVER CONTROL GAMMA VCOM SOURCE DRIVER NO. 1 SOURCE DRIVER NO. 2 SOURCE DRIVER NO. 8 384 384 384 R G B SCAN DRIVERS 768 TFT COLOR PANEL 1024 768 Figure 1. Typical SVGA TFT LCD Application REV. 0 Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective companies. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781/329-4700 www.analog.com Fax: 781/326-8703 © 2003 Analog Devices, Inc. All rights reserved. ADD8702–SPECIFICATIONS ELECTRICAL CHARACTERISTICS (V DD = 16 V, TA = 25ⴗC, unless otherwise specified.) Parameter Symbol OUTPUT ACCURACY VSYSTEM ERROR VSY ERROR MASK PROGRAMMABLE RESISTOR STRING Total Resistor String Resistor Matching RTOTAL RMATCH 500 Elements VLOW to VHIGH Any Two Segments VOUT IL = 100 µA IL = 5 mA –40°C ≤ TA ≤ +85°C IL = 5 mA OUTPUT CHARACTERISTICS Output Voltage High (VGMA11, VGMA12) Output Voltage Mid (VGMA3 to VGMA10) Output Voltage Low (VGMA1, VGMA2) VOUT Conditions Min 15.85 15.75 Typ Max Unit 10 50 mV 22.5 1 kΩ % 15.995 15.95 V V V V 14.6 IL = 100 µA IL = 5 mA –40°C ≤ TA ≤ +85°C 1 V Step 0.1%, RL = 10 kΩ, CL = 200 pF 10 150 1 mV mV mV mA mA µs IOUT IPK tS 1 V Step 0.1%, RL = 10 kΩ, CL = 200 pF 35 250 0.8 mA mA µs SUPPLY CHARACTERISTICS Supply Voltage Power Supply Rejection Ratio VDD PSRR VS = 6 V to 17 V, –40°C ≤ TA ≤ +85°C SUPPLY CURRENT ISYS VOUT Continuous Output Current Peak Output Current Settling Time—Voltage IOUT IPK tS VCOM CHARACTERISTICS Continuous Output Current Peak Output Current Settling Time—Voltage No Load –40°C ≤ TA ≤ +85°C 5 50 7 68 150 250 16 V dB 15 16 mA mA 75 11 Specifications subject to change without notice. –2– REV. 0 ADD8702 ABSOLUTE MAXIMUM RATINGS* Supply Voltage (VS) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 V Storage Temperature Range . . . . . . . . . . . . . –65°C to +150°C Operating Temperature Range . . . . . . . . . . . . –40°C to +85°C Junction Temperature Range . . . . . . . . . . . . . –65°C to +150°C Lead Temperature Range (Soldering, 60 sec.) . . . . . . . . 300°C ESD Tolerance (HBM) . . . . . . . . . . . . . . . . . . . . . . . ± 1,000 V Package Type JA1 JB2 Unit 32-Lead LFCSP (CP) 35 13 °C/W NOTES 1 θJA is specified for worst-case conditions, i.e., θJA is specified for device soldered in circuit board for surface-mount packages. 2 ψJB is applied for calculating the junction temperature by reference to the board temperature. *Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ORDERING GUIDE Model Temperature Range Package Description Package Option ADD8702ACP-R2 ADD8702ACP-REEL ADD8702ACP-REEL7 –40°C to +85°C –40°C to +85°C –40°C to +85°C 32-Lead LFCSP 32-Lead LFCSP 32-Lead LFCSP CP-32 CP-32 CP-32 32 VCOM OUT 31 GND 30 VGMA12 29 VGMA11 28 VGMA10 27 VGMA9 26 VGMA8 25 VGMA7 PIN CONFIGURATION 24 GND 23 VDD 22 VGMA6 21 VGMA5 20 VGMA4 19 VGMA3 18 VGMA2 17 VGMA1 PIN 1 INDICATOR ADD8702 TOP VIEW VIN6 9 VIN5 10 VIN4 11 VIN3 12 VIN2 13 VLOW 14 VDD 15 GND 16 VDD 1 VCOM ADJ 2 VHIGH 3 VIN11 4 VIN10 5 VIN9 6 VIN8 7 VIN7 8 PIN FUNCTION DESCRIPTIONS Pin No. Mnemonic Description 1, 15, 23 VDD Power (+) 2 VCOM ADJ VCOM Adjust Input 3 4–13 14 VHIGH VIN11–VIN2 VLOW Highest Gamma Input Voltage Gamma Buffer Inputs Lowest Gamma Input Voltage 16, 24, 31 GND Power (–) 17–22, 25–30 VGMA1–VGMA12 Gamma Buffer Outputs 32 VCOM OUT VCOM Buffer Output CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the ADD8702 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. REV. 0 –3– ADD8702–Typical Performance Characteristics 12 12 8 6 4 2k, 10k 0 10 GAIN (dB) SUPPLY CURRENT (mA) SUPPLY CURRENT (mA) VDD = 16V GAMMA 1 TO 9 11 10 9 8 –10 150 –20 7 –30 2 0 10 VDD = 16V TA = 25C 6 0 4 8 12 SUPPLY VOLTAGE (V) 5 –40 16 TPC 1. Supply Current vs. Supply Voltage 25 TEMPERATURE (C) –40 100k 85 TPC 2. Supply Current vs. Temperature 10 2k, 10k 0 0 20 VDD = 16V VCOM VDD = 16V GAMMA 1 TO 9 10 2k, 10k 150 –20 50pF GAIN (dB) GAIN (dB) GAIN (dB) –10 –10 30M TPC 3. Frequency Response vs. Resistive Loading 10 VDD = 16V GAMMA 10 TO 12 1M 10M FREQUENCY (Hz) 150 –20 0 100pF 340pF –10 –30 540pF –30 –20 –40 1040pF –40 100k –50 100k 30M 1M 10M FREQUENCY (Hz) TPC 4. Frequency Response vs. Resistive Loading –30 100k 30M TPC 5. Frequency Response vs. Resistive Loading 180 VDD = 16V VCOM 10 50pF 0 100pF 340pF –10 GAIN (dB) 10 0 –10 340pF 540pF 100pF 1040pF 1040pF –30 100k 1M 10M FREQUENCY (Hz) TPC 7. Frequency Response vs. Capacitive Loading 30M 30M GAMMA 12 GAMMA 1 140 120 100 80 540pF –20 –20 VDD = 16V GAMMA 1 TO 12 RL = 2k 160 PHASE SHIFT (Degrees) VDD = 16V GAMMA 10 TO 12 1M 10M FREQUENCY (Hz) TPC 6. Frequency Response vs. Capacitive Loading 20 20 GAIN (dB) 1M 10M FREQUENCY (Hz) –30 100k 50pF 60 40 1M 10M FREQUENCY (Hz) 30M TPC 8. Frequency Response vs. Capacitive Loading –4– 0 200 400 600 800 1,000 CAPACITIVE LOAD (pF) 1,200 TPC 9. Input and Output Phase Shift vs. Capacitive Load REV. 0 ADD8702 16 VDD = 16V RL = 10k CL = 100pF VDD = 16V RNULL = 33 CL = 100pF 14 VOLTAGE (20mV/DIV) VOLTAGE (2V/DIV) SLEW RATE (V/s) 12 10 VCOM SLEW RATE FALLING 8 VCOM SLEW RATE RISING 6 4 7V < V DD < 16V RNULL = 33 CL = 0.1F 2 0 –40 TPC 10. Large Signal Transient Response TPC 12. Small Signal Transient Response 11 11 9 9 8 8 120pF 7 320pF 1F 10F 6 5 520pF 4 VDD = 16V GAMMA = 11 10 VDD = 16V VCOM 10 9 8 320pF 7 120pF 6 AMPLITUDE (V) VDD = 16V GAMMA = 2 AMPLITUDE (V) AMPLITUDE (V) TIME (20s/DIV) TPC 11. Slew Rate vs. Temperature 11 10 1F 10F 5 520pF 4 120pF 7 5 4 520pF 3 3 2 2 2 1 1 1 0 –200 0 –200 0 –200 200 600 1,000 TIME (ns) 1,400 1,800 200 600 1,000 TIME (ns) 1,400 1,800 1F 10F 320pF 6 3 200 600 1,000 TIME (ns) 1,400 TPC 13. Transient Load Response vs. Capacitive Load TPC 14. Transient Load Response vs. Capacitive Load TPC 15. Transient Load Response vs. Capacitive Load 100 1,400 50 80 70 60 50 SINK 40 30 SOURCE 20 10 0 0.001 0.01 0.1 1 10 LOAD CURRENT (mA) TPC 16. Output Voltage Error vs. Load Current REV. 0 100 1,200 VDD = 16V GAMMA 10 TO 12 OUTPUT VOLTAGE ERROR (mV) VDD = 16V 90 GAMMA 1 TO 9 OUTPUT VOLTAGE ERROR (mV) OUTPUT VOLTAGE ERROR (mV) 85 25 TEMPERATURE (C) TIME (2s/DIV) SINK 1,000 800 600 400 SOURCE 200 0 0.001 1,800 VDD = 16V 45 VCOM 40 35 30 25 20 SOURCE 15 10 SINK 5 0.01 0.1 1 10 LOAD CURRENT (mA) TPC 17. Output Voltage Error vs. Load Current –5– 100 0 0.001 0.01 0.1 1 10 LOAD CURRENT (mA) TPC 18. Output Voltage Error vs. Load Current 100 ADD8702 80 4,000 3,000 2,000 1,000 0 –22 –14 –6 2 10 18 26 OUTPUT VOLTAGE ERROR (mV) 34 TPC 19. Output Voltage Error Distribution 40 20 0 –20 –40 PSRR –60 –80 –100 –120 100 10k 100k FREQUENCY (Hz) 1M 10M TIME (40s/DIV) TPC 21. No Phase Reversal 70 VDD = 16V VCOM AND BUFFERS 1 TO 9 MARKER SET @ 10kHz MARKER READING = 25.7nV/ Hz 60 50 VOLTAGE NOISE DENSITY (nV/ Hz) VOLTAGE NOISE DENSITY (nV/ Hz) 1k TPC 20. Power Supply Rejection Ratio vs. Frequency 70 40 30 20 10 0 –10 ALL CHANNELS VDD = 8V TA = 25C 60 VOLTAGE (3V/DIV) VDD = 16V TA = 25C 5,000 ALL CHANNELS POWER SUPPLY REJECTION RATIO (dB) FREQUENCY (No. of Amplifiers) 6,000 0 5 10 15 FREQUENCY (Hz) 20 TPC 22. Voltage Noise Density vs. Frequency 25 VDD = 16V BUFFERS 10 TO 12 MARKER SET @ 10kHz MARKER READING = 36.6nV/ Hz 60 50 40 30 20 10 0 –10 0 5 10 15 FREQUENCY (Hz) 20 25 TPC 23. Voltage Noise Density vs. Frequency –6– REV. 0 ADD8702 VHIGH A12 GMA 12 VIN11 A11 GMA 11 VIN10 A10 GMA 10 VIN9 A9 GMA 9 VIN8 A8 GMA 8 VIN7 A7 GMA 7 VIN6 A6 GMA 6 VIN5 A5 GMA 5 VIN4 A4 GMA 4 VIN3 A3 GMA 3 VIN2 A2 GMA 2 VLOW A1 GMA 1 16V BUFFER RNULL CT RL Figure 2. Bandwidth Measurement Information Panel size and resolution determine the number of gamma reference voltages required. For a 256-grayscale level, 8-bit color scheme, 6 ⫻ 2 external reference nodes should be sufficient to match the characteristics of the LCD driver to the characteristics of the actual LCD panel for improved picture quality. External reference gamma correction voltages are often generated using a simple resistor ladder. Using the ADD8702, the resistor ladder is incorporated in the IC for reduced cost and number of components. 16V 0.1s BUFFER 33 1k VTH 5V VTH 10V 5V 0V Figure 3. Transient Load Regulation Test Circuit The ADD8702 is designed to meet the rail-to-rail capability needed by the application, yet offers the lowest cost per channel solution. The ADD8702 gamma buffers offer 10 mA continuous drive current capability. To be more competitive, the design maximizes the die area by allowing specific channels to swing to the positive rail and negative rail. So it is imperative that the channels swinging close to the supply rail be used for the positive gamma references and the channels swinging close to GND be used for the negative gamma references. The VCOM buffer can handle up to 35 mA continuous output current and can drive up to 1,000 pF pure capacitive load. Provision is available to adjust the VCOM voltage to a desired level. Refer to Figure 4 for an example of an application circuit for adjusting the output of the VCOM buffer. VDD NEGATIVE GAMMA REFERENCES Figure 1 is a block diagram of the configuration of an XGAcompatible (1024 ⫻ 768) TFT color panel with the ADD8702 providing gamma correction reference voltages to the source drivers and an integrated VCOM driver for LCD common node. POSITIVE GAMMA REFERENCES APPLICATIONS LCD SOURCE DRIVER VCOM AMP LCD COMMON PLANE 32k GND VCOM ADJUST 2k ADD8702 Figure 4. Application Circuit Table I. ADD8702 – 000 Mask Option, Resistor Tap Points (0 ≤ ≤ 500) VDD = 12.5 V, VHIGH = 12.5 V, and VLOW = GND VGMA1 VGMA2 VGMA3 VGMA4 VGMA5 VGMA6 VGMA7 VGMA8 VGMA9 VGMA10 VGMA11 VGMA12 VCOM REV. 0 –7– Tap Point () Voltage Unit 8 57 84 115 139 194 218 298 371 418 442 488 200 0.2 1.43 2.11 2.89 3.48 4.86 5.45 7.45 9.29 10.45 11.04 12.2 5 V V V V V V V V V V V V V ADD8702 OUTLINE DIMENSIONS 32-Lead Lead Frame Chip Scale Package [LFCSP] (CP-32) 5.00 BSC SQ 0.60 MAX PIN 1 INDICATOR 12 MAX 32 1 0.50 BSC 4.75 BSC SQ 3.25 3.10 SQ 2.95 BOTTOM VIEW 0.50 0.40 0.30 1.00 0.90 0.80 PIN 1 INDICATOR 0.60 MAX 25 24 TOP VIEW C03820–0–6/03(0) Dimensions shown in millimeters 17 16 9 8 3.50 REF 0.80 MAX 0.65 NOM 0.05 MAX 0.02 NOM SEATING PLANE 0.30 0.23 0.18 0.20 REF COPLANARITY 0.08 COMPLIANT TO JEDEC STANDARDS MO-220-VHHD-2 –8– REV. 0