Dual-Channel, 14-Bit CCD Signal Processor with V-Driver and Precision Timing Generator AD9928 Data Sheet FEATURES GENERAL DESCRIPTION 60 MHz grade available (AD9928BBCZ-60) Registers similar to AD9920A and AD9990 Timing generator with 18-channel V-driver Serial data output with reduced range LVDS interface 1.8 V dual AFE core Internal LDO regulators for compatibility with 3 V systems Correlated double sampler (CDS) with −3 dB, 0 dB, +3 dB, and +6 dB gain 6 dB to 42 dB, 10-bit variable gain amplifier (VGA) 14-bit, 40 MHz analog-to-digital converter (ADC) Black level clamp with variable level control Precision Timing core with ~390 ps resolution at 40 MHz On-chip 3 V horizontal and RG drivers General-purpose outputs (GPOs) for shutter support On-chip driver for external crystal 128-ball CSP_BGA package, 9 mm × 9 mm, 0.65 mm pitch The AD9928 is a highly integrated CCD signal processor for digital still-image camera applications. It includes a dual analog front end with analog-to-digital conversion, combined with a fullfunction, programmable timing generator and an 18-channel vertical driver (V-driver) for a 2-channel output CCD. The timing generator is capable of supporting up to 24 vertical clock signals internally, and the on-chip V-driver supports up to 18 high voltage outputs. A Precision Timing® core allows adjustment of high speed clocks with approximately 390 ps resolution at 40 MHz operation. The AD9928 also contains seven general-purpose outputs, which can be used for shutter and system functions. Each analog front end includes black level clamping, CDS, VGA, and a 14-bit ADC. The timing generator provides all the necessary CCD clocks: RG, H-clocks, V-clocks, sensor gate pulses, substrate clock, and substrate bias control. The AD9928 is specified over an operating temperature range of −25°C to +85°C. APPLICATIONS High speed digital imaging Surveillance cameras Industrial cameras FUNCTIONAL BLOCK DIAGRAM REFT_A REFB_A REFT_B REFB_B VREF_A VREF_B AD9928 –3dB, 0dB, +3dB, +6dB CDS CCDIN_A 14-BIT ADC VGA TCLKP 14 TCLKN DOUT0P_A 6dB TO 42dB –3dB, 0dB, +3dB, +6dB CDS CCDIN_B LDOIN_A LDOOUT_A LDOIN_B LDOOUT_B 14-BIT ADC VGA 14 +1.8V LDO REG_A +3V +1.8V LDO REG_B 6dB TO 42dB 8 DOUT1N_A DOUT0P_B DOUT1N_B INTERNAL CLOCKS PRECISION TIMING GENERATOR HORIZONTAL DRIVERS H1A TO H4A, H1B TO H4B SL INTERNAL REGISTERS XV1 TO XV24 24 18 SUBCK DOUT1P_A DOUT1P_B CLAMP 2 HL_A, HL_B V1A TO V15 REDUCED RANGE LVDS OUTPUTS DOUT0N_B +3V RG_A, RG_B DOUT0N_A CLAMP VERTICAL DRIVER XSUBCK SCK SDATA VERTICAL TIMING CONTROL SYNC GENERATOR GPO1 TO GPO7 HD VD SYNC CLI CLO RST 08261-001 7 XSUBCNT (GPO8) Figure 1. For more information on the AD9928, email Analog Devices, Inc., at [email protected]. Rev. SpH Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 ©2009–2013 Analog Devices, Inc. All rights reserved. Technical Support www.analog.com AD9928 Data Sheet NOTES ©2009–2013 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D08261F-0-1/13(SpH) Rev. SpH | Page 2 of 2